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Merge "Update to v6.5 kernel headers." into main am: 6d2b71eb45 am: 74415a49e9 am: 150238db38 am: 4661569b5b am: 0206ee1a6d

Browse source 
Original change: https://android-review.googlesource.com/c/platform/bionic/+/2743819

Change-Id: I4f4b7af5f02387142b4bf7cb305ae6aaf7a6159c
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
This commit is contained in:
Christopher Ferris 2023-09-12 22:06:05 +00:00 committed by Automerger Merge Worker
commit 050206e6dd
72 changed files with 1247 additions and 108 deletions
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3
libc/include/bits/glibc-syscalls.h
View file

@ -60,6 +60,9 @@
#if defined(__NR_brk)
#define SYS_brk __NR_brk
#endif
#if defined(__NR_cachestat)
#define SYS_cachestat __NR_cachestat
#endif
#if defined(__NR_capget)
#define SYS_capget __NR_capget
#endif

1
libc/kernel/uapi/asm-arm/asm/unistd-eabi.h
View file

@ -421,4 +421,5 @@
#define __NR_process_mrelease (__NR_SYSCALL_BASE + 448)
#define __NR_futex_waitv (__NR_SYSCALL_BASE + 449)
#define __NR_set_mempolicy_home_node (__NR_SYSCALL_BASE + 450)
#define __NR_cachestat (__NR_SYSCALL_BASE + 451)
#endif

1
libc/kernel/uapi/asm-arm/asm/unistd-oabi.h
View file

@ -433,4 +433,5 @@
#define __NR_process_mrelease (__NR_SYSCALL_BASE + 448)
#define __NR_futex_waitv (__NR_SYSCALL_BASE + 449)
#define __NR_set_mempolicy_home_node (__NR_SYSCALL_BASE + 450)
#define __NR_cachestat (__NR_SYSCALL_BASE + 451)
#endif

1
libc/kernel/uapi/asm-arm64/asm/hwcap.h
View file

@ -93,4 +93,5 @@
#define HWCAP2_SME_BI32I32 (1UL << 40)
#define HWCAP2_SME_B16B16 (1UL << 41)
#define HWCAP2_SME_F16F16 (1UL << 42)
#define HWCAP2_MOPS (1UL << 43)
#endif

4
libc/kernel/uapi/asm-generic/bitsperlong.h
View file

@ -19,6 +19,10 @@
#ifndef _UAPI__ASM_GENERIC_BITS_PER_LONG
#define _UAPI__ASM_GENERIC_BITS_PER_LONG
#ifndef __BITS_PER_LONG
#if defined(__CHAR_BIT__) && defined(__SIZEOF_LONG__)
#define __BITS_PER_LONG (__CHAR_BIT__ * __SIZEOF_LONG__)
#else
#define __BITS_PER_LONG 32
#endif
#endif
#endif

2
libc/kernel/uapi/asm-generic/socket.h
View file

@ -102,6 +102,8 @@
#define SO_RESERVE_MEM 73
#define SO_TXREHASH 74
#define SO_RCVMARK 75
#define SO_PASSPIDFD 76
#define SO_PEERPIDFD 77
#if __BITS_PER_LONG == 64 || defined(__x86_64__) && defined(__ILP32__)
#define SO_TIMESTAMP SO_TIMESTAMP_OLD
#define SO_TIMESTAMPNS SO_TIMESTAMPNS_OLD

3
libc/kernel/uapi/asm-generic/unistd.h
View file

@ -413,8 +413,9 @@
#define __NR_process_mrelease 448
#define __NR_futex_waitv 449
#define __NR_set_mempolicy_home_node 450
#define __NR_cachestat 451
#undef __NR_syscalls
#define __NR_syscalls 451
#define __NR_syscalls 452
#if __BITS_PER_LONG == 64 && !defined(__SYSCALL_COMPAT)
#define __NR_fcntl __NR3264_fcntl
#define __NR_statfs __NR3264_statfs

1
libc/kernel/uapi/asm-riscv/asm/auxvec.h
View file

@ -28,4 +28,5 @@
#define AT_L3_CACHESIZE 46
#define AT_L3_CACHEGEOMETRY 47
#define AT_VECTOR_SIZE_ARCH 9
#define AT_MINSIGSTKSZ 51
#endif

1
libc/kernel/uapi/asm-riscv/asm/hwcap.h
View file

@ -24,4 +24,5 @@
#define COMPAT_HWCAP_ISA_F (1 << ('F' - 'A'))
#define COMPAT_HWCAP_ISA_D (1 << ('D' - 'A'))
#define COMPAT_HWCAP_ISA_C (1 << ('C' - 'A'))
#define COMPAT_HWCAP_ISA_V (1 << ('V' - 'A'))
#endif

4
libc/kernel/uapi/asm-riscv/asm/hwprobe.h
View file

@ -31,6 +31,10 @@ struct riscv_hwprobe {
#define RISCV_HWPROBE_KEY_IMA_EXT_0 4
#define RISCV_HWPROBE_IMA_FD (1 << 0)
#define RISCV_HWPROBE_IMA_C (1 << 1)
#define RISCV_HWPROBE_IMA_V (1 << 2)
#define RISCV_HWPROBE_EXT_ZBA (1 << 3)
#define RISCV_HWPROBE_EXT_ZBB (1 << 4)
#define RISCV_HWPROBE_EXT_ZBS (1 << 5)
#define RISCV_HWPROBE_KEY_CPUPERF_0 5
#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)

44
libc/kernel/uapi/asm-riscv/asm/kvm.h
View file

@ -22,6 +22,7 @@
#include <linux/types.h>
#include <asm/bitsperlong.h>
#include <asm/ptrace.h>
#define __KVM_HAVE_IRQ_LINE
#define __KVM_HAVE_READONLY_MEM
#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
#define KVM_INTERRUPT_SET - 1U
@ -95,6 +96,8 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_ZICBOZ,
KVM_RISCV_ISA_EXT_ZBB,
KVM_RISCV_ISA_EXT_SSAIA,
KVM_RISCV_ISA_EXT_V,
KVM_RISCV_ISA_EXT_SVNAPOT,
KVM_RISCV_ISA_EXT_MAX,
};
enum KVM_RISCV_SBI_EXT_ID {
@ -139,5 +142,46 @@ enum KVM_RISCV_SBI_EXT_ID {
#define KVM_REG_RISCV_SBI_MULTI_REG(__ext_id) ((__ext_id) / __BITS_PER_LONG)
#define KVM_REG_RISCV_SBI_MULTI_MASK(__ext_id) (1UL << ((__ext_id) % __BITS_PER_LONG))
#define KVM_REG_RISCV_SBI_MULTI_REG_LAST KVM_REG_RISCV_SBI_MULTI_REG(KVM_RISCV_SBI_EXT_MAX - 1)
#define KVM_REG_RISCV_VECTOR (0x09 << KVM_REG_RISCV_TYPE_SHIFT)
#define KVM_REG_RISCV_VECTOR_CSR_REG(name) (offsetof(struct __riscv_v_ext_state, name) / sizeof(unsigned long))
#define KVM_REG_RISCV_VECTOR_REG(n) ((n) + sizeof(struct __riscv_v_ext_state) / sizeof(unsigned long))
#define KVM_DEV_RISCV_APLIC_ALIGN 0x1000
#define KVM_DEV_RISCV_APLIC_SIZE 0x4000
#define KVM_DEV_RISCV_APLIC_MAX_HARTS 0x4000
#define KVM_DEV_RISCV_IMSIC_ALIGN 0x1000
#define KVM_DEV_RISCV_IMSIC_SIZE 0x1000
#define KVM_DEV_RISCV_AIA_GRP_CONFIG 0
#define KVM_DEV_RISCV_AIA_CONFIG_MODE 0
#define KVM_DEV_RISCV_AIA_CONFIG_IDS 1
#define KVM_DEV_RISCV_AIA_CONFIG_SRCS 2
#define KVM_DEV_RISCV_AIA_CONFIG_GROUP_BITS 3
#define KVM_DEV_RISCV_AIA_CONFIG_GROUP_SHIFT 4
#define KVM_DEV_RISCV_AIA_CONFIG_HART_BITS 5
#define KVM_DEV_RISCV_AIA_CONFIG_GUEST_BITS 6
#define KVM_DEV_RISCV_AIA_MODE_EMUL 0
#define KVM_DEV_RISCV_AIA_MODE_HWACCEL 1
#define KVM_DEV_RISCV_AIA_MODE_AUTO 2
#define KVM_DEV_RISCV_AIA_IDS_MIN 63
#define KVM_DEV_RISCV_AIA_IDS_MAX 2048
#define KVM_DEV_RISCV_AIA_SRCS_MAX 1024
#define KVM_DEV_RISCV_AIA_GROUP_BITS_MAX 8
#define KVM_DEV_RISCV_AIA_GROUP_SHIFT_MIN 24
#define KVM_DEV_RISCV_AIA_GROUP_SHIFT_MAX 56
#define KVM_DEV_RISCV_AIA_HART_BITS_MAX 16
#define KVM_DEV_RISCV_AIA_GUEST_BITS_MAX 8
#define KVM_DEV_RISCV_AIA_GRP_ADDR 1
#define KVM_DEV_RISCV_AIA_ADDR_APLIC 0
#define KVM_DEV_RISCV_AIA_ADDR_IMSIC(__vcpu) (1 + (__vcpu))
#define KVM_DEV_RISCV_AIA_ADDR_MAX (1 + KVM_DEV_RISCV_APLIC_MAX_HARTS)
#define KVM_DEV_RISCV_AIA_GRP_CTRL 2
#define KVM_DEV_RISCV_AIA_CTRL_INIT 0
#define KVM_DEV_RISCV_AIA_GRP_APLIC 3
#define KVM_DEV_RISCV_AIA_GRP_IMSIC 4
#define KVM_DEV_RISCV_AIA_IMSIC_ISEL_BITS 12
#define KVM_DEV_RISCV_AIA_IMSIC_ISEL_MASK ((1U << KVM_DEV_RISCV_AIA_IMSIC_ISEL_BITS) - 1)
#define KVM_DEV_RISCV_AIA_IMSIC_MKATTR(__vcpu,__isel) (((__vcpu) << KVM_DEV_RISCV_AIA_IMSIC_ISEL_BITS) | ((__isel) & KVM_DEV_RISCV_AIA_IMSIC_ISEL_MASK))
#define KVM_DEV_RISCV_AIA_IMSIC_GET_ISEL(__attr) ((__attr) & KVM_DEV_RISCV_AIA_IMSIC_ISEL_MASK)
#define KVM_DEV_RISCV_AIA_IMSIC_GET_VCPU(__attr) ((__attr) >> KVM_DEV_RISCV_AIA_IMSIC_ISEL_BITS)
#define KVM_NR_IRQCHIPS 1
#endif
#endif

18
libc/kernel/uapi/asm-riscv/asm/ptrace.h
View file

@ -67,10 +67,28 @@ struct __riscv_q_ext_state {
__u32 fcsr;
__u32 reserved[3];
};
struct __riscv_ctx_hdr {
__u32 magic;
__u32 size;
};
struct __riscv_extra_ext_header {
__u32 __padding[129] __attribute__((aligned(16)));
__u32 reserved;
struct __riscv_ctx_hdr hdr;
};
union __riscv_fp_state {
struct __riscv_f_ext_state f;
struct __riscv_d_ext_state d;
struct __riscv_q_ext_state q;
};
struct __riscv_v_ext_state {
unsigned long vstart;
unsigned long vl;
unsigned long vtype;
unsigned long vcsr;
unsigned long vlenb;
void * datap;
};
#define RISCV_MAX_VLENB (8192)
#endif
#endif

13
libc/kernel/uapi/asm-riscv/asm/sigcontext.h
View file

@ -19,8 +19,19 @@
#ifndef _UAPI_ASM_RISCV_SIGCONTEXT_H
#define _UAPI_ASM_RISCV_SIGCONTEXT_H
#include <asm/ptrace.h>
#define RISCV_V_MAGIC 0x53465457
#define END_MAGIC 0x0
#define END_HDR_SIZE 0x0
#ifndef __ASSEMBLY__
struct __sc_riscv_v_state {
struct __riscv_v_ext_state v_state;
} __attribute__((aligned(16)));
struct sigcontext {
struct user_regs_struct sc_regs;
union __riscv_fp_state sc_fpregs;
union {
union __riscv_fp_state sc_fpregs;
struct __riscv_extra_ext_header sc_extdesc;
};
};
#endif
#endif

7
libc/kernel/uapi/asm-x86/asm/mtrr.h
View file

@ -57,13 +57,6 @@ struct mtrr_var_range {
typedef __u8 mtrr_type;
#define MTRR_NUM_FIXED_RANGES 88
#define MTRR_MAX_VAR_RANGES 256
struct mtrr_state_type {
struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES];
mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES];
unsigned char enabled;
unsigned char have_fixed;
mtrr_type def_type;
};
#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
#define MTRRIOC_ADD_ENTRY _IOW(MTRR_IOCTL_BASE, 0, struct mtrr_sentry)

1
libc/kernel/uapi/asm-x86/asm/unistd_32.h
View file

@ -458,4 +458,5 @@
#define __NR_process_mrelease 448
#define __NR_futex_waitv 449
#define __NR_set_mempolicy_home_node 450
#define __NR_cachestat 451
#endif

1
libc/kernel/uapi/asm-x86/asm/unistd_64.h
View file

@ -380,4 +380,5 @@
#define __NR_process_mrelease 448
#define __NR_futex_waitv 449
#define __NR_set_mempolicy_home_node 450
#define __NR_cachestat 451
#endif

1
libc/kernel/uapi/asm-x86/asm/unistd_x32.h
View file

@ -333,6 +333,7 @@
#define __NR_process_mrelease (__X32_SYSCALL_BIT + 448)
#define __NR_futex_waitv (__X32_SYSCALL_BIT + 449)
#define __NR_set_mempolicy_home_node (__X32_SYSCALL_BIT + 450)
#define __NR_cachestat (__X32_SYSCALL_BIT + 451)
#define __NR_rt_sigaction (__X32_SYSCALL_BIT + 512)
#define __NR_rt_sigreturn (__X32_SYSCALL_BIT + 513)
#define __NR_ioctl (__X32_SYSCALL_BIT + 514)

14
libc/kernel/uapi/drm/amdgpu_drm.h
View file

@ -126,6 +126,7 @@ union drm_amdgpu_bo_list {
#define AMDGPU_CTX_QUERY2_FLAGS_GUILTY (1 << 2)
#define AMDGPU_CTX_QUERY2_FLAGS_RAS_CE (1 << 3)
#define AMDGPU_CTX_QUERY2_FLAGS_RAS_UE (1 << 4)
#define AMDGPU_CTX_QUERY2_FLAGS_RESET_IN_PROGRESS (1 << 5)
#define AMDGPU_CTX_PRIORITY_UNSET - 2048
#define AMDGPU_CTX_PRIORITY_VERY_LOW - 1023
#define AMDGPU_CTX_PRIORITY_LOW - 512
@ -352,6 +353,7 @@ struct drm_amdgpu_gem_va {
#define AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES 0x07
#define AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_WAIT 0x08
#define AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_SIGNAL 0x09
#define AMDGPU_CHUNK_ID_CP_GFX_SHADOW 0x0a
struct drm_amdgpu_cs_chunk {
__u32 chunk_id;
__u32 length_dw;
@ -425,6 +427,13 @@ struct drm_amdgpu_cs_chunk_data {
struct drm_amdgpu_cs_chunk_fence fence_data;
};
};
#define AMDGPU_CS_CHUNK_CP_GFX_SHADOW_FLAGS_INIT_SHADOW 0x1
struct drm_amdgpu_cs_chunk_cp_gfx_shadow {
__u64 shadow_va;
__u64 csa_va;
__u64 gds_va;
__u64 flags;
};
#define AMDGPU_IDS_FLAGS_FUSION 0x1
#define AMDGPU_IDS_FLAGS_PREEMPTION 0x2
#define AMDGPU_IDS_FLAGS_TMZ 0x4
@ -509,6 +518,7 @@ struct drm_amdgpu_cs_chunk_data {
#define AMDGPU_INFO_VIDEO_CAPS 0x21
#define AMDGPU_INFO_VIDEO_CAPS_DECODE 0
#define AMDGPU_INFO_VIDEO_CAPS_ENCODE 1
#define AMDGPU_INFO_MAX_IBS 0x22
#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
#define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff
#define AMDGPU_INFO_MMR_SH_INDEX_SHIFT 8
@ -662,6 +672,10 @@ struct drm_amdgpu_info_device {
__u32 gl2c_cache_size;
__u64 mall_size;
__u32 enabled_rb_pipes_mask_hi;
__u32 shadow_size;
__u32 shadow_alignment;
__u32 csa_size;
__u32 csa_alignment;
};
struct drm_amdgpu_info_hw_ip {
__u32 hw_ip_version_major;

3
libc/kernel/uapi/drm/drm_fourcc.h
View file

@ -179,6 +179,9 @@ extern "C" {
#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS fourcc_mod_code(INTEL, 10)
#define I915_FORMAT_MOD_4_TILED_DG2_MC_CCS fourcc_mod_code(INTEL, 11)
#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC fourcc_mod_code(INTEL, 12)
#define I915_FORMAT_MOD_4_TILED_MTL_RC_CCS fourcc_mod_code(INTEL, 13)
#define I915_FORMAT_MOD_4_TILED_MTL_MC_CCS fourcc_mod_code(INTEL, 14)
#define I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC fourcc_mod_code(INTEL, 15)
#define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1)
#define DRM_FORMAT_MOD_SAMSUNG_16_16_TILE fourcc_mod_code(SAMSUNG, 2)
#define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1)

16
libc/kernel/uapi/drm/i915_drm.h
View file

@ -63,13 +63,20 @@ enum drm_i915_pmu_engine_sample {
#define I915_PMU_ENGINE_BUSY(class,instance) __I915_PMU_ENGINE(class, instance, I915_SAMPLE_BUSY)
#define I915_PMU_ENGINE_WAIT(class,instance) __I915_PMU_ENGINE(class, instance, I915_SAMPLE_WAIT)
#define I915_PMU_ENGINE_SEMA(class,instance) __I915_PMU_ENGINE(class, instance, I915_SAMPLE_SEMA)
#define __I915_PMU_OTHER(x) (__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x))
#define __I915_PMU_GT_SHIFT (60)
#define ___I915_PMU_OTHER(gt,x) (((__u64) __I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x)) | ((__u64) (gt) << __I915_PMU_GT_SHIFT))
#define __I915_PMU_OTHER(x) ___I915_PMU_OTHER(0, x)
#define I915_PMU_ACTUAL_FREQUENCY __I915_PMU_OTHER(0)
#define I915_PMU_REQUESTED_FREQUENCY __I915_PMU_OTHER(1)
#define I915_PMU_INTERRUPTS __I915_PMU_OTHER(2)
#define I915_PMU_RC6_RESIDENCY __I915_PMU_OTHER(3)
#define I915_PMU_SOFTWARE_GT_AWAKE_TIME __I915_PMU_OTHER(4)
#define I915_PMU_LAST I915_PMU_RC6_RESIDENCY
#define __I915_PMU_ACTUAL_FREQUENCY(gt) ___I915_PMU_OTHER(gt, 0)
#define __I915_PMU_REQUESTED_FREQUENCY(gt) ___I915_PMU_OTHER(gt, 1)
#define __I915_PMU_INTERRUPTS(gt) ___I915_PMU_OTHER(gt, 2)
#define __I915_PMU_RC6_RESIDENCY(gt) ___I915_PMU_OTHER(gt, 3)
#define __I915_PMU_SOFTWARE_GT_AWAKE_TIME(gt) ___I915_PMU_OTHER(gt, 4)
#define I915_NR_TEX_REGIONS 255
#define I915_LOG_MIN_TEX_REGION_SIZE 14
typedef struct _drm_i915_init {
@ -369,6 +376,7 @@ typedef struct drm_i915_irq_wait {
#define I915_PARAM_HAS_EXEC_TIMELINE_FENCES 55
#define I915_PARAM_HAS_USERPTR_PROBE 56
#define I915_PARAM_OA_TIMESTAMP_FREQUENCY 57
#define I915_PARAM_PXP_STATUS 58
struct drm_i915_getparam {
__s32 param;
int * value;
@ -987,6 +995,7 @@ struct drm_i915_gem_create_ext {
__u32 flags;
#define I915_GEM_CREATE_EXT_MEMORY_REGIONS 0
#define I915_GEM_CREATE_EXT_PROTECTED_CONTENT 1
#define I915_GEM_CREATE_EXT_SET_PAT 2
__u64 extensions;
};
struct drm_i915_gem_create_ext_memory_regions {
@ -999,6 +1008,11 @@ struct drm_i915_gem_create_ext_protected_content {
struct i915_user_extension base;
__u32 flags;
};
struct drm_i915_gem_create_ext_set_pat {
struct i915_user_extension base;
__u32 pat_index;
__u32 rsvd;
};
#define I915_PROTECTED_CONTENT_DEFAULT_SESSION 0xf
#ifdef __cplusplus
}

68
libc/kernel/uapi/linux/affs_hardblocks.h
View file

@ -20,57 +20,57 @@
#define AFFS_HARDBLOCKS_H
#include <linux/types.h>
struct RigidDiskBlock {
__u32 rdb_ID;
__be32 rdb_ID;
__be32 rdb_SummedLongs;
__s32 rdb_ChkSum;
__u32 rdb_HostID;
__be32 rdb_ChkSum;
__be32 rdb_HostID;
__be32 rdb_BlockBytes;
__u32 rdb_Flags;
__u32 rdb_BadBlockList;
__be32 rdb_Flags;
__be32 rdb_BadBlockList;
__be32 rdb_PartitionList;
__u32 rdb_FileSysHeaderList;
__u32 rdb_DriveInit;
__u32 rdb_Reserved1[6];
__u32 rdb_Cylinders;
__u32 rdb_Sectors;
__u32 rdb_Heads;
__u32 rdb_Interleave;
__u32 rdb_Park;
__u32 rdb_Reserved2[3];
__u32 rdb_WritePreComp;
__u32 rdb_ReducedWrite;
__u32 rdb_StepRate;
__u32 rdb_Reserved3[5];
__u32 rdb_RDBBlocksLo;
__u32 rdb_RDBBlocksHi;
__u32 rdb_LoCylinder;
__u32 rdb_HiCylinder;
__u32 rdb_CylBlocks;
__u32 rdb_AutoParkSeconds;
__u32 rdb_HighRDSKBlock;
__u32 rdb_Reserved4;
__be32 rdb_FileSysHeaderList;
__be32 rdb_DriveInit;
__be32 rdb_Reserved1[6];
__be32 rdb_Cylinders;
__be32 rdb_Sectors;
__be32 rdb_Heads;
__be32 rdb_Interleave;
__be32 rdb_Park;
__be32 rdb_Reserved2[3];
__be32 rdb_WritePreComp;
__be32 rdb_ReducedWrite;
__be32 rdb_StepRate;
__be32 rdb_Reserved3[5];
__be32 rdb_RDBBlocksLo;
__be32 rdb_RDBBlocksHi;
__be32 rdb_LoCylinder;
__be32 rdb_HiCylinder;
__be32 rdb_CylBlocks;
__be32 rdb_AutoParkSeconds;
__be32 rdb_HighRDSKBlock;
__be32 rdb_Reserved4;
char rdb_DiskVendor[8];
char rdb_DiskProduct[16];
char rdb_DiskRevision[4];
char rdb_ControllerVendor[8];
char rdb_ControllerProduct[16];
char rdb_ControllerRevision[4];
__u32 rdb_Reserved5[10];
__be32 rdb_Reserved5[10];
};
#define IDNAME_RIGIDDISK 0x5244534B
struct PartitionBlock {
__be32 pb_ID;
__be32 pb_SummedLongs;
__s32 pb_ChkSum;
__u32 pb_HostID;
__be32 pb_ChkSum;
__be32 pb_HostID;
__be32 pb_Next;
__u32 pb_Flags;
__u32 pb_Reserved1[2];
__u32 pb_DevFlags;
__be32 pb_Flags;
__be32 pb_Reserved1[2];
__be32 pb_DevFlags;
__u8 pb_DriveName[32];
__u32 pb_Reserved2[15];
__be32 pb_Reserved2[15];
__be32 pb_Environment[17];
__u32 pb_EReserved[15];
__be32 pb_EReserved[15];
};
#define IDNAME_PARTITION 0x50415254
#define RDB_ALLOCATION_LIMIT 16

2
libc/kernel/uapi/linux/auto_dev-ioctl.h
View file

@ -85,7 +85,7 @@ struct autofs_dev_ioctl {
struct args_askumount askumount;
struct args_ismountpoint ismountpoint;
};
char path[0];
char path[];
};
enum {
AUTOFS_DEV_IOCTL_VERSION_CMD = 0x71,

12
libc/kernel/uapi/linux/bpf.h
View file

@ -310,6 +310,7 @@ enum {
BPF_F_PRESERVE_ELEMS = (1U << 11),
BPF_F_INNER_MAP = (1U << 12),
BPF_F_LINK = (1U << 13),
BPF_F_PATH_FD = (1U << 14),
};
#define BPF_F_QUERY_EFFECTIVE (1U << 0)
#define BPF_F_TEST_RUN_ON_CPU (1U << 0)
@ -403,6 +404,7 @@ union bpf_attr {
__aligned_u64 pathname;
__u32 bpf_fd;
__u32 file_flags;
__s32 path_fd;
};
struct {
__u32 target_fd;
@ -1131,6 +1133,7 @@ enum {
BPF_FIB_LOOKUP_DIRECT = (1U << 0),
BPF_FIB_LOOKUP_OUTPUT = (1U << 1),
BPF_FIB_LOOKUP_SKIP_NEIGH = (1U << 2),
BPF_FIB_LOOKUP_TBID = (1U << 3),
};
enum {
BPF_FIB_LKUP_RET_SUCCESS,
@ -1166,8 +1169,13 @@ struct bpf_fib_lookup {
__be32 ipv4_dst;
__u32 ipv6_dst[4];
};
__be16 h_vlan_proto;
__be16 h_vlan_TCI;
union {
struct {
__be16 h_vlan_proto;
__be16 h_vlan_TCI;
};
__u32 tbid;
};
__u8 smac[6];
__u8 dmac[6];
};

1
libc/kernel/uapi/linux/can.h
View file

@ -109,5 +109,4 @@ struct can_filter {
canid_t can_mask;
};
#define CAN_INV_FILTER 0x20000000U
#define CAN_RAW_FILTER_MAX 512
#endif

1
libc/kernel/uapi/linux/can/raw.h
View file

@ -20,6 +20,7 @@
#define _UAPI_CAN_RAW_H
#include <linux/can.h>
#define SOL_CAN_RAW (SOL_CAN_BASE + CAN_RAW)
#define CAN_RAW_FILTER_MAX 512
enum {
SCM_CAN_RAW_ERRQUEUE = 1,
};

5
libc/kernel/uapi/linux/capability.h
View file

@ -29,11 +29,12 @@ typedef struct __user_cap_header_struct {
__u32 version;
int pid;
} * cap_user_header_t;
typedef struct __user_cap_data_struct {
struct __user_cap_data_struct {
__u32 effective;
__u32 permitted;
__u32 inheritable;
} * cap_user_data_t;
};
typedef struct __user_cap_data_struct * cap_user_data_t;
#define VFS_CAP_REVISION_MASK 0xFF000000
#define VFS_CAP_REVISION_SHIFT 24
#define VFS_CAP_FLAGS_MASK ~VFS_CAP_REVISION_MASK

6
libc/kernel/uapi/linux/counter.h
View file

@ -71,6 +71,12 @@ enum counter_count_mode {
COUNTER_COUNT_MODE_RANGE_LIMIT,
COUNTER_COUNT_MODE_NON_RECYCLE,
COUNTER_COUNT_MODE_MODULO_N,
COUNTER_COUNT_MODE_INTERRUPT_ON_TERMINAL_COUNT,
COUNTER_COUNT_MODE_HARDWARE_RETRIGGERABLE_ONESHOT,
COUNTER_COUNT_MODE_RATE_GENERATOR,
COUNTER_COUNT_MODE_SQUARE_WAVE_MODE,
COUNTER_COUNT_MODE_SOFTWARE_TRIGGERED_STROBE,
COUNTER_COUNT_MODE_HARDWARE_TRIGGERED_STROBE,
};
enum counter_function {
COUNTER_FUNCTION_INCREASE,

4
libc/kernel/uapi/linux/dvb/frontend.h
View file

@ -138,6 +138,10 @@ enum fe_code_rate {
FEC_28_45,
FEC_32_45,
FEC_77_90,
FEC_11_45,
FEC_4_15,
FEC_14_45,
FEC_7_15,
};
enum fe_modulation {
QPSK,

2
libc/kernel/uapi/linux/dvb/version.h
View file

@ -19,5 +19,5 @@
#ifndef _DVBVERSION_H_
#define _DVBVERSION_H_
#define DVB_API_VERSION 5
#define DVB_API_VERSION_MINOR 11
#define DVB_API_VERSION_MINOR 12
#endif

2
libc/kernel/uapi/linux/elf.h
View file

@ -335,6 +335,8 @@ typedef struct elf64_shdr {
#define NT_PPC_TM_CPPR 0x10e
#define NT_PPC_TM_CDSCR 0x10f
#define NT_PPC_PKEY 0x110
#define NT_PPC_DEXCR 0x111
#define NT_PPC_HASHKEYR 0x112
#define NT_386_TLS 0x200
#define NT_386_IOPERM 0x201
#define NT_X86_XSTATE 0x202

25
libc/kernel/uapi/linux/eventfd.h Normal file
View file

@ -0,0 +1,25 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _UAPI_LINUX_EVENTFD_H
#define _UAPI_LINUX_EVENTFD_H
#include <linux/fcntl.h>
#define EFD_SEMAPHORE (1 << 0)
#define EFD_CLOEXEC O_CLOEXEC
#define EFD_NONBLOCK O_NONBLOCK
#endif

1
libc/kernel/uapi/linux/fcntl.h
View file

@ -65,4 +65,5 @@
#define AT_STATX_FORCE_SYNC 0x2000
#define AT_STATX_DONT_SYNC 0x4000
#define AT_RECURSIVE 0x8000
#define AT_HANDLE_FID AT_REMOVEDIR
#endif

40
libc/kernel/uapi/linux/firewire-cdev.h
View file

@ -31,6 +31,10 @@
#define FW_CDEV_EVENT_PHY_PACKET_SENT 0x07
#define FW_CDEV_EVENT_PHY_PACKET_RECEIVED 0x08
#define FW_CDEV_EVENT_ISO_INTERRUPT_MULTICHANNEL 0x09
#define FW_CDEV_EVENT_REQUEST3 0x0a
#define FW_CDEV_EVENT_RESPONSE2 0x0b
#define FW_CDEV_EVENT_PHY_PACKET_SENT2 0x0c
#define FW_CDEV_EVENT_PHY_PACKET_RECEIVED2 0x0d
struct fw_cdev_event_common {
__u64 closure;
__u32 type;
@ -52,6 +56,16 @@ struct fw_cdev_event_response {
__u32 length;
__u32 data[];
};
struct fw_cdev_event_response2 {
__u64 closure;
__u32 type;
__u32 rcode;
__u32 length;
__u32 request_tstamp;
__u32 response_tstamp;
__u32 padding;
__u32 data[];
};
struct fw_cdev_event_request {
__u64 closure;
__u32 type;
@ -74,6 +88,21 @@ struct fw_cdev_event_request2 {
__u32 length;
__u32 data[];
};
struct fw_cdev_event_request3 {
__u64 closure;
__u32 type;
__u32 tcode;
__u64 offset;
__u32 source_node_id;
__u32 destination_node_id;
__u32 card;
__u32 generation;
__u32 handle;
__u32 length;
__u32 tstamp;
__u32 padding;
__u32 data[];
};
struct fw_cdev_event_iso_interrupt {
__u64 closure;
__u32 type;
@ -100,6 +129,14 @@ struct fw_cdev_event_phy_packet {
__u32 length;
__u32 data[];
};
struct fw_cdev_event_phy_packet2 {
__u64 closure;
__u32 type;
__u32 rcode;
__u32 length;
__u32 tstamp;
__u32 data[];
};
union fw_cdev_event {
struct fw_cdev_event_common common;
struct fw_cdev_event_bus_reset bus_reset;
@ -110,6 +147,9 @@ union fw_cdev_event {
struct fw_cdev_event_iso_interrupt_mc iso_interrupt_mc;
struct fw_cdev_event_iso_resource iso_resource;
struct fw_cdev_event_phy_packet phy_packet;
struct fw_cdev_event_request3 request3;
struct fw_cdev_event_response2 response2;
struct fw_cdev_event_phy_packet2 phy_packet2;
};
#define FW_CDEV_IOC_GET_INFO _IOWR('#', 0x00, struct fw_cdev_get_info)
#define FW_CDEV_IOC_SEND_REQUEST _IOW('#', 0x01, struct fw_cdev_send_request)

1
libc/kernel/uapi/linux/fuse.h
View file

@ -112,6 +112,7 @@ struct fuse_file_lock {
#define FUSE_SECURITY_CTX (1ULL << 32)
#define FUSE_HAS_INODE_DAX (1ULL << 33)
#define FUSE_CREATE_SUPP_GROUP (1ULL << 34)
#define FUSE_HAS_EXPIRE_ONLY (1ULL << 35)
#if FUSE_KERNEL_VERSION > 7 || FUSE_KERNEL_VERSION == 7 && FUSE_KERNEL_MINOR_VERSION >= 36
#define FUSE_PASSTHROUGH (1ULL << 63)
#else

1
libc/kernel/uapi/linux/if_link.h
View file

@ -523,6 +523,7 @@ enum {
IFLA_VXLAN_TTL_INHERIT,
IFLA_VXLAN_DF,
IFLA_VXLAN_VNIFILTER,
IFLA_VXLAN_LOCALBYPASS,
__IFLA_VXLAN_MAX
};
#define IFLA_VXLAN_MAX (__IFLA_VXLAN_MAX - 1)

5
libc/kernel/uapi/linux/if_packet.h
View file

@ -32,7 +32,10 @@ struct sockaddr_ll {
unsigned short sll_hatype;
unsigned char sll_pkttype;
unsigned char sll_halen;
unsigned char sll_addr[8];
union {
unsigned char sll_addr[8];
__DECLARE_FLEX_ARRAY(unsigned char, sll_addr_flex);
};
};
#define PACKET_HOST 0
#define PACKET_BROADCAST 1

7
libc/kernel/uapi/linux/io_uring.h
View file

@ -118,6 +118,8 @@ enum {
#define IORING_SETUP_CQE32 (1U << 11)
#define IORING_SETUP_SINGLE_ISSUER (1U << 12)
#define IORING_SETUP_DEFER_TASKRUN (1U << 13)
#define IORING_SETUP_NO_MMAP (1U << 14)
#define IORING_SETUP_REGISTERED_FD_ONLY (1U << 15)
enum io_uring_op {
IORING_OP_NOP,
IORING_OP_READV,
@ -171,6 +173,7 @@ enum io_uring_op {
IORING_OP_LAST,
};
#define IORING_URING_CMD_FIXED (1U << 0)
#define IORING_URING_CMD_POLLED (1U << 31)
#define IORING_FSYNC_DATASYNC (1U << 0)
#define IORING_TIMEOUT_ABS (1U << 0)
#define IORING_TIMEOUT_UPDATE (1U << 1)
@ -230,7 +233,7 @@ struct io_sqring_offsets {
__u32 dropped;
__u32 array;
__u32 resv1;
__u64 resv2;
__u64 user_addr;
};
#define IORING_SQ_NEED_WAKEUP (1U << 0)
#define IORING_SQ_CQ_OVERFLOW (1U << 1)
@ -244,7 +247,7 @@ struct io_cqring_offsets {
__u32 cqes;
__u32 flags;
__u32 resv1;
__u64 resv2;
__u64 user_addr;
};
#define IORING_CQ_EVENTFD_DISABLED (1U << 0)
#define IORING_ENTER_GETEVENTS (1U << 0)

38
libc/kernel/uapi/linux/ioprio.h
View file

@ -18,19 +18,25 @@
****************************************************************************/
#ifndef _UAPI_LINUX_IOPRIO_H
#define _UAPI_LINUX_IOPRIO_H
#include <linux/stddef.h>
#include <linux/types.h>
#define IOPRIO_CLASS_SHIFT 13
#define IOPRIO_CLASS_MASK 0x07
#define IOPRIO_NR_CLASSES 8
#define IOPRIO_CLASS_MASK (IOPRIO_NR_CLASSES - 1)
#define IOPRIO_PRIO_MASK ((1UL << IOPRIO_CLASS_SHIFT) - 1)
#define IOPRIO_PRIO_CLASS(ioprio) (((ioprio) >> IOPRIO_CLASS_SHIFT) & IOPRIO_CLASS_MASK)
#define IOPRIO_PRIO_DATA(ioprio) ((ioprio) & IOPRIO_PRIO_MASK)
#define IOPRIO_PRIO_VALUE(class,data) ((((class) & IOPRIO_CLASS_MASK) << IOPRIO_CLASS_SHIFT) | ((data) & IOPRIO_PRIO_MASK))
enum {
IOPRIO_CLASS_NONE,
IOPRIO_CLASS_RT,
IOPRIO_CLASS_BE,
IOPRIO_CLASS_IDLE,
IOPRIO_CLASS_NONE = 0,
IOPRIO_CLASS_RT = 1,
IOPRIO_CLASS_BE = 2,
IOPRIO_CLASS_IDLE = 3,
IOPRIO_CLASS_INVALID = 7,
};
#define IOPRIO_NR_LEVELS 8
#define IOPRIO_LEVEL_NR_BITS 3
#define IOPRIO_NR_LEVELS (1 << IOPRIO_LEVEL_NR_BITS)
#define IOPRIO_LEVEL_MASK (IOPRIO_NR_LEVELS - 1)
#define IOPRIO_PRIO_LEVEL(ioprio) ((ioprio) & IOPRIO_LEVEL_MASK)
#define IOPRIO_BE_NR IOPRIO_NR_LEVELS
enum {
IOPRIO_WHO_PROCESS = 1,
@ -39,4 +45,22 @@ enum {
};
#define IOPRIO_NORM 4
#define IOPRIO_BE_NORM IOPRIO_NORM
#define IOPRIO_HINT_SHIFT IOPRIO_LEVEL_NR_BITS
#define IOPRIO_HINT_NR_BITS 10
#define IOPRIO_NR_HINTS (1 << IOPRIO_HINT_NR_BITS)
#define IOPRIO_HINT_MASK (IOPRIO_NR_HINTS - 1)
#define IOPRIO_PRIO_HINT(ioprio) (((ioprio) >> IOPRIO_HINT_SHIFT) & IOPRIO_HINT_MASK)
enum {
IOPRIO_HINT_NONE = 0,
IOPRIO_HINT_DEV_DURATION_LIMIT_1 = 1,
IOPRIO_HINT_DEV_DURATION_LIMIT_2 = 2,
IOPRIO_HINT_DEV_DURATION_LIMIT_3 = 3,
IOPRIO_HINT_DEV_DURATION_LIMIT_4 = 4,
IOPRIO_HINT_DEV_DURATION_LIMIT_5 = 5,
IOPRIO_HINT_DEV_DURATION_LIMIT_6 = 6,
IOPRIO_HINT_DEV_DURATION_LIMIT_7 = 7,
};
#define IOPRIO_BAD_VALUE(val,max) ((val) < 0 || (val) >= (max))
#define IOPRIO_PRIO_VALUE(class,level) ioprio_value(class, level, IOPRIO_HINT_NONE)
#define IOPRIO_PRIO_VALUE_HINT(class,level,hint) ioprio_value(class, level, hint)
#endif

259
libc/kernel/uapi/linux/kfd_ioctl.h
View file

@ -21,7 +21,7 @@
#include <drm/drm.h>
#include <linux/ioctl.h>
#define KFD_IOCTL_MAJOR_VERSION 1
#define KFD_IOCTL_MINOR_VERSION 12
#define KFD_IOCTL_MINOR_VERSION 14
struct kfd_ioctl_get_version_args {
__u32 major_version;
__u32 minor_version;
@ -77,6 +77,31 @@ struct kfd_ioctl_get_available_memory_args {
__u32 gpu_id;
__u32 pad;
};
struct kfd_dbg_device_info_entry {
__u64 exception_status;
__u64 lds_base;
__u64 lds_limit;
__u64 scratch_base;
__u64 scratch_limit;
__u64 gpuvm_base;
__u64 gpuvm_limit;
__u32 gpu_id;
__u32 location_id;
__u32 vendor_id;
__u32 device_id;
__u32 revision_id;
__u32 subsystem_vendor_id;
__u32 subsystem_device_id;
__u32 fw_version;
__u32 gfx_target_version;
__u32 simd_count;
__u32 max_waves_per_simd;
__u32 array_count;
__u32 simd_arrays_per_engine;
__u32 num_xcc;
__u32 capability;
__u32 debug_prop;
};
#define KFD_IOC_CACHE_POLICY_COHERENT 0
#define KFD_IOC_CACHE_POLICY_NONCOHERENT 1
struct kfd_ioctl_set_memory_policy_args {
@ -198,10 +223,14 @@ struct kfd_hsa_hw_exception_data {
__u32 memory_lost;
__u32 gpu_id;
};
struct kfd_hsa_signal_event_data {
__u64 last_event_age;
};
struct kfd_event_data {
union {
struct kfd_hsa_memory_exception_data memory_exception_data;
struct kfd_hsa_hw_exception_data hw_exception_data;
struct kfd_hsa_signal_event_data signal_event_data;
};
__u64 kfd_event_data_ext;
__u32 event_id;
@ -416,6 +445,230 @@ struct kfd_ioctl_svm_args {
struct kfd_ioctl_set_xnack_mode_args {
__s32 xnack_enabled;
};
enum kfd_dbg_trap_override_mode {
KFD_DBG_TRAP_OVERRIDE_OR = 0,
KFD_DBG_TRAP_OVERRIDE_REPLACE = 1
};
enum kfd_dbg_trap_mask {
KFD_DBG_TRAP_MASK_FP_INVALID = 1,
KFD_DBG_TRAP_MASK_FP_INPUT_DENORMAL = 2,
KFD_DBG_TRAP_MASK_FP_DIVIDE_BY_ZERO = 4,
KFD_DBG_TRAP_MASK_FP_OVERFLOW = 8,
KFD_DBG_TRAP_MASK_FP_UNDERFLOW = 16,
KFD_DBG_TRAP_MASK_FP_INEXACT = 32,
KFD_DBG_TRAP_MASK_INT_DIVIDE_BY_ZERO = 64,
KFD_DBG_TRAP_MASK_DBG_ADDRESS_WATCH = 128,
KFD_DBG_TRAP_MASK_DBG_MEMORY_VIOLATION = 256,
KFD_DBG_TRAP_MASK_TRAP_ON_WAVE_START = (1 << 30),
KFD_DBG_TRAP_MASK_TRAP_ON_WAVE_END = (1 << 31)
};
enum kfd_dbg_trap_wave_launch_mode {
KFD_DBG_TRAP_WAVE_LAUNCH_MODE_NORMAL = 0,
KFD_DBG_TRAP_WAVE_LAUNCH_MODE_HALT = 1,
KFD_DBG_TRAP_WAVE_LAUNCH_MODE_DEBUG = 3
};
enum kfd_dbg_trap_address_watch_mode {
KFD_DBG_TRAP_ADDRESS_WATCH_MODE_READ = 0,
KFD_DBG_TRAP_ADDRESS_WATCH_MODE_NONREAD = 1,
KFD_DBG_TRAP_ADDRESS_WATCH_MODE_ATOMIC = 2,
KFD_DBG_TRAP_ADDRESS_WATCH_MODE_ALL = 3
};
enum kfd_dbg_trap_flags {
KFD_DBG_TRAP_FLAG_SINGLE_MEM_OP = 1,
};
enum kfd_dbg_trap_exception_code {
EC_NONE = 0,
EC_QUEUE_WAVE_ABORT = 1,
EC_QUEUE_WAVE_TRAP = 2,
EC_QUEUE_WAVE_MATH_ERROR = 3,
EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION = 4,
EC_QUEUE_WAVE_MEMORY_VIOLATION = 5,
EC_QUEUE_WAVE_APERTURE_VIOLATION = 6,
EC_QUEUE_PACKET_DISPATCH_DIM_INVALID = 16,
EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID = 17,
EC_QUEUE_PACKET_DISPATCH_CODE_INVALID = 18,
EC_QUEUE_PACKET_RESERVED = 19,
EC_QUEUE_PACKET_UNSUPPORTED = 20,
EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID = 21,
EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID = 22,
EC_QUEUE_PACKET_VENDOR_UNSUPPORTED = 23,
EC_QUEUE_PREEMPTION_ERROR = 30,
EC_QUEUE_NEW = 31,
EC_DEVICE_QUEUE_DELETE = 32,
EC_DEVICE_MEMORY_VIOLATION = 33,
EC_DEVICE_RAS_ERROR = 34,
EC_DEVICE_FATAL_HALT = 35,
EC_DEVICE_NEW = 36,
EC_PROCESS_RUNTIME = 48,
EC_PROCESS_DEVICE_REMOVE = 49,
EC_MAX
};
#define KFD_EC_MASK(ecode) (1ULL << (ecode - 1))
#define KFD_EC_MASK_QUEUE (KFD_EC_MASK(EC_QUEUE_WAVE_ABORT) | KFD_EC_MASK(EC_QUEUE_WAVE_TRAP) | KFD_EC_MASK(EC_QUEUE_WAVE_MATH_ERROR) | KFD_EC_MASK(EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION) | KFD_EC_MASK(EC_QUEUE_WAVE_MEMORY_VIOLATION) | KFD_EC_MASK(EC_QUEUE_WAVE_APERTURE_VIOLATION) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_DIM_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_CODE_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_RESERVED) | KFD_EC_MASK(EC_QUEUE_PACKET_UNSUPPORTED) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_VENDOR_UNSUPPORTED) | KFD_EC_MASK(EC_QUEUE_PREEMPTION_ERROR) | KFD_EC_MASK(EC_QUEUE_NEW))
#define KFD_EC_MASK_DEVICE (KFD_EC_MASK(EC_DEVICE_QUEUE_DELETE) | KFD_EC_MASK(EC_DEVICE_RAS_ERROR) | KFD_EC_MASK(EC_DEVICE_FATAL_HALT) | KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION) | KFD_EC_MASK(EC_DEVICE_NEW))
#define KFD_EC_MASK_PROCESS (KFD_EC_MASK(EC_PROCESS_RUNTIME) | KFD_EC_MASK(EC_PROCESS_DEVICE_REMOVE))
#define KFD_DBG_EC_TYPE_IS_QUEUE(ecode) (! ! (KFD_EC_MASK(ecode) & KFD_EC_MASK_QUEUE))
#define KFD_DBG_EC_TYPE_IS_DEVICE(ecode) (! ! (KFD_EC_MASK(ecode) & KFD_EC_MASK_DEVICE))
#define KFD_DBG_EC_TYPE_IS_PROCESS(ecode) (! ! (KFD_EC_MASK(ecode) & KFD_EC_MASK_PROCESS))
enum kfd_dbg_runtime_state {
DEBUG_RUNTIME_STATE_DISABLED = 0,
DEBUG_RUNTIME_STATE_ENABLED = 1,
DEBUG_RUNTIME_STATE_ENABLED_BUSY = 2,
DEBUG_RUNTIME_STATE_ENABLED_ERROR = 3
};
struct kfd_runtime_info {
__u64 r_debug;
__u32 runtime_state;
__u32 ttmp_setup;
};
#define KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK 1
#define KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK 2
struct kfd_ioctl_runtime_enable_args {
__u64 r_debug;
__u32 mode_mask;
__u32 capabilities_mask;
};
struct kfd_queue_snapshot_entry {
__u64 exception_status;
__u64 ring_base_address;
__u64 write_pointer_address;
__u64 read_pointer_address;
__u64 ctx_save_restore_address;
__u32 queue_id;
__u32 gpu_id;
__u32 ring_size;
__u32 queue_type;
__u32 ctx_save_restore_area_size;
__u32 reserved;
};
#define KFD_DBG_QUEUE_ERROR_BIT 30
#define KFD_DBG_QUEUE_INVALID_BIT 31
#define KFD_DBG_QUEUE_ERROR_MASK (1 << KFD_DBG_QUEUE_ERROR_BIT)
#define KFD_DBG_QUEUE_INVALID_MASK (1 << KFD_DBG_QUEUE_INVALID_BIT)
struct kfd_context_save_area_header {
struct {
__u32 control_stack_offset;
__u32 control_stack_size;
__u32 wave_state_offset;
__u32 wave_state_size;
} wave_state;
__u32 debug_offset;
__u32 debug_size;
__u64 err_payload_addr;
__u32 err_event_id;
__u32 reserved1;
};
enum kfd_dbg_trap_operations {
KFD_IOC_DBG_TRAP_ENABLE = 0,
KFD_IOC_DBG_TRAP_DISABLE = 1,
KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT = 2,
KFD_IOC_DBG_TRAP_SET_EXCEPTIONS_ENABLED = 3,
KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE = 4,
KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE = 5,
KFD_IOC_DBG_TRAP_SUSPEND_QUEUES = 6,
KFD_IOC_DBG_TRAP_RESUME_QUEUES = 7,
KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH = 8,
KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH = 9,
KFD_IOC_DBG_TRAP_SET_FLAGS = 10,
KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT = 11,
KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO = 12,
KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT = 13,
KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT = 14
};
struct kfd_ioctl_dbg_trap_enable_args {
__u64 exception_mask;
__u64 rinfo_ptr;
__u32 rinfo_size;
__u32 dbg_fd;
};
struct kfd_ioctl_dbg_trap_send_runtime_event_args {
__u64 exception_mask;
__u32 gpu_id;
__u32 queue_id;
};
struct kfd_ioctl_dbg_trap_set_exceptions_enabled_args {
__u64 exception_mask;
};
struct kfd_ioctl_dbg_trap_set_wave_launch_override_args {
__u32 override_mode;
__u32 enable_mask;
__u32 support_request_mask;
__u32 pad;
};
struct kfd_ioctl_dbg_trap_set_wave_launch_mode_args {
__u32 launch_mode;
__u32 pad;
};
struct kfd_ioctl_dbg_trap_suspend_queues_args {
__u64 exception_mask;
__u64 queue_array_ptr;
__u32 num_queues;
__u32 grace_period;
};
struct kfd_ioctl_dbg_trap_resume_queues_args {
__u64 queue_array_ptr;
__u32 num_queues;
__u32 pad;
};
struct kfd_ioctl_dbg_trap_set_node_address_watch_args {
__u64 address;
__u32 mode;
__u32 mask;
__u32 gpu_id;
__u32 id;
};
struct kfd_ioctl_dbg_trap_clear_node_address_watch_args {
__u32 gpu_id;
__u32 id;
};
struct kfd_ioctl_dbg_trap_set_flags_args {
__u32 flags;
__u32 pad;
};
struct kfd_ioctl_dbg_trap_query_debug_event_args {
__u64 exception_mask;
__u32 gpu_id;
__u32 queue_id;
};
struct kfd_ioctl_dbg_trap_query_exception_info_args {
__u64 info_ptr;
__u32 info_size;
__u32 source_id;
__u32 exception_code;
__u32 clear_exception;
};
struct kfd_ioctl_dbg_trap_queue_snapshot_args {
__u64 exception_mask;
__u64 snapshot_buf_ptr;
__u32 num_queues;
__u32 entry_size;
};
struct kfd_ioctl_dbg_trap_device_snapshot_args {
__u64 exception_mask;
__u64 snapshot_buf_ptr;
__u32 num_devices;
__u32 entry_size;
};
struct kfd_ioctl_dbg_trap_args {
__u32 pid;
__u32 op;
union {
struct kfd_ioctl_dbg_trap_enable_args enable;
struct kfd_ioctl_dbg_trap_send_runtime_event_args send_runtime_event;
struct kfd_ioctl_dbg_trap_set_exceptions_enabled_args set_exceptions_enabled;
struct kfd_ioctl_dbg_trap_set_wave_launch_override_args launch_override;
struct kfd_ioctl_dbg_trap_set_wave_launch_mode_args launch_mode;
struct kfd_ioctl_dbg_trap_suspend_queues_args suspend_queues;
struct kfd_ioctl_dbg_trap_resume_queues_args resume_queues;
struct kfd_ioctl_dbg_trap_set_node_address_watch_args set_node_address_watch;
struct kfd_ioctl_dbg_trap_clear_node_address_watch_args clear_node_address_watch;
struct kfd_ioctl_dbg_trap_set_flags_args set_flags;
struct kfd_ioctl_dbg_trap_query_debug_event_args query_debug_event;
struct kfd_ioctl_dbg_trap_query_exception_info_args query_exception_info;
struct kfd_ioctl_dbg_trap_queue_snapshot_args queue_snapshot;
struct kfd_ioctl_dbg_trap_device_snapshot_args device_snapshot;
};
};
#define AMDKFD_IOCTL_BASE 'K'
#define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr)
#define AMDKFD_IOR(nr,type) _IOR(AMDKFD_IOCTL_BASE, nr, type)
@ -457,6 +710,8 @@ struct kfd_ioctl_set_xnack_mode_args {
#define AMDKFD_IOC_CRIU_OP AMDKFD_IOWR(0x22, struct kfd_ioctl_criu_args)
#define AMDKFD_IOC_AVAILABLE_MEMORY AMDKFD_IOWR(0x23, struct kfd_ioctl_get_available_memory_args)
#define AMDKFD_IOC_EXPORT_DMABUF AMDKFD_IOWR(0x24, struct kfd_ioctl_export_dmabuf_args)
#define AMDKFD_IOC_RUNTIME_ENABLE AMDKFD_IOWR(0x25, struct kfd_ioctl_runtime_enable_args)
#define AMDKFD_IOC_DBG_TRAP AMDKFD_IOWR(0x26, struct kfd_ioctl_dbg_trap_args)
#define AMDKFD_COMMAND_START 0x01
#define AMDKFD_COMMAND_END 0x25
#define AMDKFD_COMMAND_END 0x27
#endif

12
libc/kernel/uapi/linux/kfd_sysfs.h
View file

@ -34,6 +34,10 @@
#define HSA_CAP_DOORBELL_TYPE_1_0 0x1
#define HSA_CAP_DOORBELL_TYPE_2_0 0x2
#define HSA_CAP_AQL_QUEUE_DOUBLE_MAP 0x00004000
#define HSA_CAP_TRAP_DEBUG_SUPPORT 0x00008000
#define HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_TRAP_OVERRIDE_SUPPORTED 0x00010000
#define HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_MODE_SUPPORTED 0x00020000
#define HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED 0x00040000
#define HSA_CAP_RESERVED_WAS_SRAM_EDCSUPPORTED 0x00080000
#define HSA_CAP_MEM_EDCSUPPORTED 0x00100000
#define HSA_CAP_RASEVENTNOTIFY 0x00200000
@ -42,7 +46,15 @@
#define HSA_CAP_SRAM_EDCSUPPORTED 0x04000000
#define HSA_CAP_SVMAPI_SUPPORTED 0x08000000
#define HSA_CAP_FLAGS_COHERENTHOSTACCESS 0x10000000
#define HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED 0x20000000
#define HSA_CAP_RESERVED 0xe00f8000
#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_MASK 0x0000000f
#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_SHIFT 0
#define HSA_DBG_WATCH_ADDR_MASK_HI_BIT_MASK 0x000003f0
#define HSA_DBG_WATCH_ADDR_MASK_HI_BIT_SHIFT 4
#define HSA_DBG_DISPATCH_INFO_ALWAYS_VALID 0x00000400
#define HSA_DBG_WATCHPOINTS_EXCLUSIVE 0x00000800
#define HSA_DBG_RESERVED 0xfffffffffffff000ull
#define HSA_MEM_HEAP_TYPE_SYSTEM 0
#define HSA_MEM_HEAP_TYPE_FB_PUBLIC 1
#define HSA_MEM_HEAP_TYPE_FB_PRIVATE 2

4
libc/kernel/uapi/linux/kvm.h
View file

@ -935,6 +935,8 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_DIRTY_LOG_RING_WITH_BITMAP 225
#define KVM_CAP_PMU_EVENT_MASKED_EVENTS 226
#define KVM_CAP_COUNTER_OFFSET 227
#define KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE 228
#define KVM_CAP_ARM_SUPPORTED_BLOCK_SIZES 229
#ifdef KVM_CAP_IRQ_ROUTING
struct kvm_irq_routing_irqchip {
__u32 irqchip;
@ -1131,6 +1133,8 @@ enum kvm_device_type {
#define KVM_DEV_TYPE_XIVE KVM_DEV_TYPE_XIVE
KVM_DEV_TYPE_ARM_PV_TIME,
#define KVM_DEV_TYPE_ARM_PV_TIME KVM_DEV_TYPE_ARM_PV_TIME
KVM_DEV_TYPE_RISCV_AIA,
#define KVM_DEV_TYPE_RISCV_AIA KVM_DEV_TYPE_RISCV_AIA
KVM_DEV_TYPE_MAX,
};
struct kvm_vfio_spapr_tce {

22
libc/kernel/uapi/linux/mdio.h
View file

@ -202,6 +202,28 @@
#define MDIO_PMA_EXTABLE_10BT 0x0100
#define MDIO_PMA_EXTABLE_BT1 0x0800
#define MDIO_PMA_EXTABLE_NBT 0x4000
#define MDIO_AN_C73_0_S_MASK GENMASK(4, 0)
#define MDIO_AN_C73_0_E_MASK GENMASK(9, 5)
#define MDIO_AN_C73_0_PAUSE BIT(10)
#define MDIO_AN_C73_0_ASM_DIR BIT(11)
#define MDIO_AN_C73_0_C2 BIT(12)
#define MDIO_AN_C73_0_RF BIT(13)
#define MDIO_AN_C73_0_ACK BIT(14)
#define MDIO_AN_C73_0_NP BIT(15)
#define MDIO_AN_C73_1_T_MASK GENMASK(4, 0)
#define MDIO_AN_C73_1_1000BASE_KX BIT(5)
#define MDIO_AN_C73_1_10GBASE_KX4 BIT(6)
#define MDIO_AN_C73_1_10GBASE_KR BIT(7)
#define MDIO_AN_C73_1_40GBASE_KR4 BIT(8)
#define MDIO_AN_C73_1_40GBASE_CR4 BIT(9)
#define MDIO_AN_C73_1_100GBASE_CR10 BIT(10)
#define MDIO_AN_C73_1_100GBASE_KP4 BIT(11)
#define MDIO_AN_C73_1_100GBASE_KR4 BIT(12)
#define MDIO_AN_C73_1_100GBASE_CR4 BIT(13)
#define MDIO_AN_C73_1_25GBASE_R_S BIT(14)
#define MDIO_AN_C73_1_25GBASE_R BIT(15)
#define MDIO_AN_C73_2_2500BASE_KX BIT(0)
#define MDIO_AN_C73_2_5GBASE_KR BIT(1)
#define MDIO_PHYXS_LNSTAT_SYNC0 0x0001
#define MDIO_PHYXS_LNSTAT_SYNC1 0x0002
#define MDIO_PHYXS_LNSTAT_SYNC2 0x0004

28
libc/kernel/uapi/linux/media.h
View file

@ -66,8 +66,8 @@ struct media_device_info {
#define MEDIA_ENT_F_ATV_DECODER (MEDIA_ENT_F_OLD_SUBDEV_BASE + 4)
#define MEDIA_ENT_F_DV_DECODER (MEDIA_ENT_F_BASE + 0x6001)
#define MEDIA_ENT_F_DV_ENCODER (MEDIA_ENT_F_BASE + 0x6002)
#define MEDIA_ENT_FL_DEFAULT (1 << 0)
#define MEDIA_ENT_FL_CONNECTOR (1 << 1)
#define MEDIA_ENT_FL_DEFAULT (1U << 0)
#define MEDIA_ENT_FL_CONNECTOR (1U << 1)
#define MEDIA_ENT_ID_FLAG_NEXT (1U << 31)
struct media_entity_desc {
__u32 id;
@ -101,22 +101,22 @@ struct media_entity_desc {
__u8 raw[184];
};
};
#define MEDIA_PAD_FL_SINK (1 << 0)
#define MEDIA_PAD_FL_SOURCE (1 << 1)
#define MEDIA_PAD_FL_MUST_CONNECT (1 << 2)
#define MEDIA_PAD_FL_SINK (1U << 0)
#define MEDIA_PAD_FL_SOURCE (1U << 1)
#define MEDIA_PAD_FL_MUST_CONNECT (1U << 2)
struct media_pad_desc {
__u32 entity;
__u16 index;
__u32 flags;
__u32 reserved[2];
};
#define MEDIA_LNK_FL_ENABLED (1 << 0)
#define MEDIA_LNK_FL_IMMUTABLE (1 << 1)
#define MEDIA_LNK_FL_DYNAMIC (1 << 2)
#define MEDIA_LNK_FL_ENABLED (1U << 0)
#define MEDIA_LNK_FL_IMMUTABLE (1U << 1)
#define MEDIA_LNK_FL_DYNAMIC (1U << 2)
#define MEDIA_LNK_FL_LINK_TYPE (0xf << 28)
#define MEDIA_LNK_FL_DATA_LINK (0 << 28)
#define MEDIA_LNK_FL_INTERFACE_LINK (1 << 28)
#define MEDIA_LNK_FL_ANCILLARY_LINK (2 << 28)
#define MEDIA_LNK_FL_DATA_LINK (0U << 28)
#define MEDIA_LNK_FL_INTERFACE_LINK (1U << 28)
#define MEDIA_LNK_FL_ANCILLARY_LINK (2U << 28)
struct media_link_desc {
struct media_pad_desc source;
struct media_pad_desc sink;
@ -146,7 +146,7 @@ struct media_links_enum {
#define MEDIA_INTF_T_ALSA_PCM_CAPTURE (MEDIA_INTF_T_ALSA_BASE)
#define MEDIA_INTF_T_ALSA_PCM_PLAYBACK (MEDIA_INTF_T_ALSA_BASE + 1)
#define MEDIA_INTF_T_ALSA_CONTROL (MEDIA_INTF_T_ALSA_BASE + 2)
#define MEDIA_V2_ENTITY_HAS_FLAGS(media_version) ((media_version) >= ((4 << 16) | (19 << 8) | 0))
#define MEDIA_V2_ENTITY_HAS_FLAGS(media_version) ((media_version) >= ((4U << 16) | (19U << 8) | 0U))
struct media_v2_entity {
__u32 id;
char name[64];
@ -168,7 +168,7 @@ struct media_v2_interface {
__u32 raw[16];
};
} __attribute__((packed));
#define MEDIA_V2_PAD_HAS_INDEX(media_version) ((media_version) >= ((4 << 16) | (19 << 8) | 0))
#define MEDIA_V2_PAD_HAS_INDEX(media_version) ((media_version) >= ((4U << 16) | (19U << 8) | 0U))
struct media_v2_pad {
__u32 id;
__u32 entity_id;
@ -229,5 +229,5 @@ struct media_v2_topology {
#define MEDIA_INTF_T_ALSA_HWDEP (MEDIA_INTF_T_ALSA_BASE + 5)
#define MEDIA_INTF_T_ALSA_SEQUENCER (MEDIA_INTF_T_ALSA_BASE + 6)
#define MEDIA_INTF_T_ALSA_TIMER (MEDIA_INTF_T_ALSA_BASE + 7)
#define MEDIA_API_VERSION ((0 << 16) | (1 << 8) | 0)
#define MEDIA_API_VERSION ((0U << 16) | (1U << 8) | 0U)
#endif

12
libc/kernel/uapi/linux/mman.h
View file

@ -20,6 +20,7 @@
#define _UAPI_LINUX_MMAN_H
#include <asm/mman.h>
#include <asm-generic/hugetlb_encode.h>
#include <linux/types.h>
#define MREMAP_MAYMOVE 1
#define MREMAP_FIXED 2
#define MREMAP_DONTUNMAP 4
@ -44,4 +45,15 @@
#define MAP_HUGE_1GB HUGETLB_FLAG_ENCODE_1GB
#define MAP_HUGE_2GB HUGETLB_FLAG_ENCODE_2GB
#define MAP_HUGE_16GB HUGETLB_FLAG_ENCODE_16GB
struct cachestat_range {
__u64 off;
__u64 len;
};
struct cachestat {
__u64 nr_cache;
__u64 nr_dirty;
__u64 nr_writeback;
__u64 nr_evicted;
__u64 nr_recently_evicted;
};
#endif

3
libc/kernel/uapi/linux/mount.h
View file

@ -63,7 +63,8 @@
#define MOVE_MOUNT_T_AUTOMOUNTS 0x00000020
#define MOVE_MOUNT_T_EMPTY_PATH 0x00000040
#define MOVE_MOUNT_SET_GROUP 0x00000100
#define MOVE_MOUNT__MASK 0x00000177
#define MOVE_MOUNT_BENEATH 0x00000200
#define MOVE_MOUNT__MASK 0x00000377
#define FSOPEN_CLOEXEC 0x00000001
#define FSPICK_CLOEXEC 0x00000001
#define FSPICK_SYMLINK_NOFOLLOW 0x00000002

21
libc/kernel/uapi/linux/mptcp.h
View file

@ -114,6 +114,11 @@ struct mptcp_info {
__u8 mptcpi_local_addr_used;
__u8 mptcpi_local_addr_max;
__u8 mptcpi_csum_enabled;
__u32 mptcpi_retransmits;
__u64 mptcpi_bytes_retrans;
__u64 mptcpi_bytes_sent;
__u64 mptcpi_bytes_received;
__u64 mptcpi_bytes_acked;
};
enum mptcp_event_type {
MPTCP_EVENT_UNSPEC = 0,
@ -179,7 +184,23 @@ struct mptcp_subflow_addrs {
struct __kernel_sockaddr_storage ss_remote;
};
};
struct mptcp_subflow_info {
__u32 id;
struct mptcp_subflow_addrs addrs;
};
struct mptcp_full_info {
__u32 size_tcpinfo_kernel;
__u32 size_tcpinfo_user;
__u32 size_sfinfo_kernel;
__u32 size_sfinfo_user;
__u32 num_subflows;
__u32 size_arrays_user;
__aligned_u64 subflow_info;
__aligned_u64 tcp_info;
struct mptcp_info mptcp_info;
};
#define MPTCP_INFO 1
#define MPTCP_TCPINFO 2
#define MPTCP_SUBFLOW_ADDRS 3
#define MPTCP_FULL_INFO 4
#endif

2
libc/kernel/uapi/linux/netfilter/nf_tables.h
View file

@ -94,6 +94,7 @@ enum nf_tables_msg_types {
NFT_MSG_DESTROYSETELEM,
NFT_MSG_DESTROYOBJ,
NFT_MSG_DESTROYFLOWTABLE,
NFT_MSG_GETSETELEM_RESET,
NFT_MSG_MAX,
};
enum nft_list_attributes {
@ -448,6 +449,7 @@ enum nft_exthdr_op {
NFT_EXTHDR_OP_TCPOPT,
NFT_EXTHDR_OP_IPV4,
NFT_EXTHDR_OP_SCTP,
NFT_EXTHDR_OP_DCCP,
__NFT_EXTHDR_OP_MAX
};
#define NFT_EXTHDR_OP_MAX (__NFT_EXTHDR_OP_MAX - 1)

10
libc/kernel/uapi/linux/nl80211.h
View file

@ -191,6 +191,7 @@ enum nl80211_commands {
NL80211_CMD_MODIFY_LINK_STA,
NL80211_CMD_REMOVE_LINK_STA,
NL80211_CMD_SET_HW_TIMESTAMP,
NL80211_CMD_LINKS_REMOVED,
__NL80211_CMD_AFTER_LAST,
NL80211_CMD_MAX = __NL80211_CMD_AFTER_LAST - 1
};
@ -533,6 +534,7 @@ enum nl80211_attrs {
NL80211_ATTR_MAX_HW_TIMESTAMP_PEERS,
NL80211_ATTR_HW_TIMESTAMP_ENABLED,
NL80211_ATTR_EMA_RNR_ELEMS,
NL80211_ATTR_MLO_LINK_DISABLED,
__NL80211_ATTR_AFTER_LAST,
NUM_NL80211_ATTR = __NL80211_ATTR_AFTER_LAST,
NL80211_ATTR_MAX = __NL80211_ATTR_AFTER_LAST - 1
@ -687,6 +689,13 @@ enum nl80211_rate_info {
NL80211_RATE_INFO_EHT_NSS,
NL80211_RATE_INFO_EHT_GI,
NL80211_RATE_INFO_EHT_RU_ALLOC,
NL80211_RATE_INFO_S1G_MCS,
NL80211_RATE_INFO_S1G_NSS,
NL80211_RATE_INFO_1_MHZ_WIDTH,
NL80211_RATE_INFO_2_MHZ_WIDTH,
NL80211_RATE_INFO_4_MHZ_WIDTH,
NL80211_RATE_INFO_8_MHZ_WIDTH,
NL80211_RATE_INFO_16_MHZ_WIDTH,
__NL80211_RATE_INFO_AFTER_LAST,
NL80211_RATE_INFO_MAX = __NL80211_RATE_INFO_AFTER_LAST - 1
};
@ -939,6 +948,7 @@ enum nl80211_reg_rule_flags {
NL80211_RRF_NO_160MHZ = 1 << 16,
NL80211_RRF_NO_HE = 1 << 17,
NL80211_RRF_NO_320MHZ = 1 << 18,
NL80211_RRF_NO_EHT = 1 << 19,
};
#define NL80211_RRF_PASSIVE_SCAN NL80211_RRF_NO_IR
#define NL80211_RRF_NO_IBSS NL80211_RRF_NO_IR

1
libc/kernel/uapi/linux/openvswitch.h
View file

@ -396,6 +396,7 @@ struct ovs_action_push_vlan {
};
enum ovs_hash_alg {
OVS_HASH_ALG_L4,
OVS_HASH_ALG_SYM_L4,
};
struct ovs_action_hash {
__u32 hash_alg;

1
libc/kernel/uapi/linux/pci_regs.h
View file

@ -636,6 +636,7 @@
#define PCI_EXT_CAP_ID_DVSEC 0x23
#define PCI_EXT_CAP_ID_DLF 0x25
#define PCI_EXT_CAP_ID_PL_16GT 0x26
#define PCI_EXT_CAP_ID_PL_32GT 0x2A
#define PCI_EXT_CAP_ID_DOE 0x2E
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_DOE
#define PCI_EXT_CAP_DSN_SIZEOF 12

9
libc/kernel/uapi/linux/pkt_cls.h
View file

@ -463,6 +463,8 @@ enum {
TCA_FLOWER_KEY_PPPOE_SID,
TCA_FLOWER_KEY_PPP_PROTO,
TCA_FLOWER_KEY_L2TPV3_SID,
TCA_FLOWER_L2_MISS,
TCA_FLOWER_KEY_CFM,
__TCA_FLOWER_MAX,
};
#define TCA_FLOWER_MAX (__TCA_FLOWER_MAX - 1)
@ -534,6 +536,13 @@ enum {
TCA_FLOWER_KEY_FLAGS_IS_FRAGMENT = (1 << 0),
TCA_FLOWER_KEY_FLAGS_FRAG_IS_FIRST = (1 << 1),
};
enum {
TCA_FLOWER_KEY_CFM_OPT_UNSPEC,
TCA_FLOWER_KEY_CFM_MD_LEVEL,
TCA_FLOWER_KEY_CFM_OPCODE,
__TCA_FLOWER_KEY_CFM_OPT_MAX,
};
#define TCA_FLOWER_KEY_CFM_OPT_MAX (__TCA_FLOWER_KEY_CFM_OPT_MAX - 1)
#define TCA_FLOWER_MASK_FLAGS_RANGE (1 << 0)
struct tc_matchall_pcnt {
__u64 rhit;

7
libc/kernel/uapi/linux/pkt_sched.h
View file

@ -943,6 +943,13 @@ enum {
__TCA_TAPRIO_TC_ENTRY_CNT,
TCA_TAPRIO_TC_ENTRY_MAX = (__TCA_TAPRIO_TC_ENTRY_CNT - 1)
};
enum {
TCA_TAPRIO_OFFLOAD_STATS_PAD = 1,
TCA_TAPRIO_OFFLOAD_STATS_WINDOW_DROPS,
TCA_TAPRIO_OFFLOAD_STATS_TX_OVERRUNS,
__TCA_TAPRIO_OFFLOAD_STATS_CNT,
TCA_TAPRIO_OFFLOAD_STATS_MAX = (__TCA_TAPRIO_OFFLOAD_STATS_CNT - 1)
};
enum {
TCA_TAPRIO_ATTR_UNSPEC,
TCA_TAPRIO_ATTR_PRIOMAP,

9
libc/kernel/uapi/linux/prctl.h
View file

@ -192,4 +192,13 @@ struct prctl_mm_map {
#define PR_GET_AUXV 0x41555856
#define PR_SET_MEMORY_MERGE 67
#define PR_GET_MEMORY_MERGE 68
#define PR_RISCV_V_SET_CONTROL 69
#define PR_RISCV_V_GET_CONTROL 70
#define PR_RISCV_V_VSTATE_CTRL_DEFAULT 0
#define PR_RISCV_V_VSTATE_CTRL_OFF 1
#define PR_RISCV_V_VSTATE_CTRL_ON 2
#define PR_RISCV_V_VSTATE_CTRL_INHERIT (1 << 4)
#define PR_RISCV_V_VSTATE_CTRL_CUR_MASK 0x3
#define PR_RISCV_V_VSTATE_CTRL_NEXT_MASK 0xc
#define PR_RISCV_V_VSTATE_CTRL_MASK 0x1f
#endif

3
libc/kernel/uapi/linux/ptp_clock.h
View file

@ -46,7 +46,8 @@ struct ptp_clock_caps {
int n_pins;
int cross_timestamping;
int adjust_phase;
int rsv[12];
int max_phase_adj;
int rsv[11];
};
struct ptp_extts_request {
unsigned int index;

3
libc/kernel/uapi/linux/spi/spi.h
View file

@ -41,5 +41,6 @@
#define SPI_RX_OCTAL _BITUL(14)
#define SPI_3WIRE_HIZ _BITUL(15)
#define SPI_RX_CPHA_FLIP _BITUL(16)
#define SPI_MODE_USER_MASK (_BITUL(17) - 1)
#define SPI_MOSI_IDLE_LOW _BITUL(17)
#define SPI_MODE_USER_MASK (_BITUL(18) - 1)
#endif

36
libc/kernel/uapi/linux/tps6594_pfsm.h Normal file
View file

@ -0,0 +1,36 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef __TPS6594_PFSM_H
#define __TPS6594_PFSM_H
#include <linux/const.h>
#include <linux/ioctl.h>
#include <linux/types.h>
struct pmic_state_opt {
__u8 gpio_retention;
__u8 ddr_retention;
__u8 mcu_only_startup_dest;
};
#define PMIC_BASE 'P'
#define PMIC_GOTO_STANDBY _IO(PMIC_BASE, 0)
#define PMIC_GOTO_LP_STANDBY _IO(PMIC_BASE, 1)
#define PMIC_UPDATE_PGM _IO(PMIC_BASE, 2)
#define PMIC_SET_ACTIVE_STATE _IO(PMIC_BASE, 3)
#define PMIC_SET_MCU_ONLY_STATE _IOW(PMIC_BASE, 4, struct pmic_state_opt)
#define PMIC_SET_RETENTION_STATE _IOW(PMIC_BASE, 5, struct pmic_state_opt)
#endif

4
libc/kernel/uapi/linux/types.h
View file

@ -21,6 +21,10 @@
#include <asm/types.h>
#ifndef __ASSEMBLY__
#include <linux/posix_types.h>
#ifdef __SIZEOF_INT128__
typedef __signed__ __int128 __s128 __attribute__((aligned(16)));
typedef unsigned __int128 __u128 __attribute__((aligned(16)));
#endif
#define __bitwise
#define __bitwise__ __bitwise
typedef __u16 __bitwise __le16;

15
libc/kernel/uapi/linux/ublk_cmd.h
View file

@ -41,6 +41,8 @@
#define UBLK_U_CMD_START_USER_RECOVERY _IOWR('u', UBLK_CMD_START_USER_RECOVERY, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_END_USER_RECOVERY _IOWR('u', UBLK_CMD_END_USER_RECOVERY, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_GET_DEV_INFO2 _IOR('u', UBLK_CMD_GET_DEV_INFO2, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_GET_FEATURES _IOR('u', 0x13, struct ublksrv_ctrl_cmd)
#define UBLK_FEATURES_LEN 8
#define UBLK_IO_FETCH_REQ 0x20
#define UBLK_IO_COMMIT_AND_FETCH_REQ 0x21
#define UBLK_IO_NEED_GET_DATA 0x22
@ -53,6 +55,18 @@
#define UBLKSRV_CMD_BUF_OFFSET 0
#define UBLKSRV_IO_BUF_OFFSET 0x80000000
#define UBLK_MAX_QUEUE_DEPTH 4096
#define UBLK_IO_BUF_OFF 0
#define UBLK_IO_BUF_BITS 25
#define UBLK_IO_BUF_BITS_MASK ((1ULL << UBLK_IO_BUF_BITS) - 1)
#define UBLK_TAG_OFF UBLK_IO_BUF_BITS
#define UBLK_TAG_BITS 16
#define UBLK_TAG_BITS_MASK ((1ULL << UBLK_TAG_BITS) - 1)
#define UBLK_QID_OFF (UBLK_TAG_OFF + UBLK_TAG_BITS)
#define UBLK_QID_BITS 12
#define UBLK_QID_BITS_MASK ((1ULL << UBLK_QID_BITS) - 1)
#define UBLK_MAX_NR_QUEUES (1U << UBLK_QID_BITS)
#define UBLKSRV_IO_BUF_TOTAL_BITS (UBLK_QID_OFF + UBLK_QID_BITS)
#define UBLKSRV_IO_BUF_TOTAL_SIZE (1ULL << UBLKSRV_IO_BUF_TOTAL_BITS)
#define UBLK_F_SUPPORT_ZERO_COPY (1ULL << 0)
#define UBLK_F_URING_CMD_COMP_IN_TASK (1ULL << 1)
#define UBLK_F_NEED_GET_DATA (1UL << 2)
@ -60,6 +74,7 @@
#define UBLK_F_USER_RECOVERY_REISSUE (1UL << 4)
#define UBLK_F_UNPRIVILEGED_DEV (1UL << 5)
#define UBLK_F_CMD_IOCTL_ENCODE (1UL << 6)
#define UBLK_F_USER_COPY (1UL << 7)
#define UBLK_S_DEV_DEAD 0
#define UBLK_S_DEV_LIVE 1
#define UBLK_S_DEV_QUIESCED 2

10
libc/kernel/uapi/linux/usb/ch9.h
View file

@ -203,7 +203,10 @@ struct usb_config_descriptor {
struct usb_string_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__le16 wData[1];
union {
__le16 legacy_padding;
__DECLARE_FLEX_ARRAY(__le16, wData);
};
} __attribute__((packed));
struct usb_interface_descriptor {
__u8 bLength;
@ -441,7 +444,10 @@ struct usb_ssp_cap_descriptor {
#define USB_SSP_MIN_RX_LANE_COUNT (0xf << 8)
#define USB_SSP_MIN_TX_LANE_COUNT (0xf << 12)
__le16 wReserved;
__le32 bmSublinkSpeedAttr[1];
union {
__le32 legacy_padding;
__DECLARE_FLEX_ARRAY(__le32, bmSublinkSpeedAttr);
};
#define USB_SSP_SUBLINK_SPEED_SSID (0xf)
#define USB_SSP_SUBLINK_SPEED_LSE (0x3 << 4)
#define USB_SSP_SUBLINK_SPEED_LSE_BPS 0

301
libc/kernel/uapi/linux/v4l2-controls.h
View file

@ -691,6 +691,39 @@ enum v4l2_mpeg_video_frame_skip_mode {
#define V4L2_CID_MPEG_VIDEO_HEVC_B_FRAME_MAX_QP (V4L2_CID_CODEC_BASE + 652)
#define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY (V4L2_CID_CODEC_BASE + 653)
#define V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE (V4L2_CID_CODEC_BASE + 654)
#define V4L2_CID_MPEG_VIDEO_AV1_PROFILE (V4L2_CID_CODEC_BASE + 655)
enum v4l2_mpeg_video_av1_profile {
V4L2_MPEG_VIDEO_AV1_PROFILE_MAIN = 0,
V4L2_MPEG_VIDEO_AV1_PROFILE_HIGH = 1,
V4L2_MPEG_VIDEO_AV1_PROFILE_PROFESSIONAL = 2,
};
#define V4L2_CID_MPEG_VIDEO_AV1_LEVEL (V4L2_CID_CODEC_BASE + 656)
enum v4l2_mpeg_video_av1_level {
V4L2_MPEG_VIDEO_AV1_LEVEL_2_0 = 0,
V4L2_MPEG_VIDEO_AV1_LEVEL_2_1 = 1,
V4L2_MPEG_VIDEO_AV1_LEVEL_2_2 = 2,
V4L2_MPEG_VIDEO_AV1_LEVEL_2_3 = 3,
V4L2_MPEG_VIDEO_AV1_LEVEL_3_0 = 4,
V4L2_MPEG_VIDEO_AV1_LEVEL_3_1 = 5,
V4L2_MPEG_VIDEO_AV1_LEVEL_3_2 = 6,
V4L2_MPEG_VIDEO_AV1_LEVEL_3_3 = 7,
V4L2_MPEG_VIDEO_AV1_LEVEL_4_0 = 8,
V4L2_MPEG_VIDEO_AV1_LEVEL_4_1 = 9,
V4L2_MPEG_VIDEO_AV1_LEVEL_4_2 = 10,
V4L2_MPEG_VIDEO_AV1_LEVEL_4_3 = 11,
V4L2_MPEG_VIDEO_AV1_LEVEL_5_0 = 12,
V4L2_MPEG_VIDEO_AV1_LEVEL_5_1 = 13,
V4L2_MPEG_VIDEO_AV1_LEVEL_5_2 = 14,
V4L2_MPEG_VIDEO_AV1_LEVEL_5_3 = 15,
V4L2_MPEG_VIDEO_AV1_LEVEL_6_0 = 16,
V4L2_MPEG_VIDEO_AV1_LEVEL_6_1 = 17,
V4L2_MPEG_VIDEO_AV1_LEVEL_6_2 = 18,
V4L2_MPEG_VIDEO_AV1_LEVEL_6_3 = 19,
V4L2_MPEG_VIDEO_AV1_LEVEL_7_0 = 20,
V4L2_MPEG_VIDEO_AV1_LEVEL_7_1 = 21,
V4L2_MPEG_VIDEO_AV1_LEVEL_7_2 = 22,
V4L2_MPEG_VIDEO_AV1_LEVEL_7_3 = 23
};
#define V4L2_CID_CODEC_CX2341X_BASE (V4L2_CTRL_CLASS_CODEC | 0x1000)
#define V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE (V4L2_CID_CODEC_CX2341X_BASE + 0)
enum v4l2_mpeg_cx2341x_video_spatial_filter_mode {
@ -1520,7 +1553,8 @@ struct v4l2_ctrl_hevc_decode_params {
__u8 poc_st_curr_before[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
__u8 poc_st_curr_after[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
__u8 poc_lt_curr[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
__u8 reserved[4];
__u8 num_delta_pocs_of_ref_rps_idx;
__u8 reserved[3];
struct v4l2_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
__u64 flags;
};
@ -1684,6 +1718,271 @@ struct v4l2_ctrl_vp9_compressed_hdr {
__u8 partition[16][3];
struct v4l2_vp9_mv_probs mv;
};
#define V4L2_AV1_TOTAL_REFS_PER_FRAME 8
#define V4L2_AV1_CDEF_MAX 8
#define V4L2_AV1_NUM_PLANES_MAX 3
#define V4L2_AV1_MAX_SEGMENTS 8
#define V4L2_AV1_MAX_OPERATING_POINTS (1 << 5)
#define V4L2_AV1_REFS_PER_FRAME 7
#define V4L2_AV1_MAX_NUM_Y_POINTS (1 << 4)
#define V4L2_AV1_MAX_NUM_CB_POINTS (1 << 4)
#define V4L2_AV1_MAX_NUM_CR_POINTS (1 << 4)
#define V4L2_AV1_AR_COEFFS_SIZE 25
#define V4L2_AV1_MAX_NUM_PLANES 3
#define V4L2_AV1_MAX_TILE_COLS 64
#define V4L2_AV1_MAX_TILE_ROWS 64
#define V4L2_AV1_MAX_TILE_COUNT 512
#define V4L2_AV1_SEQUENCE_FLAG_STILL_PICTURE 0x00000001
#define V4L2_AV1_SEQUENCE_FLAG_USE_128X128_SUPERBLOCK 0x00000002
#define V4L2_AV1_SEQUENCE_FLAG_ENABLE_FILTER_INTRA 0x00000004
#define V4L2_AV1_SEQUENCE_FLAG_ENABLE_INTRA_EDGE_FILTER 0x00000008
#define V4L2_AV1_SEQUENCE_FLAG_ENABLE_INTERINTRA_COMPOUND 0x00000010
#define V4L2_AV1_SEQUENCE_FLAG_ENABLE_MASKED_COMPOUND 0x00000020
#define V4L2_AV1_SEQUENCE_FLAG_ENABLE_WARPED_MOTION 0x00000040
#define V4L2_AV1_SEQUENCE_FLAG_ENABLE_DUAL_FILTER 0x00000080
#define V4L2_AV1_SEQUENCE_FLAG_ENABLE_ORDER_HINT 0x00000100
#define V4L2_AV1_SEQUENCE_FLAG_ENABLE_JNT_COMP 0x00000200
#define V4L2_AV1_SEQUENCE_FLAG_ENABLE_REF_FRAME_MVS 0x00000400
#define V4L2_AV1_SEQUENCE_FLAG_ENABLE_SUPERRES 0x00000800
#define V4L2_AV1_SEQUENCE_FLAG_ENABLE_CDEF 0x00001000
#define V4L2_AV1_SEQUENCE_FLAG_ENABLE_RESTORATION 0x00002000
#define V4L2_AV1_SEQUENCE_FLAG_MONO_CHROME 0x00004000
#define V4L2_AV1_SEQUENCE_FLAG_COLOR_RANGE 0x00008000
#define V4L2_AV1_SEQUENCE_FLAG_SUBSAMPLING_X 0x00010000
#define V4L2_AV1_SEQUENCE_FLAG_SUBSAMPLING_Y 0x00020000
#define V4L2_AV1_SEQUENCE_FLAG_FILM_GRAIN_PARAMS_PRESENT 0x00040000
#define V4L2_AV1_SEQUENCE_FLAG_SEPARATE_UV_DELTA_Q 0x00080000
#define V4L2_CID_STATELESS_AV1_SEQUENCE (V4L2_CID_CODEC_STATELESS_BASE + 500)
struct v4l2_ctrl_av1_sequence {
__u32 flags;
__u8 seq_profile;
__u8 order_hint_bits;
__u8 bit_depth;
__u8 reserved;
__u16 max_frame_width_minus_1;
__u16 max_frame_height_minus_1;
};
#define V4L2_CID_STATELESS_AV1_TILE_GROUP_ENTRY (V4L2_CID_CODEC_STATELESS_BASE + 501)
struct v4l2_ctrl_av1_tile_group_entry {
__u32 tile_offset;
__u32 tile_size;
__u32 tile_row;
__u32 tile_col;
};
enum v4l2_av1_warp_model {
V4L2_AV1_WARP_MODEL_IDENTITY = 0,
V4L2_AV1_WARP_MODEL_TRANSLATION = 1,
V4L2_AV1_WARP_MODEL_ROTZOOM = 2,
V4L2_AV1_WARP_MODEL_AFFINE = 3,
};
enum v4l2_av1_reference_frame {
V4L2_AV1_REF_INTRA_FRAME = 0,
V4L2_AV1_REF_LAST_FRAME = 1,
V4L2_AV1_REF_LAST2_FRAME = 2,
V4L2_AV1_REF_LAST3_FRAME = 3,
V4L2_AV1_REF_GOLDEN_FRAME = 4,
V4L2_AV1_REF_BWDREF_FRAME = 5,
V4L2_AV1_REF_ALTREF2_FRAME = 6,
V4L2_AV1_REF_ALTREF_FRAME = 7,
};
#define V4L2_AV1_GLOBAL_MOTION_IS_INVALID(ref) (1 << (ref))
#define V4L2_AV1_GLOBAL_MOTION_FLAG_IS_GLOBAL 0x1
#define V4L2_AV1_GLOBAL_MOTION_FLAG_IS_ROT_ZOOM 0x2
#define V4L2_AV1_GLOBAL_MOTION_FLAG_IS_TRANSLATION 0x4
struct v4l2_av1_global_motion {
__u8 flags[V4L2_AV1_TOTAL_REFS_PER_FRAME];
enum v4l2_av1_warp_model type[V4L2_AV1_TOTAL_REFS_PER_FRAME];
__s32 params[V4L2_AV1_TOTAL_REFS_PER_FRAME][6];
__u8 invalid;
__u8 reserved[3];
};
enum v4l2_av1_frame_restoration_type {
V4L2_AV1_FRAME_RESTORE_NONE = 0,
V4L2_AV1_FRAME_RESTORE_WIENER = 1,
V4L2_AV1_FRAME_RESTORE_SGRPROJ = 2,
V4L2_AV1_FRAME_RESTORE_SWITCHABLE = 3,
};
#define V4L2_AV1_LOOP_RESTORATION_FLAG_USES_LR 0x1
#define V4L2_AV1_LOOP_RESTORATION_FLAG_USES_CHROMA_LR 0x2
struct v4l2_av1_loop_restoration {
__u8 flags;
__u8 lr_unit_shift;
__u8 lr_uv_shift;
__u8 reserved;
enum v4l2_av1_frame_restoration_type frame_restoration_type[V4L2_AV1_NUM_PLANES_MAX];
__u32 loop_restoration_size[V4L2_AV1_MAX_NUM_PLANES];
};
struct v4l2_av1_cdef {
__u8 damping_minus_3;
__u8 bits;
__u8 y_pri_strength[V4L2_AV1_CDEF_MAX];
__u8 y_sec_strength[V4L2_AV1_CDEF_MAX];
__u8 uv_pri_strength[V4L2_AV1_CDEF_MAX];
__u8 uv_sec_strength[V4L2_AV1_CDEF_MAX];
};
#define V4L2_AV1_SEGMENTATION_FLAG_ENABLED 0x1
#define V4L2_AV1_SEGMENTATION_FLAG_UPDATE_MAP 0x2
#define V4L2_AV1_SEGMENTATION_FLAG_TEMPORAL_UPDATE 0x4
#define V4L2_AV1_SEGMENTATION_FLAG_UPDATE_DATA 0x8
#define V4L2_AV1_SEGMENTATION_FLAG_SEG_ID_PRE_SKIP 0x10
enum v4l2_av1_segment_feature {
V4L2_AV1_SEG_LVL_ALT_Q = 0,
V4L2_AV1_SEG_LVL_ALT_LF_Y_V = 1,
V4L2_AV1_SEG_LVL_REF_FRAME = 5,
V4L2_AV1_SEG_LVL_REF_SKIP = 6,
V4L2_AV1_SEG_LVL_REF_GLOBALMV = 7,
V4L2_AV1_SEG_LVL_MAX = 8
};
#define V4L2_AV1_SEGMENT_FEATURE_ENABLED(id) (1 << (id))
struct v4l2_av1_segmentation {
__u8 flags;
__u8 last_active_seg_id;
__u8 feature_enabled[V4L2_AV1_MAX_SEGMENTS];
__s16 feature_data[V4L2_AV1_MAX_SEGMENTS][V4L2_AV1_SEG_LVL_MAX];
};
#define V4L2_AV1_LOOP_FILTER_FLAG_DELTA_ENABLED 0x1
#define V4L2_AV1_LOOP_FILTER_FLAG_DELTA_UPDATE 0x2
#define V4L2_AV1_LOOP_FILTER_FLAG_DELTA_LF_PRESENT 0x4
#define V4L2_AV1_LOOP_FILTER_FLAG_DELTA_LF_MULTI 0x8
struct v4l2_av1_loop_filter {
__u8 flags;
__u8 level[4];
__u8 sharpness;
__s8 ref_deltas[V4L2_AV1_TOTAL_REFS_PER_FRAME];
__s8 mode_deltas[2];
__u8 delta_lf_res;
};
#define V4L2_AV1_QUANTIZATION_FLAG_DIFF_UV_DELTA 0x1
#define V4L2_AV1_QUANTIZATION_FLAG_USING_QMATRIX 0x2
#define V4L2_AV1_QUANTIZATION_FLAG_DELTA_Q_PRESENT 0x4
struct v4l2_av1_quantization {
__u8 flags;
__u8 base_q_idx;
__s8 delta_q_y_dc;
__s8 delta_q_u_dc;
__s8 delta_q_u_ac;
__s8 delta_q_v_dc;
__s8 delta_q_v_ac;
__u8 qm_y;
__u8 qm_u;
__u8 qm_v;
__u8 delta_q_res;
};
#define V4L2_AV1_TILE_INFO_FLAG_UNIFORM_TILE_SPACING 0x1
struct v4l2_av1_tile_info {
__u8 flags;
__u8 context_update_tile_id;
__u8 tile_cols;
__u8 tile_rows;
__u32 mi_col_starts[V4L2_AV1_MAX_TILE_COLS + 1];
__u32 mi_row_starts[V4L2_AV1_MAX_TILE_ROWS + 1];
__u32 width_in_sbs_minus_1[V4L2_AV1_MAX_TILE_COLS];
__u32 height_in_sbs_minus_1[V4L2_AV1_MAX_TILE_ROWS];
__u8 tile_size_bytes;
__u8 reserved[3];
};
enum v4l2_av1_frame_type {
V4L2_AV1_KEY_FRAME = 0,
V4L2_AV1_INTER_FRAME = 1,
V4L2_AV1_INTRA_ONLY_FRAME = 2,
V4L2_AV1_SWITCH_FRAME = 3
};
enum v4l2_av1_interpolation_filter {
V4L2_AV1_INTERPOLATION_FILTER_EIGHTTAP = 0,
V4L2_AV1_INTERPOLATION_FILTER_EIGHTTAP_SMOOTH = 1,
V4L2_AV1_INTERPOLATION_FILTER_EIGHTTAP_SHARP = 2,
V4L2_AV1_INTERPOLATION_FILTER_BILINEAR = 3,
V4L2_AV1_INTERPOLATION_FILTER_SWITCHABLE = 4,
};
enum v4l2_av1_tx_mode {
V4L2_AV1_TX_MODE_ONLY_4X4 = 0,
V4L2_AV1_TX_MODE_LARGEST = 1,
V4L2_AV1_TX_MODE_SELECT = 2
};
#define V4L2_AV1_FRAME_FLAG_SHOW_FRAME 0x00000001
#define V4L2_AV1_FRAME_FLAG_SHOWABLE_FRAME 0x00000002
#define V4L2_AV1_FRAME_FLAG_ERROR_RESILIENT_MODE 0x00000004
#define V4L2_AV1_FRAME_FLAG_DISABLE_CDF_UPDATE 0x00000008
#define V4L2_AV1_FRAME_FLAG_ALLOW_SCREEN_CONTENT_TOOLS 0x00000010
#define V4L2_AV1_FRAME_FLAG_FORCE_INTEGER_MV 0x00000020
#define V4L2_AV1_FRAME_FLAG_ALLOW_INTRABC 0x00000040
#define V4L2_AV1_FRAME_FLAG_USE_SUPERRES 0x00000080
#define V4L2_AV1_FRAME_FLAG_ALLOW_HIGH_PRECISION_MV 0x00000100
#define V4L2_AV1_FRAME_FLAG_IS_MOTION_MODE_SWITCHABLE 0x00000200
#define V4L2_AV1_FRAME_FLAG_USE_REF_FRAME_MVS 0x00000400
#define V4L2_AV1_FRAME_FLAG_DISABLE_FRAME_END_UPDATE_CDF 0x00000800
#define V4L2_AV1_FRAME_FLAG_ALLOW_WARPED_MOTION 0x00001000
#define V4L2_AV1_FRAME_FLAG_REFERENCE_SELECT 0x00002000
#define V4L2_AV1_FRAME_FLAG_REDUCED_TX_SET 0x00004000
#define V4L2_AV1_FRAME_FLAG_SKIP_MODE_ALLOWED 0x00008000
#define V4L2_AV1_FRAME_FLAG_SKIP_MODE_PRESENT 0x00010000
#define V4L2_AV1_FRAME_FLAG_FRAME_SIZE_OVERRIDE 0x00020000
#define V4L2_AV1_FRAME_FLAG_BUFFER_REMOVAL_TIME_PRESENT 0x00040000
#define V4L2_AV1_FRAME_FLAG_FRAME_REFS_SHORT_SIGNALING 0x00080000
#define V4L2_CID_STATELESS_AV1_FRAME (V4L2_CID_CODEC_STATELESS_BASE + 502)
struct v4l2_ctrl_av1_frame {
struct v4l2_av1_tile_info tile_info;
struct v4l2_av1_quantization quantization;
__u8 superres_denom;
struct v4l2_av1_segmentation segmentation;
struct v4l2_av1_loop_filter loop_filter;
struct v4l2_av1_cdef cdef;
__u8 skip_mode_frame[2];
__u8 primary_ref_frame;
struct v4l2_av1_loop_restoration loop_restoration;
struct v4l2_av1_global_motion global_motion;
__u32 flags;
enum v4l2_av1_frame_type frame_type;
__u32 order_hint;
__u32 upscaled_width;
enum v4l2_av1_interpolation_filter interpolation_filter;
enum v4l2_av1_tx_mode tx_mode;
__u32 frame_width_minus_1;
__u32 frame_height_minus_1;
__u16 render_width_minus_1;
__u16 render_height_minus_1;
__u32 current_frame_id;
__u32 buffer_removal_time[V4L2_AV1_MAX_OPERATING_POINTS];
__u8 reserved[4];
__u32 order_hints[V4L2_AV1_TOTAL_REFS_PER_FRAME];
__u64 reference_frame_ts[V4L2_AV1_TOTAL_REFS_PER_FRAME];
__s8 ref_frame_idx[V4L2_AV1_REFS_PER_FRAME];
__u8 refresh_frame_flags;
};
#define V4L2_AV1_FILM_GRAIN_FLAG_APPLY_GRAIN 0x1
#define V4L2_AV1_FILM_GRAIN_FLAG_UPDATE_GRAIN 0x2
#define V4L2_AV1_FILM_GRAIN_FLAG_CHROMA_SCALING_FROM_LUMA 0x4
#define V4L2_AV1_FILM_GRAIN_FLAG_OVERLAP 0x8
#define V4L2_AV1_FILM_GRAIN_FLAG_CLIP_TO_RESTRICTED_RANGE 0x10
#define V4L2_CID_STATELESS_AV1_FILM_GRAIN (V4L2_CID_CODEC_STATELESS_BASE + 505)
struct v4l2_ctrl_av1_film_grain {
__u8 flags;
__u8 cr_mult;
__u16 grain_seed;
__u8 film_grain_params_ref_idx;
__u8 num_y_points;
__u8 point_y_value[V4L2_AV1_MAX_NUM_Y_POINTS];
__u8 point_y_scaling[V4L2_AV1_MAX_NUM_Y_POINTS];
__u8 num_cb_points;
__u8 point_cb_value[V4L2_AV1_MAX_NUM_CB_POINTS];
__u8 point_cb_scaling[V4L2_AV1_MAX_NUM_CB_POINTS];
__u8 num_cr_points;
__u8 point_cr_value[V4L2_AV1_MAX_NUM_CR_POINTS];
__u8 point_cr_scaling[V4L2_AV1_MAX_NUM_CR_POINTS];
__u8 grain_scaling_minus_8;
__u8 ar_coeff_lag;
__u8 ar_coeffs_y_plus_128[V4L2_AV1_AR_COEFFS_SIZE];
__u8 ar_coeffs_cb_plus_128[V4L2_AV1_AR_COEFFS_SIZE];
__u8 ar_coeffs_cr_plus_128[V4L2_AV1_AR_COEFFS_SIZE];
__u8 ar_coeff_shift_minus_6;
__u8 grain_scale_shift;
__u8 cb_mult;
__u8 cb_luma_mult;
__u8 cr_luma_mult;
__u16 cb_offset;
__u16 cr_offset;
__u8 reserved[4];
};
#define V4L2_CTRL_CLASS_MPEG V4L2_CTRL_CLASS_CODEC
#define V4L2_CID_MPEG_CLASS V4L2_CID_CODEC_CLASS
#define V4L2_CID_MPEG_BASE V4L2_CID_CODEC_BASE

4
libc/kernel/uapi/linux/version.h
View file

@ -16,8 +16,8 @@
***
****************************************************************************
****************************************************************************/
#define LINUX_VERSION_CODE 394240
#define LINUX_VERSION_CODE 394496
#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + ((c) > 255 ? 255 : (c)))
#define LINUX_VERSION_MAJOR 6
#define LINUX_VERSION_PATCHLEVEL 4
#define LINUX_VERSION_PATCHLEVEL 5
#define LINUX_VERSION_SUBLEVEL 0

14
libc/kernel/uapi/linux/vfio.h
View file

@ -62,6 +62,7 @@ struct vfio_device_info {
#define VFIO_DEVICE_FLAGS_AP (1 << 5)
#define VFIO_DEVICE_FLAGS_FSL_MC (1 << 6)
#define VFIO_DEVICE_FLAGS_CAPS (1 << 7)
#define VFIO_DEVICE_FLAGS_CDX (1 << 8)
__u32 num_regions;
__u32 num_irqs;
__u32 cap_offset;
@ -76,6 +77,15 @@ struct vfio_device_info {
#define VFIO_DEVICE_INFO_CAP_ZPCI_GROUP 2
#define VFIO_DEVICE_INFO_CAP_ZPCI_UTIL 3
#define VFIO_DEVICE_INFO_CAP_ZPCI_PFIP 4
#define VFIO_DEVICE_INFO_CAP_PCI_ATOMIC_COMP 5
struct vfio_device_info_cap_pci_atomic_comp {
struct vfio_info_cap_header header;
__u32 flags;
#define VFIO_PCI_ATOMIC_COMP32 (1 << 0)
#define VFIO_PCI_ATOMIC_COMP64 (1 << 1)
#define VFIO_PCI_ATOMIC_COMP128 (1 << 2)
__u32 reserved;
};
struct vfio_region_info {
__u32 argsz;
__u32 flags;
@ -217,6 +227,10 @@ enum {
VFIO_CCW_REQ_IRQ_INDEX,
VFIO_CCW_NUM_IRQS
};
enum {
VFIO_AP_REQ_IRQ_INDEX,
VFIO_AP_NUM_IRQS
};
struct vfio_pci_dependent_device {
__u32 group_id;
__u16 segment;

4
libc/kernel/uapi/linux/vhost.h
View file

@ -30,6 +30,8 @@
#define VHOST_SET_MEM_TABLE _IOW(VHOST_VIRTIO, 0x03, struct vhost_memory)
#define VHOST_SET_LOG_BASE _IOW(VHOST_VIRTIO, 0x04, __u64)
#define VHOST_SET_LOG_FD _IOW(VHOST_VIRTIO, 0x07, int)
#define VHOST_NEW_WORKER _IOR(VHOST_VIRTIO, 0x8, struct vhost_worker_state)
#define VHOST_FREE_WORKER _IOW(VHOST_VIRTIO, 0x9, struct vhost_worker_state)
#define VHOST_SET_VRING_NUM _IOW(VHOST_VIRTIO, 0x10, struct vhost_vring_state)
#define VHOST_SET_VRING_ADDR _IOW(VHOST_VIRTIO, 0x11, struct vhost_vring_addr)
#define VHOST_SET_VRING_BASE _IOW(VHOST_VIRTIO, 0x12, struct vhost_vring_state)
@ -38,6 +40,8 @@
#define VHOST_VRING_BIG_ENDIAN 1
#define VHOST_SET_VRING_ENDIAN _IOW(VHOST_VIRTIO, 0x13, struct vhost_vring_state)
#define VHOST_GET_VRING_ENDIAN _IOW(VHOST_VIRTIO, 0x14, struct vhost_vring_state)
#define VHOST_ATTACH_VRING_WORKER _IOW(VHOST_VIRTIO, 0x15, struct vhost_vring_worker)
#define VHOST_GET_VRING_WORKER _IOWR(VHOST_VIRTIO, 0x16, struct vhost_vring_worker)
#define VHOST_SET_VRING_KICK _IOW(VHOST_VIRTIO, 0x20, struct vhost_vring_file)
#define VHOST_SET_VRING_CALL _IOW(VHOST_VIRTIO, 0x21, struct vhost_vring_file)
#define VHOST_SET_VRING_ERR _IOW(VHOST_VIRTIO, 0x22, struct vhost_vring_file)

7
libc/kernel/uapi/linux/vhost_types.h
View file

@ -39,6 +39,13 @@ struct vhost_vring_addr {
__u64 avail_user_addr;
__u64 log_guest_addr;
};
struct vhost_worker_state {
unsigned int worker_id;
};
struct vhost_vring_worker {
unsigned int index;
unsigned int worker_id;
};
struct vhost_iotlb_msg {
__u64 iova;
__u64 size;

14
libc/kernel/uapi/linux/videodev2.h
View file

@ -313,6 +313,7 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_NV12_4L4 v4l2_fourcc('V', 'T', '1', '2')
#define V4L2_PIX_FMT_NV12_16L16 v4l2_fourcc('H', 'M', '1', '2')
#define V4L2_PIX_FMT_NV12_32L32 v4l2_fourcc('S', 'T', '1', '2')
#define V4L2_PIX_FMT_NV15_4L4 v4l2_fourcc('V', 'T', '1', '5')
#define V4L2_PIX_FMT_P010_4L4 v4l2_fourcc('T', '0', '1', '0')
#define V4L2_PIX_FMT_NV12_8L128 v4l2_fourcc('A', 'T', '1', '2')
#define V4L2_PIX_FMT_NV12_10BE_8L128 v4l2_fourcc_be('A', 'X', '1', '2')
@ -386,6 +387,7 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_FWHT_STATELESS v4l2_fourcc('S', 'F', 'W', 'H')
#define V4L2_PIX_FMT_H264_SLICE v4l2_fourcc('S', '2', '6', '4')
#define V4L2_PIX_FMT_HEVC_SLICE v4l2_fourcc('S', '2', '6', '5')
#define V4L2_PIX_FMT_AV1_FRAME v4l2_fourcc('A', 'V', '1', 'F')
#define V4L2_PIX_FMT_SPK v4l2_fourcc('S', 'P', 'K', '0')
#define V4L2_PIX_FMT_RV30 v4l2_fourcc('R', 'V', '3', '0')
#define V4L2_PIX_FMT_RV40 v4l2_fourcc('R', 'V', '4', '0')
@ -914,8 +916,8 @@ struct v4l2_ext_control {
__u8 * p_u8;
__u16 * p_u16;
__u32 * p_u32;
__u32 * p_s32;
__u32 * p_s64;
__s32 * p_s32;
__s64 * p_s64;
struct v4l2_area * p_area;
struct v4l2_ctrl_h264_sps * p_h264_sps;
struct v4l2_ctrl_h264_pps * p_h264_pps;
@ -935,6 +937,10 @@ struct v4l2_ext_control {
struct v4l2_ctrl_hevc_slice_params * p_hevc_slice_params;
struct v4l2_ctrl_hevc_scaling_matrix * p_hevc_scaling_matrix;
struct v4l2_ctrl_hevc_decode_params * p_hevc_decode_params;
struct v4l2_ctrl_av1_sequence * p_av1_sequence;
struct v4l2_ctrl_av1_tile_group_entry * p_av1_tile_group_entry;
struct v4l2_ctrl_av1_frame * p_av1_frame;
struct v4l2_ctrl_av1_film_grain * p_av1_film_grain;
void * ptr;
};
} __attribute__((packed));
@ -992,6 +998,10 @@ enum v4l2_ctrl_type {
V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS = 0x0272,
V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX = 0x0273,
V4L2_CTRL_TYPE_HEVC_DECODE_PARAMS = 0x0274,
V4L2_CTRL_TYPE_AV1_SEQUENCE = 0x280,
V4L2_CTRL_TYPE_AV1_TILE_GROUP_ENTRY = 0x281,
V4L2_CTRL_TYPE_AV1_FRAME = 0x282,
V4L2_CTRL_TYPE_AV1_FILM_GRAIN = 0x283,
};
struct v4l2_queryctrl {
__u32 id;

2
libc/kernel/uapi/linux/wireless.h
View file

@ -314,7 +314,7 @@ struct iw_encode_ext {
struct sockaddr addr;
__u16 alg;
__u16 key_len;
__u8 key[0];
__u8 key[];
};
struct iw_mlme {
__u16 cmd;

22
libc/kernel/uapi/rdma/bnxt_re-abi.h
View file

@ -19,6 +19,7 @@
#ifndef __BNXT_RE_UVERBS_ABI_H__
#define __BNXT_RE_UVERBS_ABI_H__
#include <linux/types.h>
#include <rdma/ib_user_ioctl_cmds.h>
#define BNXT_RE_ABI_VERSION 1
#define BNXT_RE_CHIP_ID0_CHIP_NUM_SFT 0x00
#define BNXT_RE_CHIP_ID0_CHIP_REV_SFT 0x10
@ -26,6 +27,7 @@
enum {
BNXT_RE_UCNTX_CMASK_HAVE_CCTX = 0x1ULL,
BNXT_RE_UCNTX_CMASK_HAVE_MODE = 0x02ULL,
BNXT_RE_UCNTX_CMASK_WC_DPI_ENABLED = 0x04ULL,
};
enum bnxt_re_wqe_mode {
BNXT_QPLIB_WQE_MODE_STATIC = 0x00,
@ -85,4 +87,24 @@ enum bnxt_re_shpg_offt {
BNXT_RE_AVID_SIZE = 0x04,
BNXT_RE_END_RESV_OFFT = 0xFF0
};
enum bnxt_re_objects {
BNXT_RE_OBJECT_ALLOC_PAGE = (1U << UVERBS_ID_NS_SHIFT),
};
enum bnxt_re_alloc_page_type {
BNXT_RE_ALLOC_WC_PAGE = 0,
};
enum bnxt_re_var_alloc_page_attrs {
BNXT_RE_ALLOC_PAGE_HANDLE = (1U << UVERBS_ID_NS_SHIFT),
BNXT_RE_ALLOC_PAGE_TYPE,
BNXT_RE_ALLOC_PAGE_DPI,
BNXT_RE_ALLOC_PAGE_MMAP_OFFSET,
BNXT_RE_ALLOC_PAGE_MMAP_LENGTH,
};
enum bnxt_re_alloc_page_attrs {
BNXT_RE_DESTROY_PAGE_HANDLE = (1U << UVERBS_ID_NS_SHIFT),
};
enum bnxt_re_alloc_page_methods {
BNXT_RE_METHOD_ALLOC_PAGE = (1U << UVERBS_ID_NS_SHIFT),
BNXT_RE_METHOD_DESTROY_PAGE,
};
#endif

12
libc/kernel/uapi/scsi/scsi_bsg_ufs.h
View file

@ -51,6 +51,18 @@ struct utp_upiu_query {
__be32 value;
__be32 reserved[2];
};
struct utp_upiu_query_v4_0 {
__u8 opcode;
__u8 idn;
__u8 index;
__u8 selector;
__u8 osf3;
__u8 osf4;
__be16 osf5;
__be32 osf6;
__be32 osf7;
__be32 reserved;
};
struct utp_upiu_cmd {
__be32 exp_data_transfer_len;
__u8 cdb[UFS_CDB_SIZE];

70
libc/kernel/uapi/sound/asequencer.h
View file

@ -19,7 +19,7 @@
#ifndef _UAPI__SOUND_ASEQUENCER_H
#define _UAPI__SOUND_ASEQUENCER_H
#include <sound/asound.h>
#define SNDRV_SEQ_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 2)
#define SNDRV_SEQ_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 3)
#define SNDRV_SEQ_EVENT_SYSTEM 0
#define SNDRV_SEQ_EVENT_RESULT 1
#define SNDRV_SEQ_EVENT_NOTE 5
@ -106,6 +106,7 @@ struct snd_seq_connect {
#define SNDRV_SEQ_PRIORITY_NORMAL (0 << 4)
#define SNDRV_SEQ_PRIORITY_HIGH (1 << 4)
#define SNDRV_SEQ_PRIORITY_MASK (1 << 4)
#define SNDRV_SEQ_EVENT_UMP (1 << 5)
struct snd_seq_ev_note {
unsigned char channel;
unsigned char note;
@ -163,7 +164,30 @@ struct snd_seq_ev_quote {
unsigned short value;
struct snd_seq_event * event;
} __attribute__((packed));
union snd_seq_event_data {
struct snd_seq_ev_note note;
struct snd_seq_ev_ctrl control;
struct snd_seq_ev_raw8 raw8;
struct snd_seq_ev_raw32 raw32;
struct snd_seq_ev_ext ext;
struct snd_seq_ev_queue_control queue;
union snd_seq_timestamp time;
struct snd_seq_addr addr;
struct snd_seq_connect connect;
struct snd_seq_result result;
struct snd_seq_ev_quote quote;
};
struct snd_seq_event {
snd_seq_event_type_t type;
unsigned char flags;
char tag;
unsigned char queue;
union snd_seq_timestamp time;
struct snd_seq_addr source;
struct snd_seq_addr dest;
union snd_seq_event_data data;
};
struct snd_seq_ump_event {
snd_seq_event_type_t type;
unsigned char flags;
char tag;
@ -172,18 +196,9 @@ struct snd_seq_event {
struct snd_seq_addr source;
struct snd_seq_addr dest;
union {
struct snd_seq_ev_note note;
struct snd_seq_ev_ctrl control;
struct snd_seq_ev_raw8 raw8;
struct snd_seq_ev_raw32 raw32;
struct snd_seq_ev_ext ext;
struct snd_seq_ev_queue_control queue;
union snd_seq_timestamp time;
struct snd_seq_addr addr;
struct snd_seq_connect connect;
struct snd_seq_result result;
struct snd_seq_ev_quote quote;
} data;
union snd_seq_event_data data;
unsigned int ump[4];
};
};
struct snd_seq_event_bounce {
int err;
@ -215,6 +230,7 @@ typedef int __bitwise snd_seq_client_type_t;
#define SNDRV_SEQ_FILTER_BROADCAST (1U << 0)
#define SNDRV_SEQ_FILTER_MULTICAST (1U << 1)
#define SNDRV_SEQ_FILTER_BOUNCE (1U << 2)
#define SNDRV_SEQ_FILTER_NO_CONVERT (1U << 30)
#define SNDRV_SEQ_FILTER_USE_EVENT (1U << 31)
struct snd_seq_client_info {
int client;
@ -227,8 +243,13 @@ struct snd_seq_client_info {
int event_lost;
int card;
int pid;
char reserved[56];
unsigned int midi_version;
unsigned int group_filter;
char reserved[48];
};
#define SNDRV_SEQ_CLIENT_LEGACY_MIDI 0
#define SNDRV_SEQ_CLIENT_UMP_MIDI_1_0 1
#define SNDRV_SEQ_CLIENT_UMP_MIDI_2_0 2
struct snd_seq_client_pool {
int client;
int output_pool;
@ -268,6 +289,8 @@ struct snd_seq_remove_events {
#define SNDRV_SEQ_PORT_CAP_SUBS_READ (1 << 5)
#define SNDRV_SEQ_PORT_CAP_SUBS_WRITE (1 << 6)
#define SNDRV_SEQ_PORT_CAP_NO_EXPORT (1 << 7)
#define SNDRV_SEQ_PORT_CAP_INACTIVE (1 << 8)
#define SNDRV_SEQ_PORT_CAP_UMP_ENDPOINT (1 << 9)
#define SNDRV_SEQ_PORT_TYPE_SPECIFIC (1 << 0)
#define SNDRV_SEQ_PORT_TYPE_MIDI_GENERIC (1 << 1)
#define SNDRV_SEQ_PORT_TYPE_MIDI_GM (1 << 2)
@ -275,6 +298,7 @@ struct snd_seq_remove_events {
#define SNDRV_SEQ_PORT_TYPE_MIDI_XG (1 << 4)
#define SNDRV_SEQ_PORT_TYPE_MIDI_MT32 (1 << 5)
#define SNDRV_SEQ_PORT_TYPE_MIDI_GM2 (1 << 6)
#define SNDRV_SEQ_PORT_TYPE_MIDI_UMP (1 << 7)
#define SNDRV_SEQ_PORT_TYPE_SYNTH (1 << 10)
#define SNDRV_SEQ_PORT_TYPE_DIRECT_SAMPLE (1 << 11)
#define SNDRV_SEQ_PORT_TYPE_SAMPLE (1 << 12)
@ -286,6 +310,10 @@ struct snd_seq_remove_events {
#define SNDRV_SEQ_PORT_FLG_GIVEN_PORT (1 << 0)
#define SNDRV_SEQ_PORT_FLG_TIMESTAMP (1 << 1)
#define SNDRV_SEQ_PORT_FLG_TIME_REAL (1 << 2)
#define SNDRV_SEQ_PORT_DIR_UNKNOWN 0
#define SNDRV_SEQ_PORT_DIR_INPUT 1
#define SNDRV_SEQ_PORT_DIR_OUTPUT 2
#define SNDRV_SEQ_PORT_DIR_BIDIRECTION 3
struct snd_seq_port_info {
struct snd_seq_addr addr;
char name[64];
@ -299,7 +327,9 @@ struct snd_seq_port_info {
void * kernel;
unsigned int flags;
unsigned char time_queue;
char reserved[59];
unsigned char direction;
unsigned char ump_group;
char reserved[57];
};
#define SNDRV_SEQ_QUEUE_FLG_SYNC (1 << 0)
struct snd_seq_queue_info {
@ -371,12 +401,22 @@ struct snd_seq_query_subs {
unsigned int flags;
char reserved[64];
};
#define SNDRV_SEQ_CLIENT_UMP_INFO_ENDPOINT 0
#define SNDRV_SEQ_CLIENT_UMP_INFO_BLOCK 1
struct snd_seq_client_ump_info {
int client;
int type;
unsigned char info[512];
} __attribute__((__packed__));
#define SNDRV_SEQ_IOCTL_PVERSION _IOR('S', 0x00, int)
#define SNDRV_SEQ_IOCTL_CLIENT_ID _IOR('S', 0x01, int)
#define SNDRV_SEQ_IOCTL_SYSTEM_INFO _IOWR('S', 0x02, struct snd_seq_system_info)
#define SNDRV_SEQ_IOCTL_RUNNING_MODE _IOWR('S', 0x03, struct snd_seq_running_info)
#define SNDRV_SEQ_IOCTL_USER_PVERSION _IOW('S', 0x04, int)
#define SNDRV_SEQ_IOCTL_GET_CLIENT_INFO _IOWR('S', 0x10, struct snd_seq_client_info)
#define SNDRV_SEQ_IOCTL_SET_CLIENT_INFO _IOW('S', 0x11, struct snd_seq_client_info)
#define SNDRV_SEQ_IOCTL_GET_CLIENT_UMP_INFO _IOWR('S', 0x12, struct snd_seq_client_ump_info)
#define SNDRV_SEQ_IOCTL_SET_CLIENT_UMP_INFO _IOWR('S', 0x13, struct snd_seq_client_ump_info)
#define SNDRV_SEQ_IOCTL_CREATE_PORT _IOWR('S', 0x20, struct snd_seq_port_info)
#define SNDRV_SEQ_IOCTL_DELETE_PORT _IOW('S', 0x21, struct snd_seq_port_info)
#define SNDRV_SEQ_IOCTL_GET_PORT_INFO _IOWR('S', 0x22, struct snd_seq_port_info)

62
libc/kernel/uapi/sound/asound.h
View file

@ -219,6 +219,7 @@ typedef int __bitwise snd_pcm_subformat_t;
#define SNDRV_PCM_INFO_DOUBLE 0x00000004
#define SNDRV_PCM_INFO_BATCH 0x00000010
#define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020
#define SNDRV_PCM_INFO_PERFECT_DRAIN 0x00000040
#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100
#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200
#define SNDRV_PCM_INFO_COMPLEX 0x00000400
@ -310,6 +311,7 @@ typedef int snd_pcm_hw_param_t;
#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1 << 0)
#define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1 << 1)
#define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1 << 2)
#define SNDRV_PCM_HW_PARAMS_NO_DRAIN_SILENCE (1 << 3)
struct snd_interval {
unsigned int min, max;
unsigned int openmin : 1, openmax : 1, integer : 1, empty : 1;
@ -565,7 +567,7 @@ enum {
#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 2)
#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 4)
enum {
SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
SNDRV_RAWMIDI_STREAM_INPUT,
@ -574,6 +576,7 @@ enum {
#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
#define SNDRV_RAWMIDI_INFO_UMP 0x00000008
struct snd_rawmidi_info {
unsigned int device;
unsigned int subdevice;
@ -622,6 +625,56 @@ struct snd_rawmidi_status {
size_t xruns;
unsigned char reserved[16];
};
#define SNDRV_UMP_EP_INFO_STATIC_BLOCKS 0x01
#define SNDRV_UMP_EP_INFO_PROTO_MIDI_MASK 0x0300
#define SNDRV_UMP_EP_INFO_PROTO_MIDI1 0x0100
#define SNDRV_UMP_EP_INFO_PROTO_MIDI2 0x0200
#define SNDRV_UMP_EP_INFO_PROTO_JRTS_MASK 0x0003
#define SNDRV_UMP_EP_INFO_PROTO_JRTS_TX 0x0001
#define SNDRV_UMP_EP_INFO_PROTO_JRTS_RX 0x0002
struct snd_ump_endpoint_info {
int card;
int device;
unsigned int flags;
unsigned int protocol_caps;
unsigned int protocol;
unsigned int num_blocks;
unsigned short version;
unsigned short family_id;
unsigned short model_id;
unsigned int manufacturer_id;
unsigned char sw_revision[4];
unsigned short padding;
unsigned char name[128];
unsigned char product_id[128];
unsigned char reserved[32];
} __attribute__((__packed__));
#define SNDRV_UMP_DIR_INPUT 0x01
#define SNDRV_UMP_DIR_OUTPUT 0x02
#define SNDRV_UMP_DIR_BIDIRECTION 0x03
#define SNDRV_UMP_BLOCK_IS_MIDI1 (1U << 0)
#define SNDRV_UMP_BLOCK_IS_LOWSPEED (1U << 1)
#define SNDRV_UMP_BLOCK_UI_HINT_UNKNOWN 0x00
#define SNDRV_UMP_BLOCK_UI_HINT_RECEIVER 0x01
#define SNDRV_UMP_BLOCK_UI_HINT_SENDER 0x02
#define SNDRV_UMP_BLOCK_UI_HINT_BOTH 0x03
#define SNDRV_UMP_MAX_GROUPS 16
#define SNDRV_UMP_MAX_BLOCKS 32
struct snd_ump_block_info {
int card;
int device;
unsigned char block_id;
unsigned char direction;
unsigned char active;
unsigned char first_group;
unsigned char num_groups;
unsigned char midi_ci_version;
unsigned char sysex8_streams;
unsigned char ui_hint;
unsigned int flags;
unsigned char name[128];
unsigned char reserved[32];
} __attribute__((__packed__));
#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
#define SNDRV_RAWMIDI_IOCTL_USER_PVERSION _IOW('W', 0x02, int)
@ -629,6 +682,8 @@ struct snd_rawmidi_status {
#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
#define SNDRV_UMP_IOCTL_ENDPOINT_INFO _IOR('W', 0x40, struct snd_ump_endpoint_info)
#define SNDRV_UMP_IOCTL_BLOCK_INFO _IOR('W', 0x41, struct snd_ump_block_info)
#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
enum {
SNDRV_TIMER_CLASS_NONE = - 1,
@ -763,7 +818,7 @@ struct snd_timer_tread {
unsigned int val;
__time_pad pad2;
};
#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 8)
#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 9)
struct snd_ctl_card_info {
int card;
int pad;
@ -909,6 +964,9 @@ struct snd_ctl_tlv {
#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
#define SNDRV_CTL_IOCTL_UMP_NEXT_DEVICE _IOWR('U', 0x43, int)
#define SNDRV_CTL_IOCTL_UMP_ENDPOINT_INFO _IOWR('U', 0x44, struct snd_ump_endpoint_info)
#define SNDRV_CTL_IOCTL_UMP_BLOCK_INFO _IOWR('U', 0x45, struct snd_ump_block_info)
#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
enum sndrv_ctl_event_type {

8
libc/kernel/uapi/sound/emu10k1.h
View file

@ -262,6 +262,8 @@ struct snd_emu10k1_fx8010_info {
#define EMU10K1_GPR_TRANSLATION_BASS 2
#define EMU10K1_GPR_TRANSLATION_TREBLE 3
#define EMU10K1_GPR_TRANSLATION_ONOFF 4
#define EMU10K1_GPR_TRANSLATION_NEGATE 5
#define EMU10K1_GPR_TRANSLATION_NEG_TABLE100 6
enum emu10k1_ctl_elem_iface {
EMU10K1_CTL_ELEM_IFACE_MIXER = 2,
EMU10K1_CTL_ELEM_IFACE_PCM = 3,
@ -279,9 +281,9 @@ struct snd_emu10k1_fx8010_control_gpr {
unsigned int vcount;
unsigned int count;
unsigned short gpr[32];
unsigned int value[32];
unsigned int min;
unsigned int max;
int value[32];
int min;
int max;
unsigned int translation;
const unsigned int * tlv;
};

4
libc/kernel/uapi/xen/evtchn.h
View file

@ -43,4 +43,8 @@ struct ioctl_evtchn_notify {
struct ioctl_evtchn_restrict_domid {
domid_t domid;
};
#define IOCTL_EVTCHN_BIND_STATIC _IOC(_IOC_NONE, 'E', 7, sizeof(struct ioctl_evtchn_bind))
struct ioctl_evtchn_bind {
unsigned int port;
};
#endif