Merge "[MIPS] Reimplement syscall to invoke the system call directly"

This commit is contained in:
Elliott Hughes 2013-11-15 01:01:06 +00:00 committed by Gerrit Code Review
commit 05ec00bf62
5 changed files with 58 additions and 25 deletions

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@ -304,4 +304,3 @@ int cacheflush:__ARM_NR_cacheflush(long start, long end, long flags) arm
# MIPS-specific
int _flush_cache:cacheflush(char* addr, const int nbytes, const int op) mips
int syscall(int number, ...) mips

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@ -0,0 +1,57 @@
/*
* Copyright (C) 2013 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <asm/unistd.h>
.text
.globl syscall
.align 4
.ent syscall
syscall:
.set noreorder
.cpload $t9
move $v0, $a0
move $a0, $a1
move $a1, $a2
move $a2, $a3
lw $a3, 16($sp)
lw $t0, 20($sp)
lw $t1, 24($sp)
sw $t0, 16($sp)
sw $t1, 20($sp)
syscall
bnez $a3, 1f
move $a0, $v0
j $ra
nop
1:
la $t9,__set_errno
j $t9
nop
.set reorder
.end syscall

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@ -11,6 +11,7 @@ _LIBC_ARCH_COMMON_SRC_FILES := \
arch-mips/bionic/setjmp.S \
arch-mips/bionic/__set_tls.c \
arch-mips/bionic/sigsetjmp.S \
arch-mips/bionic/syscall.S \
arch-mips/bionic/vfork.S \
arch-mips/string/memcpy.S \
arch-mips/string/memset.S \

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@ -175,7 +175,6 @@ syscall_src += arch-mips/syscalls/swapoff.S
syscall_src += arch-mips/syscalls/swapon.S
syscall_src += arch-mips/syscalls/symlinkat.S
syscall_src += arch-mips/syscalls/sync.S
syscall_src += arch-mips/syscalls/syscall.S
syscall_src += arch-mips/syscalls/sysinfo.S
syscall_src += arch-mips/syscalls/tgkill.S
syscall_src += arch-mips/syscalls/timerfd_create.S

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@ -1,23 +0,0 @@
/* Generated by gensyscalls.py. Do not edit. */
#include <asm/unistd.h>
.text
.globl syscall
.align 4
.ent syscall
syscall:
.set noreorder
.cpload $t9
li $v0, __NR_syscall
syscall
bnez $a3, 1f
move $a0, $v0
j $ra
nop
1:
la $t9,__set_errno
j $t9
nop
.set reorder
.end syscall