Remove unused mips/mips64 code from the linker.
Test: treehugger Change-Id: I42f1e4c492ac644cf78e7c1196ba9b3518f9c8f8
This commit is contained in:
Elliott Hughes
parent
7482e240cf
commit
14798930ec
10 changed files with 5 additions and 681 deletions
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@ -205,22 +205,6 @@ filegroup {
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],
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}
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filegroup {
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name: "linker_sources_mips",
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srcs: [
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"arch/mips/begin.S",
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"linker_mips.cpp",
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],
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}
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filegroup {
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name: "linker_sources_mips64",
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srcs: [
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"arch/mips64/begin.S",
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"linker_mips.cpp",
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],
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}
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cc_defaults {
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name: "linker_version_script_overlay",
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arch: {
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@ -228,8 +212,6 @@ cc_defaults {
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arm64: { version_script: "linker.generic.map" },
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x86: { version_script: "linker.generic.map" },
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x86_64: { version_script: "linker.generic.map" },
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mips: { version_script: "linker.generic.map" },
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mips64: { version_script: "linker.generic.map" },
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},
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}
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@ -257,14 +239,6 @@ cc_defaults {
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srcs: [":linker_sources_x86_64"],
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static_libs: ["libgcc_stripped"],
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},
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mips: {
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srcs: [":linker_sources_mips"],
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static_libs: ["libgcc_stripped"],
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},
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mips64: {
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srcs: [":linker_sources_mips64"],
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static_libs: ["libgcc_stripped"],
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},
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},
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// -shared is used to overwrite the -Bstatic and -static flags triggered by enabling
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@ -1,104 +0,0 @@
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/*
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* Copyright (C) 2012 The Android Open Source Project
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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.text
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.balign 16
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.type __start,@function
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.ent __start
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.globl __start
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.globl _start
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__start:
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_start:
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.set noreorder
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bal 1f
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nop
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1: .cpload $31
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.set reorder
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/* Discover the load address */
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la $t0, 1f
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bal 1f
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1: subu $t0, $ra, $t0
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#define DT_PLTGOT 3
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#define DT_MIPS_LOCAL_GOTNO 0x7000000a
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/* Search dynamic table for DT_MIPS_LOCAL_GOTNO and DT_PLTGOT values */
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la $t1, _DYNAMIC
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addu $t1, $t0
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li $t3, DT_PLTGOT
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li $t4, DT_MIPS_LOCAL_GOTNO
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0:
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lw $t2, 0($t1)
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beqz $t2, .Lrelocate_local_got
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bne $t2, $t3, 1f /* DT_PLTGOT? */
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lw $s0, 4($t1)
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addu $s0, $t0
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b 2f
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1: bne $t2, $t4, 1f /* DT_MIPS_LOCAL_GOTNO? */
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lw $s1, 4($t1)
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b 2f
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1:
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2: addu $t1, 8
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b 0b
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.Lrelocate_local_got:
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/*
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* Relocate the local GOT entries
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* got[0] is address of lazy resolver function
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* got[1] may be used for a GNU extension
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*/
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addu $s0, 4
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subu $s1, 1
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lw $t1, ($s0)
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bgez $t1, 9f
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addu $s0, 4
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subu $s1, 1
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b 9f
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1: lw $t1, ($s0)
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addu $t1, $t0
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sw $t1, ($s0)
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addu $s0, 4
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9: subu $s1, 1
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bgez $s1, 1b
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/* call linker_init */
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move $a0, $sp
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addiu $sp, -4*4 /* space for arg saves in linker_init */
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la $t9, __linker_init
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jalr $t9
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move $t9, $v0
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addu $sp, 4*4 /* restore sp */
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j $t9
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.end __start
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@ -1,124 +0,0 @@
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/*
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* Copyright (C) 2012 The Android Open Source Project
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <private/bionic_asm.h>
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#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
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#define ELF_DYNSZ 8
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#define ELF_DYN_TAG 0
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#define ELF_DYN_VAL 4
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#define GOTENT_SZ 4
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#else
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#define ELF_DYNSZ 16
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#define ELF_DYN_TAG 0
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#define ELF_DYN_VAL 8
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#define GOTENT_SZ 8
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#endif
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.text
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.balign 16
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.type __start,@function
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.ent __start
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.globl __start
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.globl _start
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__start:
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_start:
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.set noreorder
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bal 1f
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nop
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1:
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#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
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.cpload $ra
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#else
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.cpsetup $ra, $0, 1b
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#endif
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.set reorder
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/* Discover the load address */
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LA $t0, 1b
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PTR_SUBU $t0, $ra, $t0
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#define DT_PLTGOT 3
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#define DT_MIPS_LOCAL_GOTNO 0x7000000a
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/* Search dynamic table for DT_MIPS_LOCAL_GOTNO and DT_PLTGOT values */
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LA $t1, _DYNAMIC
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PTR_ADDU $t1, $t0
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LI $t3, DT_PLTGOT
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LI $ta0, DT_MIPS_LOCAL_GOTNO
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0:
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REG_L $t2, ELF_DYN_TAG($t1)
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beqz $t2, .Lrelocate_local_got
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bne $t2, $t3, 1f /* DT_PLTGOT? */
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REG_L $s0, ELF_DYN_VAL($t1)
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PTR_ADDU $s0, $t0
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b 2f
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1:
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bne $t2, $ta0, 2f /* DT_MIPS_LOCAL_GOTNO? */
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REG_L $s1, ELF_DYN_VAL($t1)
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2: PTR_ADDU $t1, ELF_DYNSZ
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b 0b
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.Lrelocate_local_got:
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/*
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* Relocate the local GOT entries
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* got[0] is address of lazy resolver function
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* got[1] may be used for a GNU extension
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*/
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PTR_ADDU $s0, GOTENT_SZ
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SUBU $s1, 1
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PTR_L $t1, ($s0)
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bgez $t1, 9f
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PTR_ADDU $s0, GOTENT_SZ
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SUBU $s1, 1
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b 9f
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1: PTR_L $t1, ($s0)
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PTR_ADDU $t1, $t0
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PTR_S $t1, ($s0)
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PTR_ADDU $s0, GOTENT_SZ
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9: SUBU $s1, 1
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bgez $s1, 1b
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/* call linker_init */
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move $a0, $sp
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#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
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PTR_SUBU $sp, 4*REGSZ /* space for arg saves in linker_init */
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#endif
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jal __linker_init
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#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
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PTR_ADDU $sp, 4*REGSZ /* restore sp */
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#endif
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move $t9, $v0
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j $t9
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.end __start
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@ -2949,25 +2949,15 @@ bool soinfo::prelink_image() {
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break;
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case DT_PLTGOT:
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#if defined(__mips__)
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// Used by mips and mips64.
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plt_got_ = reinterpret_cast<ElfW(Addr)**>(load_bias + d->d_un.d_ptr);
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#endif
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// Ignore for other platforms... (because RTLD_LAZY is not supported)
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// Ignored (because RTLD_LAZY is not supported).
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break;
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case DT_DEBUG:
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// Set the DT_DEBUG entry to the address of _r_debug for GDB
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// if the dynamic table is writable
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// FIXME: not working currently for N64
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// The flags for the LOAD and DYNAMIC program headers do not agree.
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// The LOAD section containing the dynamic table has been mapped as
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// read-only, but the DYNAMIC header claims it is writable.
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#if !(defined(__mips__) && defined(__LP64__))
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if ((dynamic_flags & PF_W) != 0) {
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d->d_un.d_val = reinterpret_cast<uintptr_t>(&_r_debug);
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}
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#endif
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break;
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#if defined(USE_RELA)
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case DT_RELA:
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@ -3162,41 +3152,7 @@ bool soinfo::prelink_image() {
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get_realpath(), reinterpret_cast<void*>(d->d_un.d_val));
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}
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break;
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#if defined(__mips__)
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case DT_MIPS_RLD_MAP:
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// Set the DT_MIPS_RLD_MAP entry to the address of _r_debug for GDB.
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{
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r_debug** dp = reinterpret_cast<r_debug**>(load_bias + d->d_un.d_ptr);
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*dp = &_r_debug;
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}
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break;
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case DT_MIPS_RLD_MAP_REL:
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// Set the DT_MIPS_RLD_MAP_REL entry to the address of _r_debug for GDB.
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{
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r_debug** dp = reinterpret_cast<r_debug**>(
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reinterpret_cast<ElfW(Addr)>(d) + d->d_un.d_val);
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*dp = &_r_debug;
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}
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break;
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case DT_MIPS_RLD_VERSION:
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case DT_MIPS_FLAGS:
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case DT_MIPS_BASE_ADDRESS:
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case DT_MIPS_UNREFEXTNO:
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break;
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case DT_MIPS_SYMTABNO:
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mips_symtabno_ = d->d_un.d_val;
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break;
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case DT_MIPS_LOCAL_GOTNO:
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mips_local_gotno_ = d->d_un.d_val;
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break;
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case DT_MIPS_GOTSYM:
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mips_gotsym_ = d->d_un.d_val;
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break;
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#endif
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// Ignored: "Its use has been superseded by the DF_BIND_NOW flag"
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case DT_BIND_NOW:
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break;
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@ -3254,12 +3210,6 @@ bool soinfo::prelink_image() {
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}
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}
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#if defined(__mips__) && !defined(__LP64__)
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if (!mips_check_and_adjust_fp_modes()) {
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return false;
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}
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#endif
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DEBUG("si->base = %p, si->strtab = %p, si->symtab = %p",
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reinterpret_cast<void*>(base), strtab_, symtab_);
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|
|
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@ -51,20 +51,6 @@
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#define ELFW(what) ELF32_ ## what
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#endif
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// mips64 interprets Elf64_Rel structures' r_info field differently.
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// bionic (like other C libraries) has macros that assume regular ELF files,
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// but the dynamic linker needs to be able to load mips64 ELF files.
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#if defined(__mips__) && defined(__LP64__)
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#undef ELF64_R_SYM
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#undef ELF64_R_TYPE
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#undef ELF64_R_INFO
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#define ELF64_R_SYM(info) (((info) >> 0) & 0xffffffff)
|
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#define ELF64_R_SSYM(info) (((info) >> 32) & 0xff)
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#define ELF64_R_TYPE3(info) (((info) >> 40) & 0xff)
|
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#define ELF64_R_TYPE2(info) (((info) >> 48) & 0xff)
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#define ELF64_R_TYPE(info) (((info) >> 56) & 0xff)
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#endif
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|
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#define SUPPORTED_DT_FLAGS_1 (DF_1_NOW | DF_1_GLOBAL | DF_1_NODELETE | DF_1_PIE)
|
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|
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// Class used construct version dependency graph.
|
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|
|
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|
|
@ -33,11 +33,8 @@
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|
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#include <android-base/macros.h>
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|
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// TODO(dimitry): move this to linker_defines.h? Unless it is removed by
|
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// consequent refactoring steps.
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|
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// Android uses RELA for aarch64 and x86_64. mips64 still uses REL.
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#if defined(__aarch64__) || defined(__x86_64__)
|
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// Android uses RELA for LP64.
|
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#if defined(__LP64__)
|
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#define USE_RELA 1
|
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#endif
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||||
|
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|
|
|
|||
|
|
@ -1,334 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2015 The Android Open Source Project
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#if !defined(__LP64__) && __mips_isa_rev >= 5
|
||||
#include <sys/prctl.h>
|
||||
#endif
|
||||
|
||||
#include "linker.h"
|
||||
#include "linker_debug.h"
|
||||
#include "linker_globals.h"
|
||||
#include "linker_phdr.h"
|
||||
#include "linker_relocs.h"
|
||||
#include "linker_reloc_iterators.h"
|
||||
#include "linker_sleb128.h"
|
||||
#include "linker_soinfo.h"
|
||||
|
||||
template bool soinfo::relocate<plain_reloc_iterator>(const VersionTracker& version_tracker,
|
||||
plain_reloc_iterator&& rel_iterator,
|
||||
const soinfo_list_t& global_group,
|
||||
const soinfo_list_t& local_group);
|
||||
|
||||
template bool soinfo::relocate<packed_reloc_iterator<sleb128_decoder>>(
|
||||
const VersionTracker& version_tracker,
|
||||
packed_reloc_iterator<sleb128_decoder>&& rel_iterator,
|
||||
const soinfo_list_t& global_group,
|
||||
const soinfo_list_t& local_group);
|
||||
|
||||
template <typename ElfRelIteratorT>
|
||||
bool soinfo::relocate(const VersionTracker& version_tracker,
|
||||
ElfRelIteratorT&& rel_iterator,
|
||||
const soinfo_list_t& global_group,
|
||||
const soinfo_list_t& local_group) {
|
||||
for (size_t idx = 0; rel_iterator.has_next(); ++idx) {
|
||||
const auto rel = rel_iterator.next();
|
||||
|
||||
if (rel == nullptr) {
|
||||
return false;
|
||||
}
|
||||
|
||||
ElfW(Word) type = ELFW(R_TYPE)(rel->r_info);
|
||||
ElfW(Word) sym = ELFW(R_SYM)(rel->r_info);
|
||||
|
||||
ElfW(Addr) reloc = static_cast<ElfW(Addr)>(rel->r_offset + load_bias);
|
||||
ElfW(Addr) sym_addr = 0;
|
||||
const char* sym_name = nullptr;
|
||||
|
||||
DEBUG("Processing \"%s\" relocation at index %zd", get_realpath(), idx);
|
||||
if (type == R_GENERIC_NONE) {
|
||||
continue;
|
||||
}
|
||||
|
||||
const ElfW(Sym)* s = nullptr;
|
||||
soinfo* lsi = nullptr;
|
||||
|
||||
if (sym != 0) {
|
||||
sym_name = get_string(symtab_[sym].st_name);
|
||||
const version_info* vi = nullptr;
|
||||
|
||||
if (!lookup_version_info(version_tracker, sym, sym_name, &vi)) {
|
||||
return false;
|
||||
}
|
||||
|
||||
if (!soinfo_do_lookup(this, sym_name, vi, &lsi, global_group, local_group, &s)) {
|
||||
return false;
|
||||
}
|
||||
|
||||
if (s == nullptr) {
|
||||
// mips does not support relocation with weak-undefined symbols
|
||||
DL_ERR("cannot locate symbol \"%s\" referenced by \"%s\"...",
|
||||
sym_name, get_realpath());
|
||||
return false;
|
||||
} else {
|
||||
// We got a definition.
|
||||
sym_addr = lsi->resolve_symbol_address(s);
|
||||
}
|
||||
count_relocation(kRelocSymbol);
|
||||
}
|
||||
|
||||
switch (type) {
|
||||
case R_MIPS_REL32:
|
||||
#if defined(__LP64__)
|
||||
// MIPS Elf64_Rel entries contain compound relocations
|
||||
// We only handle the R_MIPS_NONE|R_MIPS_64|R_MIPS_REL32 case
|
||||
if (ELF64_R_TYPE2(rel->r_info) != R_MIPS_64 ||
|
||||
ELF64_R_TYPE3(rel->r_info) != R_MIPS_NONE) {
|
||||
DL_ERR("Unexpected compound relocation type:%d type2:%d type3:%d @ %p (%zu)",
|
||||
type, static_cast<unsigned>(ELF64_R_TYPE2(rel->r_info)),
|
||||
static_cast<unsigned>(ELF64_R_TYPE3(rel->r_info)), rel, idx);
|
||||
return false;
|
||||
}
|
||||
#endif
|
||||
count_relocation(s == nullptr ? kRelocAbsolute : kRelocRelative);
|
||||
MARK(rel->r_offset);
|
||||
TRACE_TYPE(RELO, "RELO REL32 %08zx <- %08zx %s", static_cast<size_t>(reloc),
|
||||
static_cast<size_t>(sym_addr), sym_name ? sym_name : "*SECTIONHDR*");
|
||||
if (s != nullptr) {
|
||||
*reinterpret_cast<ElfW(Addr)*>(reloc) += sym_addr;
|
||||
} else {
|
||||
*reinterpret_cast<ElfW(Addr)*>(reloc) += load_bias;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
DL_ERR("unknown reloc type %d @ %p (%zu)", type, rel, idx);
|
||||
return false;
|
||||
}
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
bool soinfo::mips_relocate_got(const VersionTracker& version_tracker,
|
||||
const soinfo_list_t& global_group,
|
||||
const soinfo_list_t& local_group) {
|
||||
ElfW(Addr)** got = plt_got_;
|
||||
if (got == nullptr) {
|
||||
return true;
|
||||
}
|
||||
|
||||
// got[0] is the address of the lazy resolver function.
|
||||
// got[1] may be used for a GNU extension.
|
||||
// FIXME: maybe this should be in a separate routine?
|
||||
if ((flags_ & FLAG_LINKER) == 0) {
|
||||
size_t g = 1;
|
||||
// Check for the high bit to determine whether to skip got[1]
|
||||
if (reinterpret_cast<intptr_t>(got[g]) < 0) {
|
||||
g++;
|
||||
}
|
||||
// Relocate the local GOT entries.
|
||||
for (; g < mips_local_gotno_; g++) {
|
||||
got[g] = reinterpret_cast<ElfW(Addr)*>(reinterpret_cast<uintptr_t>(got[g]) + load_bias);
|
||||
}
|
||||
}
|
||||
|
||||
// Now for the global GOT entries...
|
||||
got = plt_got_ + mips_local_gotno_;
|
||||
for (ElfW(Word) sym = mips_gotsym_; sym < mips_symtabno_; sym++, got++) {
|
||||
// This is an undefined reference... try to locate it.
|
||||
const ElfW(Sym)* local_sym = symtab_ + sym;
|
||||
const char* sym_name = get_string(local_sym->st_name);
|
||||
soinfo* lsi = nullptr;
|
||||
const ElfW(Sym)* s = nullptr;
|
||||
|
||||
ElfW(Word) st_visibility = (local_sym->st_other & 0x3);
|
||||
|
||||
if (st_visibility == STV_DEFAULT) {
|
||||
const version_info* vi = nullptr;
|
||||
|
||||
if (!lookup_version_info(version_tracker, sym, sym_name, &vi)) {
|
||||
return false;
|
||||
}
|
||||
|
||||
if (!soinfo_do_lookup(this, sym_name, vi, &lsi, global_group, local_group, &s)) {
|
||||
return false;
|
||||
}
|
||||
} else if (st_visibility == STV_PROTECTED) {
|
||||
if (local_sym->st_value == 0) {
|
||||
DL_ERR("%s: invalid symbol \"%s\" (PROTECTED/UNDEFINED) ",
|
||||
get_realpath(), sym_name);
|
||||
return false;
|
||||
}
|
||||
s = local_sym;
|
||||
lsi = this;
|
||||
} else {
|
||||
DL_ERR("%s: invalid symbol \"%s\" visibility: 0x%x",
|
||||
get_realpath(), sym_name, st_visibility);
|
||||
return false;
|
||||
}
|
||||
|
||||
if (s == nullptr) {
|
||||
// We only allow an undefined symbol if this is a weak reference.
|
||||
if (ELF_ST_BIND(local_sym->st_info) != STB_WEAK) {
|
||||
DL_ERR("%s: cannot locate \"%s\"...", get_realpath(), sym_name);
|
||||
return false;
|
||||
}
|
||||
*got = 0;
|
||||
} else {
|
||||
// FIXME: is this sufficient?
|
||||
// For reference see NetBSD link loader
|
||||
// http://cvsweb.netbsd.org/bsdweb.cgi/src/libexec/ld.elf_so/arch/mips/mips_reloc.c?rev=1.53&content-type=text/x-cvsweb-markup
|
||||
*got = reinterpret_cast<ElfW(Addr)*>(lsi->resolve_symbol_address(s));
|
||||
}
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
#if !defined(__LP64__)
|
||||
|
||||
// Checks for mips32's various floating point abis.
|
||||
// (Mips64 Android has a single floating point abi and doesn't need any checks)
|
||||
|
||||
// Linux kernel has declarations similar to the following
|
||||
// in <linux>/arch/mips/include/asm/elf.h,
|
||||
// but that non-uapi internal header file will never be imported
|
||||
// into bionic's kernel headers.
|
||||
|
||||
#define PT_MIPS_ABIFLAGS 0x70000003 // is .MIPS.abiflags segment
|
||||
|
||||
struct mips_elf_abiflags_v0 {
|
||||
uint16_t version; // version of this structure
|
||||
uint8_t isa_level, isa_rev, gpr_size, cpr1_size, cpr2_size;
|
||||
uint8_t fp_abi; // mips32 ABI variants for floating point
|
||||
uint32_t isa_ext, ases, flags1, flags2;
|
||||
};
|
||||
|
||||
// Bits of flags1:
|
||||
#define MIPS_AFL_FLAGS1_ODDSPREG 1 // Uses odd-numbered single-prec fp regs
|
||||
|
||||
// Some values of fp_abi: via compiler flag:
|
||||
#define MIPS_ABI_FP_ANY 0 // Not tagged or not using any ABIs affected by the differences.
|
||||
#define MIPS_ABI_FP_DOUBLE 1 // -mdouble-float
|
||||
#define MIPS_ABI_FP_XX 5 // -mfpxx
|
||||
#define MIPS_ABI_FP_64A 7 // -mips32r* -mfp64 -mno-odd-spreg
|
||||
|
||||
#if __mips_isa_rev >= 5
|
||||
static bool mips_fre_mode_on = false; // have set FRE=1 mode for process
|
||||
#endif
|
||||
|
||||
bool soinfo::mips_check_and_adjust_fp_modes() {
|
||||
mips_elf_abiflags_v0* abiflags = nullptr;
|
||||
int mips_fpabi;
|
||||
|
||||
// Find soinfo's optional .MIPS.abiflags segment
|
||||
for (size_t i = 0; i<phnum; ++i) {
|
||||
const ElfW(Phdr)& ph = phdr[i];
|
||||
if (ph.p_type == PT_MIPS_ABIFLAGS) {
|
||||
if (ph.p_filesz < sizeof (mips_elf_abiflags_v0)) {
|
||||
DL_ERR("Corrupt PT_MIPS_ABIFLAGS header found \"%s\"", get_realpath());
|
||||
return false;
|
||||
}
|
||||
abiflags = reinterpret_cast<mips_elf_abiflags_v0*>(ph.p_vaddr + load_bias);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
// FP ABI-variant compatibility checks for MIPS o32 ABI
|
||||
if (abiflags == nullptr) {
|
||||
// Old compilers lack the new abiflags section.
|
||||
// These compilers used -mfp32 -mdouble-float -modd-spreg defaults,
|
||||
// ie FP32 aka DOUBLE, using odd-numbered single-prec regs
|
||||
mips_fpabi = MIPS_ABI_FP_DOUBLE;
|
||||
} else {
|
||||
mips_fpabi = abiflags->fp_abi;
|
||||
if ( (abiflags->flags1 & MIPS_AFL_FLAGS1_ODDSPREG)
|
||||
&& (mips_fpabi == MIPS_ABI_FP_XX ||
|
||||
mips_fpabi == MIPS_ABI_FP_64A ) ) {
|
||||
// Android supports fewer cases than Linux
|
||||
DL_ERR("Unsupported odd-single-prec FloatPt reg uses in \"%s\"",
|
||||
get_realpath());
|
||||
return false;
|
||||
}
|
||||
}
|
||||
if (!(mips_fpabi == MIPS_ABI_FP_DOUBLE ||
|
||||
#if __mips_isa_rev >= 5
|
||||
mips_fpabi == MIPS_ABI_FP_64A ||
|
||||
#endif
|
||||
mips_fpabi == MIPS_ABI_FP_ANY ||
|
||||
mips_fpabi == MIPS_ABI_FP_XX )) {
|
||||
DL_ERR("Unsupported MIPS32 FloatPt ABI %d found in \"%s\"",
|
||||
mips_fpabi, get_realpath());
|
||||
return false;
|
||||
}
|
||||
|
||||
#if __mips_isa_rev >= 5
|
||||
// Adjust process's FR Emulation mode, if needed
|
||||
//
|
||||
// On Mips R5 & R6, Android runs continuously in FR=1 64bit-fpreg mode.
|
||||
// NDK mips32 apps compiled with old compilers generate FP32 code
|
||||
// which expects FR=0 32-bit fp registers.
|
||||
// NDK mips32 apps compiled with newer compilers generate modeless
|
||||
// FPXX code which runs on both FR=0 and FR=1 modes.
|
||||
// Android itself is compiled in FP64A which requires FR=1 mode.
|
||||
// FP32, FPXX, and FP64A all interlink okay, without dynamic FR mode
|
||||
// changes during calls. For details, see
|
||||
// http://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking
|
||||
// Processes containing FR32 FR=0 code are run via kernel software assist,
|
||||
// which maps all odd-numbered single-precision reg refs onto the
|
||||
// upper half of the paired even-numbered double-precision reg.
|
||||
// FRE=1 triggers traps to the kernel's emulator on every single-precision
|
||||
// fp op (for both odd and even-numbered registers).
|
||||
// Turning on FRE=1 traps is done at most once per process, simultanously
|
||||
// for all threads of that process, when dlopen discovers FP32 code.
|
||||
// The kernel repacks threads' registers when FRE mode is turn on or off.
|
||||
// These asynchronous adjustments are wrong if any thread was executing
|
||||
// FPXX code using odd-numbered single-precision regs.
|
||||
// Current Android compilers default to the -mno-oddspreg option,
|
||||
// and this requirement is checked by Android's dlopen.
|
||||
// So FRE can always be safely turned on for FP32, anytime.
|
||||
// Deferred enhancement: Allow loading of odd-spreg FPXX modules.
|
||||
|
||||
if (mips_fpabi == MIPS_ABI_FP_DOUBLE && !mips_fre_mode_on) {
|
||||
// Turn on FRE mode, which emulates mode-sensitive FR=0 code on FR=1
|
||||
// register files, by trapping to kernel on refs to single-precision regs
|
||||
if (prctl(PR_SET_FP_MODE, PR_FP_MODE_FR|PR_FP_MODE_FRE)) {
|
||||
DL_ERR("Kernel or cpu failed to set FRE mode required for running \"%s\"",
|
||||
get_realpath());
|
||||
return false;
|
||||
}
|
||||
DL_WARN("Using FRE=1 mode to run \"%s\"", get_realpath());
|
||||
mips_fre_mode_on = true; // Avoid future redundant mode-switch calls
|
||||
// FRE mode is never turned back off.
|
||||
// Deferred enhancement:
|
||||
// Reset FRE mode when dlclose() removes all FP32 modules
|
||||
}
|
||||
#else
|
||||
// Android runs continuously in FR=0 32bit-fpreg mode.
|
||||
#endif // __mips_isa_rev
|
||||
return true;
|
||||
}
|
||||
|
||||
#endif // __LP64___
|
||||
|
|
@ -51,8 +51,6 @@ static int GetTargetElfMachine() {
|
|||
return EM_AARCH64;
|
||||
#elif defined(__i386__)
|
||||
return EM_386;
|
||||
#elif defined(__mips__)
|
||||
return EM_MIPS;
|
||||
#elif defined(__x86_64__)
|
||||
return EM_X86_64;
|
||||
#endif
|
||||
|
|
@ -204,7 +202,6 @@ static const char* EM_to_string(int em) {
|
|||
if (em == EM_386) return "EM_386";
|
||||
if (em == EM_AARCH64) return "EM_AARCH64";
|
||||
if (em == EM_ARM) return "EM_ARM";
|
||||
if (em == EM_MIPS) return "EM_MIPS";
|
||||
if (em == EM_X86_64) return "EM_X86_64";
|
||||
return "EM_???";
|
||||
}
|
||||
|
|
|
|||
|
|
@ -643,12 +643,6 @@ bool soinfo::relocate(const SymbolLookupList& lookup_list) {
|
|||
}
|
||||
#endif
|
||||
|
||||
#if defined(__mips__)
|
||||
if (!mips_relocate_got(version_tracker, global_group, local_group)) {
|
||||
return false;
|
||||
}
|
||||
#endif
|
||||
|
||||
// Once the tlsdesc_args_ vector's size is finalized, we can write the addresses of its elements
|
||||
// into the TLSDESC relocations.
|
||||
#if defined(__aarch64__)
|
||||
|
|
|
|||
|
|
@ -191,10 +191,8 @@ struct soinfo {
|
|||
uint32_t* bucket_;
|
||||
uint32_t* chain_;
|
||||
|
||||
#if defined(__mips__) || !defined(__LP64__)
|
||||
// This is only used by mips and mips64, but needs to be here for
|
||||
// all 32-bit architectures to preserve binary compatibility.
|
||||
ElfW(Addr)** plt_got_;
|
||||
#if !defined(__LP64__)
|
||||
ElfW(Addr)** unused4; // DO NOT USE, maintained for compatibility
|
||||
#endif
|
||||
|
||||
#if defined(USE_RELA)
|
||||
|
|
@ -228,16 +226,6 @@ struct soinfo {
|
|||
uint32_t* ARM_exidx;
|
||||
size_t ARM_exidx_count;
|
||||
private:
|
||||
#elif defined(__mips__)
|
||||
uint32_t mips_symtabno_;
|
||||
uint32_t mips_local_gotno_;
|
||||
uint32_t mips_gotsym_;
|
||||
bool mips_relocate_got(const VersionTracker& version_tracker,
|
||||
const soinfo_list_t& global_group,
|
||||
const soinfo_list_t& local_group);
|
||||
#if !defined(__LP64__)
|
||||
bool mips_check_and_adjust_fp_modes();
|
||||
#endif
|
||||
#endif
|
||||
size_t ref_count_;
|
||||
public:
|
||||
|
|
|
|||
Loading…
Reference in a new issue