Merge "Make MTE tests pass with all values of MEMTAG_OPTIONS." am: a55c81e36e
Original change: https://android-review.googlesource.com/c/platform/bionic/+/1763491 Change-Id: I6b9c13fd09ccd4e94d804cde51b1018ef98c1317
This commit is contained in:
commit
237498c48f
3 changed files with 20 additions and 10 deletions
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@ -86,16 +86,15 @@ void ExitWithSiCode(int, siginfo_t* info, void*) {
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TEST(heap_tagging_level, sync_async_bad_accesses_die) {
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#if defined(__BIONIC__) && defined(__aarch64__)
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if (!(getauxval(AT_HWCAP2) & HWCAP2_MTE)) {
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GTEST_SKIP() << "requires MTE support";
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if (!mte_supported() || !running_with_mte()) {
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GTEST_SKIP() << "requires MTE to be enabled";
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}
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std::unique_ptr<int[]> p = std::make_unique<int[]>(4);
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// First, check that memory tagging is enabled and the default tag checking level is sync.
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// cc_test targets get sync MTE by default.
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// We assume that scudo is used on all MTE enabled hardware; scudo inserts a header with a
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// mismatching tag before each allocation.
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EXPECT_TRUE(SetHeapTaggingLevel(M_HEAP_TAGGING_LEVEL_SYNC));
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EXPECT_EXIT(
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{
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ScopedSignalHandler ssh(SIGSEGV, ExitWithSiCode, SA_SIGINFO);
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@ -136,7 +135,7 @@ TEST(heap_tagging_level, tagging_level_transitions) {
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EXPECT_FALSE(SetHeapTaggingLevel(static_cast<HeapTaggingLevel>(12345)));
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if (mte_supported()) {
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if (mte_supported() && running_with_mte()) {
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// ASYNC -> ...
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EXPECT_FALSE(SetHeapTaggingLevel(M_HEAP_TAGGING_LEVEL_TBI));
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EXPECT_TRUE(SetHeapTaggingLevel(M_HEAP_TAGGING_LEVEL_ASYNC));
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@ -146,14 +145,14 @@ TEST(heap_tagging_level, tagging_level_transitions) {
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EXPECT_FALSE(SetHeapTaggingLevel(M_HEAP_TAGGING_LEVEL_TBI));
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EXPECT_TRUE(SetHeapTaggingLevel(M_HEAP_TAGGING_LEVEL_SYNC));
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EXPECT_TRUE(SetHeapTaggingLevel(M_HEAP_TAGGING_LEVEL_ASYNC));
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} else {
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} else if (!mte_supported()) {
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// TBI -> ...
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EXPECT_TRUE(SetHeapTaggingLevel(M_HEAP_TAGGING_LEVEL_TBI));
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EXPECT_FALSE(SetHeapTaggingLevel(M_HEAP_TAGGING_LEVEL_ASYNC));
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EXPECT_FALSE(SetHeapTaggingLevel(M_HEAP_TAGGING_LEVEL_SYNC));
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}
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// TBI -> NONE on non-MTE, ASYNC -> NONE on MTE.
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// TBI -> NONE on non-MTE, ASYNC|SYNC|NONE -> NONE on MTE.
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EXPECT_TRUE(SetHeapTaggingLevel(M_HEAP_TAGGING_LEVEL_NONE));
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// NONE -> ...
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@ -170,8 +169,8 @@ TEST(heap_tagging_level, tagging_level_transition_sync_none) {
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#if defined(__BIONIC__) && defined(__aarch64__)
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// We can't test SYNC -> NONE in tagging_level_transitions because we can only make one transition
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// to NONE (which we use to test ASYNC -> NONE), so we test it here separately.
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if (!mte_supported()) {
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GTEST_SKIP() << "requires MTE support";
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if (!mte_supported() || !running_with_mte()) {
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GTEST_SKIP() << "requires MTE to be enabled";
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}
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EXPECT_TRUE(SetHeapTaggingLevel(M_HEAP_TAGGING_LEVEL_SYNC));
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@ -38,7 +38,7 @@ static void test_tag_mismatch() {
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#endif
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}
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#if defined(__aarch64__)
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if (mte_supported()) {
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if (mte_supported() && running_with_mte()) {
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EXPECT_DEATH(
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{
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volatile int load ATTRIBUTE_UNUSED = *mistagged_p;
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@ -21,6 +21,7 @@
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#include <fcntl.h>
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#include <inttypes.h>
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#include <sys/mman.h>
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#include <sys/prctl.h>
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#include <sys/types.h>
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#include <sys/wait.h>
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#include <unistd.h>
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@ -304,3 +305,13 @@ template <class Tp>
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static inline void DoNotOptimize(Tp& value) {
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asm volatile("" : "+r,m"(value) : : "memory");
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}
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static inline bool running_with_mte() {
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#ifdef __aarch64__
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int level = prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0);
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return level >= 0 && (level & PR_TAGGED_ADDR_ENABLE) &&
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(level & PR_MTE_TCF_MASK) != PR_MTE_TCF_NONE;
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#else
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return false;
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#endif
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}
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