Update to v5.10 kernel headers.

Kernel headers coming from:

Git: https://android.googlesource.com/kernel/common/
Branch: android-mainline
Tag: android-mainline-5.10

Test: Built cuttlefish and flame images. Ran bionic unit tests on both.
Change-Id: I37ffc850970adcce1febbe2269c202632fce763a
This commit is contained in:
Christopher Ferris 2020-12-14 13:10:04 -08:00
parent ac5e61fe00
commit 32ff3f831c
96 changed files with 999 additions and 187 deletions

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@ -780,6 +780,9 @@
#if defined(__NR_prlimit64)
#define SYS_prlimit64 __NR_prlimit64
#endif
#if defined(__NR_process_madvise)
#define SYS_process_madvise __NR_process_madvise
#endif
#if defined(__NR_process_vm_readv)
#define SYS_process_vm_readv __NR_process_vm_readv
#endif

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@ -19,7 +19,7 @@
#ifndef _UAPI__ASMARM_SETUP_H
#define _UAPI__ASMARM_SETUP_H
#include <linux/types.h>
#define COMMAND_LINE_SIZE 1024
#define COMMAND_LINE_SIZE 2048
#define ATAG_NONE 0x00000000
struct tag_header {
__u32 size;

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@ -411,4 +411,5 @@
#define __NR_openat2 (__NR_SYSCALL_BASE + 437)
#define __NR_pidfd_getfd (__NR_SYSCALL_BASE + 438)
#define __NR_faccessat2 (__NR_SYSCALL_BASE + 439)
#define __NR_process_madvise (__NR_SYSCALL_BASE + 440)
#endif

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@ -68,4 +68,5 @@
#define HWCAP2_DGH (1 << 15)
#define HWCAP2_RNG (1 << 16)
#define HWCAP2_BTI (1 << 17)
#define HWCAP2_MTE (1 << 18)
#endif

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@ -99,6 +99,14 @@ struct kvm_sync_regs {
};
struct kvm_arch_memory_slot {
};
struct kvm_pmu_event_filter {
__u16 base_event;
__u16 nevents;
#define KVM_PMU_EVENT_ALLOW 0
#define KVM_PMU_EVENT_DENY 1
__u8 action;
__u8 pad[3];
};
struct kvm_vcpu_events {
struct {
__u8 serror_pending;
@ -194,6 +202,7 @@ struct kvm_vcpu_events {
#define KVM_ARM_VCPU_PMU_V3_CTRL 0
#define KVM_ARM_VCPU_PMU_V3_IRQ 0
#define KVM_ARM_VCPU_PMU_V3_INIT 1
#define KVM_ARM_VCPU_PMU_V3_FILTER 2
#define KVM_ARM_VCPU_TIMER_CTRL 1
#define KVM_ARM_VCPU_TIMER_IRQ_VTIMER 0
#define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1

View file

@ -20,4 +20,5 @@
#define _UAPI__ASM_MMAN_H
#include <asm-generic/mman.h>
#define PROT_BTI 0x10
#define PROT_MTE 0x20
#endif

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@ -39,6 +39,7 @@
#define PSR_PAN_BIT 0x00400000
#define PSR_UAO_BIT 0x00800000
#define PSR_DIT_BIT 0x01000000
#define PSR_TCO_BIT 0x02000000
#define PSR_V_BIT 0x10000000
#define PSR_C_BIT 0x20000000
#define PSR_Z_BIT 0x40000000
@ -54,6 +55,8 @@
#define PSR_BTYPE_J (0b11 << PSR_BTYPE_SHIFT)
#define PTRACE_SYSEMU 31
#define PTRACE_SYSEMU_SINGLESTEP 32
#define PTRACE_PEEKMTETAGS 33
#define PTRACE_POKEMTETAGS 34
#ifndef __ASSEMBLY__
struct user_pt_regs {
__u64 regs[31];

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@ -20,6 +20,7 @@
#define _ASM_GENERIC_HUGETLB_ENCODE_H_
#define HUGETLB_FLAG_ENCODE_SHIFT 26
#define HUGETLB_FLAG_ENCODE_MASK 0x3f
#define HUGETLB_FLAG_ENCODE_16KB (14 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_64KB (16 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_512KB (19 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_1MB (20 << HUGETLB_FLAG_ENCODE_SHIFT)

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@ -179,7 +179,9 @@ typedef struct siginfo {
#define SEGV_ACCADI 5
#define SEGV_ADIDERR 6
#define SEGV_ADIPERR 7
#define NSIGSEGV 7
#define SEGV_MTEAERR 8
#define SEGV_MTESERR 9
#define NSIGSEGV 9
#define BUS_ADRALN 1
#define BUS_ADRERR 2
#define BUS_OBJERR 3

View file

@ -400,8 +400,9 @@
#define __NR_openat2 437
#define __NR_pidfd_getfd 438
#define __NR_faccessat2 439
#define __NR_process_madvise 440
#undef __NR_syscalls
#define __NR_syscalls 440
#define __NR_syscalls 441
#if __BITS_PER_LONG == 64 && !defined(__SYSCALL_COMPAT)
#define __NR_fcntl __NR3264_fcntl
#define __NR_statfs __NR3264_statfs

View file

@ -171,6 +171,22 @@ struct kvm_msr_list {
__u32 nmsrs;
__u32 indices[0];
};
#define KVM_MSR_FILTER_MAX_BITMAP_SIZE 0x600
struct kvm_msr_filter_range {
#define KVM_MSR_FILTER_READ (1 << 0)
#define KVM_MSR_FILTER_WRITE (1 << 1)
__u32 flags;
__u32 nmsrs;
__u32 base;
__u8 * bitmap;
};
#define KVM_MSR_FILTER_MAX_RANGES 16
struct kvm_msr_filter {
#define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0)
#define KVM_MSR_FILTER_DEFAULT_DENY (1 << 0)
__u32 flags;
struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES];
};
struct kvm_cpuid_entry {
__u32 function;
__u32 eax;

View file

@ -35,6 +35,7 @@
#define KVM_FEATURE_POLL_CONTROL 12
#define KVM_FEATURE_PV_SCHED_YIELD 13
#define KVM_FEATURE_ASYNC_PF_INT 14
#define KVM_FEATURE_MSI_EXT_DEST_ID 15
#define KVM_HINTS_REALTIME 0
#define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24
#define MSR_KVM_WALL_CLOCK 0x11

View file

@ -45,6 +45,7 @@
#define SVM_EXIT_WRITE_DR6 0x036
#define SVM_EXIT_WRITE_DR7 0x037
#define SVM_EXIT_EXCP_BASE 0x040
#define SVM_EXIT_LAST_EXCP 0x05f
#define SVM_EXIT_INTR 0x060
#define SVM_EXIT_NMI 0x061
#define SVM_EXIT_SMI 0x062
@ -92,9 +93,18 @@
#define SVM_EXIT_MWAIT_COND 0x08c
#define SVM_EXIT_XSETBV 0x08d
#define SVM_EXIT_RDPRU 0x08e
#define SVM_EXIT_INVPCID 0x0a2
#define SVM_EXIT_NPF 0x400
#define SVM_EXIT_AVIC_INCOMPLETE_IPI 0x401
#define SVM_EXIT_AVIC_UNACCELERATED_ACCESS 0x402
#define SVM_VMGEXIT_MMIO_READ 0x80000001
#define SVM_VMGEXIT_MMIO_WRITE 0x80000002
#define SVM_VMGEXIT_NMI_COMPLETE 0x80000003
#define SVM_VMGEXIT_AP_HLT_LOOP 0x80000004
#define SVM_VMGEXIT_AP_JUMP_TABLE 0x80000005
#define SVM_VMGEXIT_SET_AP_JUMP_TABLE 0
#define SVM_VMGEXIT_GET_AP_JUMP_TABLE 1
#define SVM_VMGEXIT_UNSUPPORTED_EVENT 0x8000ffff
#define SVM_EXIT_ERR - 1
#define SVM_EXIT_REASONS { SVM_EXIT_READ_CR0, "read_cr0" }, { SVM_EXIT_READ_CR2, "read_cr2" }, { SVM_EXIT_READ_CR3, "read_cr3" }, { SVM_EXIT_READ_CR4, "read_cr4" }, { SVM_EXIT_READ_CR8, "read_cr8" }, { SVM_EXIT_WRITE_CR0, "write_cr0" }, { SVM_EXIT_WRITE_CR2, "write_cr2" }, { SVM_EXIT_WRITE_CR3, "write_cr3" }, { SVM_EXIT_WRITE_CR4, "write_cr4" }, { SVM_EXIT_WRITE_CR8, "write_cr8" }, { SVM_EXIT_READ_DR0, "read_dr0" }, { SVM_EXIT_READ_DR1, "read_dr1" }, { SVM_EXIT_READ_DR2, "read_dr2" }, { SVM_EXIT_READ_DR3, "read_dr3" }, { SVM_EXIT_READ_DR4, "read_dr4" }, { SVM_EXIT_READ_DR5, "read_dr5" }, { SVM_EXIT_READ_DR6, "read_dr6" }, { SVM_EXIT_READ_DR7, "read_dr7" }, { SVM_EXIT_WRITE_DR0, "write_dr0" }, { SVM_EXIT_WRITE_DR1, "write_dr1" }, { SVM_EXIT_WRITE_DR2, "write_dr2" }, { SVM_EXIT_WRITE_DR3, "write_dr3" }, { SVM_EXIT_WRITE_DR4, "write_dr4" }, { SVM_EXIT_WRITE_DR5, "write_dr5" }, { SVM_EXIT_WRITE_DR6, "write_dr6" }, { SVM_EXIT_WRITE_DR7, "write_dr7" }, { SVM_EXIT_EXCP_BASE + DE_VECTOR, "DE excp" }, { SVM_EXIT_EXCP_BASE + DB_VECTOR, "DB excp" }, { SVM_EXIT_EXCP_BASE + BP_VECTOR, "BP excp" }, { SVM_EXIT_EXCP_BASE + OF_VECTOR, "OF excp" }, { SVM_EXIT_EXCP_BASE + BR_VECTOR, "BR excp" }, { SVM_EXIT_EXCP_BASE + UD_VECTOR, "UD excp" }, { SVM_EXIT_EXCP_BASE + NM_VECTOR, "NM excp" }, { SVM_EXIT_EXCP_BASE + DF_VECTOR, "DF excp" }, { SVM_EXIT_EXCP_BASE + TS_VECTOR, "TS excp" }, { SVM_EXIT_EXCP_BASE + NP_VECTOR, "NP excp" }, { SVM_EXIT_EXCP_BASE + SS_VECTOR, "SS excp" }, { SVM_EXIT_EXCP_BASE + GP_VECTOR, "GP excp" }, { SVM_EXIT_EXCP_BASE + PF_VECTOR, "PF excp" }, { SVM_EXIT_EXCP_BASE + MF_VECTOR, "MF excp" }, { SVM_EXIT_EXCP_BASE + AC_VECTOR, "AC excp" }, { SVM_EXIT_EXCP_BASE + MC_VECTOR, "MC excp" }, { SVM_EXIT_EXCP_BASE + XM_VECTOR, "XF excp" }, { SVM_EXIT_INTR, "interrupt" }, { SVM_EXIT_NMI, "nmi" }, { SVM_EXIT_SMI, "smi" }, { SVM_EXIT_INIT, "init" }, { SVM_EXIT_VINTR, "vintr" }, { SVM_EXIT_CR0_SEL_WRITE, "cr0_sel_write" }, { SVM_EXIT_IDTR_READ, "read_idtr" }, { SVM_EXIT_GDTR_READ, "read_gdtr" }, { SVM_EXIT_LDTR_READ, "read_ldtr" }, { SVM_EXIT_TR_READ, "read_rt" }, { SVM_EXIT_IDTR_WRITE, "write_idtr" }, { SVM_EXIT_GDTR_WRITE, "write_gdtr" }, { SVM_EXIT_LDTR_WRITE, "write_ldtr" }, { SVM_EXIT_TR_WRITE, "write_rt" }, { SVM_EXIT_RDTSC, "rdtsc" }, { SVM_EXIT_RDPMC, "rdpmc" }, { SVM_EXIT_PUSHF, "pushf" }, { SVM_EXIT_POPF, "popf" }, { SVM_EXIT_CPUID, "cpuid" }, { SVM_EXIT_RSM, "rsm" }, { SVM_EXIT_IRET, "iret" }, { SVM_EXIT_SWINT, "swint" }, { SVM_EXIT_INVD, "invd" }, { SVM_EXIT_PAUSE, "pause" }, { SVM_EXIT_HLT, "hlt" }, { SVM_EXIT_INVLPG, "invlpg" }, { SVM_EXIT_INVLPGA, "invlpga" }, { SVM_EXIT_IOIO, "io" }, { SVM_EXIT_MSR, "msr" }, { SVM_EXIT_TASK_SWITCH, "task_switch" }, { SVM_EXIT_FERR_FREEZE, "ferr_freeze" }, { SVM_EXIT_SHUTDOWN, "shutdown" }, { SVM_EXIT_VMRUN, "vmrun" }, { SVM_EXIT_VMMCALL, "hypercall" }, { SVM_EXIT_VMLOAD, "vmload" }, { SVM_EXIT_VMSAVE, "vmsave" }, { SVM_EXIT_STGI, "stgi" }, { SVM_EXIT_CLGI, "clgi" }, { SVM_EXIT_SKINIT, "skinit" }, { SVM_EXIT_RDTSCP, "rdtscp" }, { SVM_EXIT_ICEBP, "icebp" }, { SVM_EXIT_WBINVD, "wbinvd" }, { SVM_EXIT_MONITOR, "monitor" }, { SVM_EXIT_MWAIT, "mwait" }, { SVM_EXIT_XSETBV, "xsetbv" }, { SVM_EXIT_NPF, "npf" }, { SVM_EXIT_AVIC_INCOMPLETE_IPI, "avic_incomplete_ipi" }, { SVM_EXIT_AVIC_UNACCELERATED_ACCESS, "avic_unaccelerated_access" }, { SVM_EXIT_ERR, "invalid_guest_state" }
#define SVM_EXIT_REASONS { SVM_EXIT_READ_CR0, "read_cr0" }, { SVM_EXIT_READ_CR2, "read_cr2" }, { SVM_EXIT_READ_CR3, "read_cr3" }, { SVM_EXIT_READ_CR4, "read_cr4" }, { SVM_EXIT_READ_CR8, "read_cr8" }, { SVM_EXIT_WRITE_CR0, "write_cr0" }, { SVM_EXIT_WRITE_CR2, "write_cr2" }, { SVM_EXIT_WRITE_CR3, "write_cr3" }, { SVM_EXIT_WRITE_CR4, "write_cr4" }, { SVM_EXIT_WRITE_CR8, "write_cr8" }, { SVM_EXIT_READ_DR0, "read_dr0" }, { SVM_EXIT_READ_DR1, "read_dr1" }, { SVM_EXIT_READ_DR2, "read_dr2" }, { SVM_EXIT_READ_DR3, "read_dr3" }, { SVM_EXIT_READ_DR4, "read_dr4" }, { SVM_EXIT_READ_DR5, "read_dr5" }, { SVM_EXIT_READ_DR6, "read_dr6" }, { SVM_EXIT_READ_DR7, "read_dr7" }, { SVM_EXIT_WRITE_DR0, "write_dr0" }, { SVM_EXIT_WRITE_DR1, "write_dr1" }, { SVM_EXIT_WRITE_DR2, "write_dr2" }, { SVM_EXIT_WRITE_DR3, "write_dr3" }, { SVM_EXIT_WRITE_DR4, "write_dr4" }, { SVM_EXIT_WRITE_DR5, "write_dr5" }, { SVM_EXIT_WRITE_DR6, "write_dr6" }, { SVM_EXIT_WRITE_DR7, "write_dr7" }, { SVM_EXIT_EXCP_BASE + DE_VECTOR, "DE excp" }, { SVM_EXIT_EXCP_BASE + DB_VECTOR, "DB excp" }, { SVM_EXIT_EXCP_BASE + BP_VECTOR, "BP excp" }, { SVM_EXIT_EXCP_BASE + OF_VECTOR, "OF excp" }, { SVM_EXIT_EXCP_BASE + BR_VECTOR, "BR excp" }, { SVM_EXIT_EXCP_BASE + UD_VECTOR, "UD excp" }, { SVM_EXIT_EXCP_BASE + NM_VECTOR, "NM excp" }, { SVM_EXIT_EXCP_BASE + DF_VECTOR, "DF excp" }, { SVM_EXIT_EXCP_BASE + TS_VECTOR, "TS excp" }, { SVM_EXIT_EXCP_BASE + NP_VECTOR, "NP excp" }, { SVM_EXIT_EXCP_BASE + SS_VECTOR, "SS excp" }, { SVM_EXIT_EXCP_BASE + GP_VECTOR, "GP excp" }, { SVM_EXIT_EXCP_BASE + PF_VECTOR, "PF excp" }, { SVM_EXIT_EXCP_BASE + MF_VECTOR, "MF excp" }, { SVM_EXIT_EXCP_BASE + AC_VECTOR, "AC excp" }, { SVM_EXIT_EXCP_BASE + MC_VECTOR, "MC excp" }, { SVM_EXIT_EXCP_BASE + XM_VECTOR, "XF excp" }, { SVM_EXIT_INTR, "interrupt" }, { SVM_EXIT_NMI, "nmi" }, { SVM_EXIT_SMI, "smi" }, { SVM_EXIT_INIT, "init" }, { SVM_EXIT_VINTR, "vintr" }, { SVM_EXIT_CR0_SEL_WRITE, "cr0_sel_write" }, { SVM_EXIT_IDTR_READ, "read_idtr" }, { SVM_EXIT_GDTR_READ, "read_gdtr" }, { SVM_EXIT_LDTR_READ, "read_ldtr" }, { SVM_EXIT_TR_READ, "read_rt" }, { SVM_EXIT_IDTR_WRITE, "write_idtr" }, { SVM_EXIT_GDTR_WRITE, "write_gdtr" }, { SVM_EXIT_LDTR_WRITE, "write_ldtr" }, { SVM_EXIT_TR_WRITE, "write_rt" }, { SVM_EXIT_RDTSC, "rdtsc" }, { SVM_EXIT_RDPMC, "rdpmc" }, { SVM_EXIT_PUSHF, "pushf" }, { SVM_EXIT_POPF, "popf" }, { SVM_EXIT_CPUID, "cpuid" }, { SVM_EXIT_RSM, "rsm" }, { SVM_EXIT_IRET, "iret" }, { SVM_EXIT_SWINT, "swint" }, { SVM_EXIT_INVD, "invd" }, { SVM_EXIT_PAUSE, "pause" }, { SVM_EXIT_HLT, "hlt" }, { SVM_EXIT_INVLPG, "invlpg" }, { SVM_EXIT_INVLPGA, "invlpga" }, { SVM_EXIT_IOIO, "io" }, { SVM_EXIT_MSR, "msr" }, { SVM_EXIT_TASK_SWITCH, "task_switch" }, { SVM_EXIT_FERR_FREEZE, "ferr_freeze" }, { SVM_EXIT_SHUTDOWN, "shutdown" }, { SVM_EXIT_VMRUN, "vmrun" }, { SVM_EXIT_VMMCALL, "hypercall" }, { SVM_EXIT_VMLOAD, "vmload" }, { SVM_EXIT_VMSAVE, "vmsave" }, { SVM_EXIT_STGI, "stgi" }, { SVM_EXIT_CLGI, "clgi" }, { SVM_EXIT_SKINIT, "skinit" }, { SVM_EXIT_RDTSCP, "rdtscp" }, { SVM_EXIT_ICEBP, "icebp" }, { SVM_EXIT_WBINVD, "wbinvd" }, { SVM_EXIT_MONITOR, "monitor" }, { SVM_EXIT_MWAIT, "mwait" }, { SVM_EXIT_XSETBV, "xsetbv" }, { SVM_EXIT_INVPCID, "invpcid" }, { SVM_EXIT_NPF, "npf" }, { SVM_EXIT_AVIC_INCOMPLETE_IPI, "avic_incomplete_ipi" }, { SVM_EXIT_AVIC_UNACCELERATED_ACCESS, "avic_unaccelerated_access" }, { SVM_EXIT_ERR, "invalid_guest_state" }
#endif

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@ -447,4 +447,5 @@
#define __NR_openat2 437
#define __NR_pidfd_getfd 438
#define __NR_faccessat2 439
#define __NR_process_madvise 440
#endif

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@ -369,4 +369,5 @@
#define __NR_openat2 437
#define __NR_pidfd_getfd 438
#define __NR_faccessat2 439
#define __NR_process_madvise 440
#endif

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@ -322,6 +322,7 @@
#define __NR_openat2 (__X32_SYSCALL_BIT + 437)
#define __NR_pidfd_getfd (__X32_SYSCALL_BIT + 438)
#define __NR_faccessat2 (__X32_SYSCALL_BIT + 439)
#define __NR_process_madvise (__X32_SYSCALL_BIT + 440)
#define __NR_rt_sigaction (__X32_SYSCALL_BIT + 512)
#define __NR_rt_sigreturn (__X32_SYSCALL_BIT + 513)
#define __NR_ioctl (__X32_SYSCALL_BIT + 514)

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@ -411,6 +411,7 @@ struct drm_amdgpu_cs_chunk_data {
};
#define AMDGPU_IDS_FLAGS_FUSION 0x1
#define AMDGPU_IDS_FLAGS_PREEMPTION 0x2
#define AMDGPU_IDS_FLAGS_TMZ 0x4
#define AMDGPU_INFO_ACCEL_WORKING 0x00
#define AMDGPU_INFO_CRTC_FROM_ID 0x01
#define AMDGPU_INFO_HW_IP_INFO 0x02

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@ -73,12 +73,7 @@ extern "C" {
#define DRM_MODE_FLAG_PIC_AR_16_9 (DRM_MODE_PICTURE_ASPECT_16_9 << 19)
#define DRM_MODE_FLAG_PIC_AR_64_27 (DRM_MODE_PICTURE_ASPECT_64_27 << 19)
#define DRM_MODE_FLAG_PIC_AR_256_135 (DRM_MODE_PICTURE_ASPECT_256_135 << 19)
#define DRM_MODE_FLAG_SUPPORTS_RGB (1 << 27)
#define DRM_MODE_FLAG_SUPPORTS_YUV (1 << 28)
#define DRM_MODE_FLAG_VID_MODE_PANEL (1 << 29)
#define DRM_MODE_FLAG_CMD_MODE_PANEL (1 << 30)
#define DRM_MODE_FLAG_SEAMLESS (1 << 31)
#define DRM_MODE_FLAG_ALL (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_PCSYNC | DRM_MODE_FLAG_NCSYNC | DRM_MODE_FLAG_HSKEW | DRM_MODE_FLAG_DBLCLK | DRM_MODE_FLAG_CLKDIV2 | DRM_MODE_FLAG_SUPPORTS_RGB | DRM_MODE_FLAG_SUPPORTS_YUV | DRM_MODE_FLAG_VID_MODE_PANEL | DRM_MODE_FLAG_CMD_MODE_PANEL | DRM_MODE_FLAG_3D_MASK)
#define DRM_MODE_FLAG_ALL (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_PCSYNC | DRM_MODE_FLAG_NCSYNC | DRM_MODE_FLAG_HSKEW | DRM_MODE_FLAG_DBLCLK | DRM_MODE_FLAG_CLKDIV2 | DRM_MODE_FLAG_3D_MASK)
#define DRM_MODE_DPMS_ON 0
#define DRM_MODE_DPMS_STANDBY 1
#define DRM_MODE_DPMS_SUSPEND 2
@ -196,12 +191,17 @@ struct drm_mode_get_encoder {
enum drm_mode_subconnector {
DRM_MODE_SUBCONNECTOR_Automatic = 0,
DRM_MODE_SUBCONNECTOR_Unknown = 0,
DRM_MODE_SUBCONNECTOR_VGA = 1,
DRM_MODE_SUBCONNECTOR_DVID = 3,
DRM_MODE_SUBCONNECTOR_DVIA = 4,
DRM_MODE_SUBCONNECTOR_Composite = 5,
DRM_MODE_SUBCONNECTOR_SVIDEO = 6,
DRM_MODE_SUBCONNECTOR_Component = 8,
DRM_MODE_SUBCONNECTOR_SCART = 9,
DRM_MODE_SUBCONNECTOR_DisplayPort = 10,
DRM_MODE_SUBCONNECTOR_HDMIA = 11,
DRM_MODE_SUBCONNECTOR_Native = 15,
DRM_MODE_SUBCONNECTOR_Wireless = 18,
};
#define DRM_MODE_CONNECTOR_Unknown 0
#define DRM_MODE_CONNECTOR_VGA 1
@ -309,7 +309,6 @@ struct drm_mode_fb_cmd {
};
#define DRM_MODE_FB_INTERLACED (1 << 0)
#define DRM_MODE_FB_MODIFIERS (1 << 1)
#define DRM_MODE_FB_SECURE (1 << 2)
struct drm_mode_fb_cmd2 {
__u32 fb_id;
__u32 width;

View file

@ -361,6 +361,7 @@ typedef struct drm_i915_irq_wait {
#define I915_PARAM_MMAP_GTT_COHERENT 52
#define I915_PARAM_HAS_EXEC_SUBMIT_FENCE 53
#define I915_PARAM_PERF_REVISION 54
#define I915_PARAM_HAS_EXEC_TIMELINE_FENCES 55
typedef struct drm_i915_getparam {
__s32 param;
int __user * value;
@ -523,6 +524,13 @@ struct drm_i915_gem_exec_fence {
#define __I915_EXEC_FENCE_UNKNOWN_FLAGS (- (I915_EXEC_FENCE_SIGNAL << 1))
__u32 flags;
};
#define DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES 0
struct drm_i915_gem_execbuffer_ext_timeline_fences {
struct i915_user_extension base;
__u64 fence_count;
__u64 handles_ptr;
__u64 values_ptr;
};
struct drm_i915_gem_execbuffer2 {
__u64 buffers_ptr;
__u32 buffer_count;
@ -562,7 +570,8 @@ struct drm_i915_gem_execbuffer2 {
#define I915_EXEC_BATCH_FIRST (1 << 18)
#define I915_EXEC_FENCE_ARRAY (1 << 19)
#define I915_EXEC_FENCE_SUBMIT (1 << 20)
#define __I915_EXEC_UNKNOWN_FLAGS (- (I915_EXEC_FENCE_SUBMIT << 1))
#define I915_EXEC_USE_EXTENSIONS (1 << 21)
#define __I915_EXEC_UNKNOWN_FLAGS (- (I915_EXEC_USE_EXTENSIONS << 1))
#define I915_EXEC_CONTEXT_ID_MASK (0xffffffff)
#define i915_execbuffer2_set_context_id(eb2,context) (eb2).rsvd1 = context & I915_EXEC_CONTEXT_ID_MASK
#define i915_execbuffer2_get_context_id(eb2) ((eb2).rsvd1 & I915_EXEC_CONTEXT_ID_MASK)

View file

@ -111,6 +111,7 @@ enum bpf_cmd {
BPF_ENABLE_STATS,
BPF_ITER_CREATE,
BPF_LINK_DETACH,
BPF_PROG_BIND_MAP,
};
enum bpf_map_type {
BPF_MAP_TYPE_UNSPEC,
@ -141,6 +142,7 @@ enum bpf_map_type {
BPF_MAP_TYPE_DEVMAP_HASH,
BPF_MAP_TYPE_STRUCT_OPS,
BPF_MAP_TYPE_RINGBUF,
BPF_MAP_TYPE_INODE_STORAGE,
};
enum bpf_prog_type {
BPF_PROG_TYPE_UNSPEC,
@ -234,8 +236,10 @@ enum bpf_link_type {
#define BPF_F_ANY_ALIGNMENT (1U << 1)
#define BPF_F_TEST_RND_HI32 (1U << 2)
#define BPF_F_TEST_STATE_FREQ (1U << 3)
#define BPF_F_SLEEPABLE (1U << 4)
#define BPF_PSEUDO_MAP_FD 1
#define BPF_PSEUDO_MAP_VALUE 2
#define BPF_PSEUDO_BTF_ID 3
#define BPF_PSEUDO_CALL 1
enum {
BPF_ANY = 0,
@ -255,8 +259,11 @@ enum {
BPF_F_WRONLY_PROG = (1U << 8),
BPF_F_CLONE = (1U << 9),
BPF_F_MMAPABLE = (1U << 10),
BPF_F_PRESERVE_ELEMS = (1U << 11),
BPF_F_INNER_MAP = (1U << 12),
};
#define BPF_F_QUERY_EFFECTIVE (1U << 0)
#define BPF_F_TEST_RUN_ON_CPU (1U << 0)
enum bpf_stats_type {
BPF_STATS_RUN_TIME = 0,
};
@ -358,6 +365,8 @@ union bpf_attr {
__u32 ctx_size_out;
__aligned_u64 ctx_in;
__aligned_u64 ctx_out;
__u32 flags;
__u32 cpu;
} test;
struct {
union {
@ -413,8 +422,13 @@ union bpf_attr {
};
__u32 attach_type;
__u32 flags;
__aligned_u64 iter_info;
__u32 iter_info_len;
union {
__u32 target_btf_id;
struct {
__aligned_u64 iter_info;
__u32 iter_info_len;
};
};
} link_create;
struct {
__u32 link_fd;
@ -432,8 +446,13 @@ union bpf_attr {
__u32 link_fd;
__u32 flags;
} iter_create;
struct {
__u32 prog_fd;
__u32 map_fd;
__u32 flags;
} prog_bind_map;
} __attribute__((aligned(8)));
#define __BPF_FUNC_MAPPER(FN) FN(unspec), FN(map_lookup_elem), FN(map_update_elem), FN(map_delete_elem), FN(probe_read), FN(ktime_get_ns), FN(trace_printk), FN(get_prandom_u32), FN(get_smp_processor_id), FN(skb_store_bytes), FN(l3_csum_replace), FN(l4_csum_replace), FN(tail_call), FN(clone_redirect), FN(get_current_pid_tgid), FN(get_current_uid_gid), FN(get_current_comm), FN(get_cgroup_classid), FN(skb_vlan_push), FN(skb_vlan_pop), FN(skb_get_tunnel_key), FN(skb_set_tunnel_key), FN(perf_event_read), FN(redirect), FN(get_route_realm), FN(perf_event_output), FN(skb_load_bytes), FN(get_stackid), FN(csum_diff), FN(skb_get_tunnel_opt), FN(skb_set_tunnel_opt), FN(skb_change_proto), FN(skb_change_type), FN(skb_under_cgroup), FN(get_hash_recalc), FN(get_current_task), FN(probe_write_user), FN(current_task_under_cgroup), FN(skb_change_tail), FN(skb_pull_data), FN(csum_update), FN(set_hash_invalid), FN(get_numa_node_id), FN(skb_change_head), FN(xdp_adjust_head), FN(probe_read_str), FN(get_socket_cookie), FN(get_socket_uid), FN(set_hash), FN(setsockopt), FN(skb_adjust_room), FN(redirect_map), FN(sk_redirect_map), FN(sock_map_update), FN(xdp_adjust_meta), FN(perf_event_read_value), FN(perf_prog_read_value), FN(getsockopt), FN(override_return), FN(sock_ops_cb_flags_set), FN(msg_redirect_map), FN(msg_apply_bytes), FN(msg_cork_bytes), FN(msg_pull_data), FN(bind), FN(xdp_adjust_tail), FN(skb_get_xfrm_state), FN(get_stack), FN(skb_load_bytes_relative), FN(fib_lookup), FN(sock_hash_update), FN(msg_redirect_hash), FN(sk_redirect_hash), FN(lwt_push_encap), FN(lwt_seg6_store_bytes), FN(lwt_seg6_adjust_srh), FN(lwt_seg6_action), FN(rc_repeat), FN(rc_keydown), FN(skb_cgroup_id), FN(get_current_cgroup_id), FN(get_local_storage), FN(sk_select_reuseport), FN(skb_ancestor_cgroup_id), FN(sk_lookup_tcp), FN(sk_lookup_udp), FN(sk_release), FN(map_push_elem), FN(map_pop_elem), FN(map_peek_elem), FN(msg_push_data), FN(msg_pop_data), FN(rc_pointer_rel), FN(spin_lock), FN(spin_unlock), FN(sk_fullsock), FN(tcp_sock), FN(skb_ecn_set_ce), FN(get_listener_sock), FN(skc_lookup_tcp), FN(tcp_check_syncookie), FN(sysctl_get_name), FN(sysctl_get_current_value), FN(sysctl_get_new_value), FN(sysctl_set_new_value), FN(strtol), FN(strtoul), FN(sk_storage_get), FN(sk_storage_delete), FN(send_signal), FN(tcp_gen_syncookie), FN(skb_output), FN(probe_read_user), FN(probe_read_kernel), FN(probe_read_user_str), FN(probe_read_kernel_str), FN(tcp_send_ack), FN(send_signal_thread), FN(jiffies64), FN(read_branch_records), FN(get_ns_current_pid_tgid), FN(xdp_output), FN(get_netns_cookie), FN(get_current_ancestor_cgroup_id), FN(sk_assign), FN(ktime_get_boot_ns), FN(seq_printf), FN(seq_write), FN(sk_cgroup_id), FN(sk_ancestor_cgroup_id), FN(ringbuf_output), FN(ringbuf_reserve), FN(ringbuf_submit), FN(ringbuf_discard), FN(ringbuf_query), FN(csum_level), FN(skc_to_tcp6_sock), FN(skc_to_tcp_sock), FN(skc_to_tcp_timewait_sock), FN(skc_to_tcp_request_sock), FN(skc_to_udp6_sock), FN(get_task_stack),
#define __BPF_FUNC_MAPPER(FN) FN(unspec), FN(map_lookup_elem), FN(map_update_elem), FN(map_delete_elem), FN(probe_read), FN(ktime_get_ns), FN(trace_printk), FN(get_prandom_u32), FN(get_smp_processor_id), FN(skb_store_bytes), FN(l3_csum_replace), FN(l4_csum_replace), FN(tail_call), FN(clone_redirect), FN(get_current_pid_tgid), FN(get_current_uid_gid), FN(get_current_comm), FN(get_cgroup_classid), FN(skb_vlan_push), FN(skb_vlan_pop), FN(skb_get_tunnel_key), FN(skb_set_tunnel_key), FN(perf_event_read), FN(redirect), FN(get_route_realm), FN(perf_event_output), FN(skb_load_bytes), FN(get_stackid), FN(csum_diff), FN(skb_get_tunnel_opt), FN(skb_set_tunnel_opt), FN(skb_change_proto), FN(skb_change_type), FN(skb_under_cgroup), FN(get_hash_recalc), FN(get_current_task), FN(probe_write_user), FN(current_task_under_cgroup), FN(skb_change_tail), FN(skb_pull_data), FN(csum_update), FN(set_hash_invalid), FN(get_numa_node_id), FN(skb_change_head), FN(xdp_adjust_head), FN(probe_read_str), FN(get_socket_cookie), FN(get_socket_uid), FN(set_hash), FN(setsockopt), FN(skb_adjust_room), FN(redirect_map), FN(sk_redirect_map), FN(sock_map_update), FN(xdp_adjust_meta), FN(perf_event_read_value), FN(perf_prog_read_value), FN(getsockopt), FN(override_return), FN(sock_ops_cb_flags_set), FN(msg_redirect_map), FN(msg_apply_bytes), FN(msg_cork_bytes), FN(msg_pull_data), FN(bind), FN(xdp_adjust_tail), FN(skb_get_xfrm_state), FN(get_stack), FN(skb_load_bytes_relative), FN(fib_lookup), FN(sock_hash_update), FN(msg_redirect_hash), FN(sk_redirect_hash), FN(lwt_push_encap), FN(lwt_seg6_store_bytes), FN(lwt_seg6_adjust_srh), FN(lwt_seg6_action), FN(rc_repeat), FN(rc_keydown), FN(skb_cgroup_id), FN(get_current_cgroup_id), FN(get_local_storage), FN(sk_select_reuseport), FN(skb_ancestor_cgroup_id), FN(sk_lookup_tcp), FN(sk_lookup_udp), FN(sk_release), FN(map_push_elem), FN(map_pop_elem), FN(map_peek_elem), FN(msg_push_data), FN(msg_pop_data), FN(rc_pointer_rel), FN(spin_lock), FN(spin_unlock), FN(sk_fullsock), FN(tcp_sock), FN(skb_ecn_set_ce), FN(get_listener_sock), FN(skc_lookup_tcp), FN(tcp_check_syncookie), FN(sysctl_get_name), FN(sysctl_get_current_value), FN(sysctl_get_new_value), FN(sysctl_set_new_value), FN(strtol), FN(strtoul), FN(sk_storage_get), FN(sk_storage_delete), FN(send_signal), FN(tcp_gen_syncookie), FN(skb_output), FN(probe_read_user), FN(probe_read_kernel), FN(probe_read_user_str), FN(probe_read_kernel_str), FN(tcp_send_ack), FN(send_signal_thread), FN(jiffies64), FN(read_branch_records), FN(get_ns_current_pid_tgid), FN(xdp_output), FN(get_netns_cookie), FN(get_current_ancestor_cgroup_id), FN(sk_assign), FN(ktime_get_boot_ns), FN(seq_printf), FN(seq_write), FN(sk_cgroup_id), FN(sk_ancestor_cgroup_id), FN(ringbuf_output), FN(ringbuf_reserve), FN(ringbuf_submit), FN(ringbuf_discard), FN(ringbuf_query), FN(csum_level), FN(skc_to_tcp6_sock), FN(skc_to_tcp_sock), FN(skc_to_tcp_timewait_sock), FN(skc_to_tcp_request_sock), FN(skc_to_udp6_sock), FN(get_task_stack), FN(load_hdr_opt), FN(store_hdr_opt), FN(reserve_hdr_opt), FN(inode_storage_get), FN(inode_storage_delete), FN(d_path), FN(copy_from_user), FN(snprintf_btf), FN(seq_printf_btf), FN(skb_cgroup_classid), FN(redirect_neigh), FN(per_cpu_ptr), FN(this_cpu_ptr), FN(redirect_peer),
#define __BPF_ENUM_FN(x) BPF_FUNC_ ##x
enum bpf_func_id {
__BPF_FUNC_MAPPER(__BPF_ENUM_FN) __BPF_FUNC_MAX_ID,
@ -500,7 +519,8 @@ enum {
BPF_F_SYSCTL_BASE_NAME = (1ULL << 0),
};
enum {
BPF_SK_STORAGE_GET_F_CREATE = (1ULL << 0),
BPF_LOCAL_STORAGE_GET_F_CREATE = (1ULL << 0),
BPF_SK_STORAGE_GET_F_CREATE = BPF_LOCAL_STORAGE_GET_F_CREATE,
};
enum {
BPF_F_GET_BRANCH_RECORDS_SIZE = (1ULL << 0),
@ -794,6 +814,15 @@ struct bpf_link_info {
__u64 cgroup_id;
__u32 attach_type;
} cgroup;
struct {
__aligned_u64 target_name;
__u32 target_name_len;
union {
struct {
__u32 map_id;
} map;
};
} iter;
struct {
__u32 netns_ino;
__u32 attach_type;
@ -856,13 +885,20 @@ struct bpf_sock_ops {
__u64 bytes_received;
__u64 bytes_acked;
__bpf_md_ptr(struct bpf_sock *, sk);
__bpf_md_ptr(void *, skb_data);
__bpf_md_ptr(void *, skb_data_end);
__u32 skb_len;
__u32 skb_tcp_flags;
};
enum {
BPF_SOCK_OPS_RTO_CB_FLAG = (1 << 0),
BPF_SOCK_OPS_RETRANS_CB_FLAG = (1 << 1),
BPF_SOCK_OPS_STATE_CB_FLAG = (1 << 2),
BPF_SOCK_OPS_RTT_CB_FLAG = (1 << 3),
BPF_SOCK_OPS_ALL_CB_FLAGS = 0xF,
BPF_SOCK_OPS_PARSE_ALL_HDR_OPT_CB_FLAG = (1 << 4),
BPF_SOCK_OPS_PARSE_UNKNOWN_HDR_OPT_CB_FLAG = (1 << 5),
BPF_SOCK_OPS_WRITE_HDR_OPT_CB_FLAG = (1 << 6),
BPF_SOCK_OPS_ALL_CB_FLAGS = 0x7F,
};
enum {
BPF_SOCK_OPS_VOID,
@ -878,6 +914,9 @@ enum {
BPF_SOCK_OPS_STATE_CB,
BPF_SOCK_OPS_TCP_LISTEN_CB,
BPF_SOCK_OPS_RTT_CB,
BPF_SOCK_OPS_PARSE_HDR_OPT_CB,
BPF_SOCK_OPS_HDR_OPT_LEN_CB,
BPF_SOCK_OPS_WRITE_HDR_OPT_CB,
};
enum {
BPF_TCP_ESTABLISHED = 1,
@ -897,6 +936,18 @@ enum {
enum {
TCP_BPF_IW = 1001,
TCP_BPF_SNDCWND_CLAMP = 1002,
TCP_BPF_DELACK_MAX = 1003,
TCP_BPF_RTO_MIN = 1004,
TCP_BPF_SYN = 1005,
TCP_BPF_SYN_IP = 1006,
TCP_BPF_SYN_MAC = 1007,
};
enum {
BPF_LOAD_HDR_OPT_TCP_SYN = (1ULL << 0),
};
enum {
BPF_WRITE_HDR_TCP_CURRENT_MSS = 1,
BPF_WRITE_HDR_TCP_SYNACK_COOKIE = 2,
};
struct bpf_perf_event_value {
__u64 counter;
@ -960,6 +1011,13 @@ struct bpf_fib_lookup {
__u8 smac[6];
__u8 dmac[6];
};
struct bpf_redir_neigh {
__u32 nh_family;
union {
__be32 ipv4_nh;
__u32 ipv6_nh[4];
};
};
enum bpf_task_fd_type {
BPF_FD_TYPE_RAW_TRACEPOINT,
BPF_FD_TYPE_TRACEPOINT,
@ -1040,4 +1098,15 @@ struct bpf_sk_lookup {
__u32 local_ip6[4];
__u32 local_port;
};
struct btf_ptr {
void * ptr;
__u32 type_id;
__u32 flags;
};
enum {
BTF_F_COMPACT = (1ULL << 0),
BTF_F_NONAME = (1ULL << 1),
BTF_F_PTR_RAW = (1ULL << 2),
BTF_F_ZERO = (1ULL << 3),
};
#endif

View file

@ -20,6 +20,7 @@
#define _BTRFS_CTREE_H_
#include <linux/btrfs.h>
#include <linux/types.h>
#include <stddef.h>
#define BTRFS_ROOT_TREE_OBJECTID 1ULL
#define BTRFS_EXTENT_TREE_OBJECTID 2ULL
#define BTRFS_CHUNK_TREE_OBJECTID 3ULL

View file

@ -0,0 +1,68 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _UAPI_CAN_ISOTP_H
#define _UAPI_CAN_ISOTP_H
#include <linux/types.h>
#include <linux/can.h>
#define SOL_CAN_ISOTP (SOL_CAN_BASE + CAN_ISOTP)
#define CAN_ISOTP_OPTS 1
#define CAN_ISOTP_RECV_FC 2
#define CAN_ISOTP_TX_STMIN 3
#define CAN_ISOTP_RX_STMIN 4
#define CAN_ISOTP_LL_OPTS 5
struct can_isotp_options {
__u32 flags;
__u32 frame_txtime;
__u8 ext_address;
__u8 txpad_content;
__u8 rxpad_content;
__u8 rx_ext_address;
};
struct can_isotp_fc_options {
__u8 bs;
__u8 stmin;
__u8 wftmax;
};
struct can_isotp_ll_options {
__u8 mtu;
__u8 tx_dl;
__u8 tx_flags;
};
#define CAN_ISOTP_LISTEN_MODE 0x001
#define CAN_ISOTP_EXTEND_ADDR 0x002
#define CAN_ISOTP_TX_PADDING 0x004
#define CAN_ISOTP_RX_PADDING 0x008
#define CAN_ISOTP_CHK_PAD_LEN 0x010
#define CAN_ISOTP_CHK_PAD_DATA 0x020
#define CAN_ISOTP_HALF_DUPLEX 0x040
#define CAN_ISOTP_FORCE_TXSTMIN 0x080
#define CAN_ISOTP_FORCE_RXSTMIN 0x100
#define CAN_ISOTP_RX_EXT_ADDR 0x200
#define CAN_ISOTP_WAIT_TX_DONE 0x400
#define CAN_ISOTP_DEFAULT_FLAGS 0
#define CAN_ISOTP_DEFAULT_EXT_ADDRESS 0x00
#define CAN_ISOTP_DEFAULT_PAD_CONTENT 0xCC
#define CAN_ISOTP_DEFAULT_FRAME_TXTIME 0
#define CAN_ISOTP_DEFAULT_RECV_BS 0
#define CAN_ISOTP_DEFAULT_RECV_STMIN 0x00
#define CAN_ISOTP_DEFAULT_RECV_WFTMAX 0
#define CAN_ISOTP_DEFAULT_LL_MTU CAN_MTU
#define CAN_ISOTP_DEFAULT_LL_TX_DL CAN_MAX_DLEN
#define CAN_ISOTP_DEFAULT_LL_TX_FLAGS 0
#endif

View file

@ -20,6 +20,9 @@
#define _UAPI_CAN_RAW_H
#include <linux/can.h>
#define SOL_CAN_RAW (SOL_CAN_BASE + CAN_RAW)
enum {
SCM_CAN_RAW_ERRQUEUE = 1,
};
enum {
CAN_RAW_FILTER = 1,
CAN_RAW_ERR_FILTER,

View file

@ -155,7 +155,10 @@ struct cdrom_generic_command {
unsigned char data_direction;
int quiet;
int timeout;
void __user * reserved[1];
union {
void __user * reserved[1];
void __user * unused;
};
};
#define CD_MINS 74
#define CD_SECS 60

View file

@ -18,6 +18,7 @@
****************************************************************************/
#ifndef _UAPI_LINUX_DEVLINK_H_
#define _UAPI_LINUX_DEVLINK_H_
#include <linux/const.h>
#define DEVLINK_GENL_NAME "devlink"
#define DEVLINK_GENL_VERSION 0x1
#define DEVLINK_GENL_MCGRP_CONFIG_NAME "config"
@ -97,6 +98,7 @@ enum devlink_command {
DEVLINK_CMD_TRAP_POLICER_SET,
DEVLINK_CMD_TRAP_POLICER_NEW,
DEVLINK_CMD_TRAP_POLICER_DEL,
DEVLINK_CMD_HEALTH_REPORTER_TEST,
__DEVLINK_CMD_MAX,
DEVLINK_CMD_MAX = __DEVLINK_CMD_MAX - 1
};
@ -136,6 +138,7 @@ enum devlink_port_flavour {
DEVLINK_PORT_FLAVOUR_PCI_PF,
DEVLINK_PORT_FLAVOUR_PCI_VF,
DEVLINK_PORT_FLAVOUR_VIRTUAL,
DEVLINK_PORT_FLAVOUR_UNUSED,
};
enum devlink_param_cmode {
DEVLINK_PARAM_CMODE_RUNTIME,
@ -163,6 +166,15 @@ enum {
__DEVLINK_ATTR_STATS_MAX,
DEVLINK_ATTR_STATS_MAX = __DEVLINK_ATTR_STATS_MAX - 1
};
enum {
DEVLINK_FLASH_OVERWRITE_SETTINGS_BIT,
DEVLINK_FLASH_OVERWRITE_IDENTIFIERS_BIT,
__DEVLINK_FLASH_OVERWRITE_MAX_BIT,
DEVLINK_FLASH_OVERWRITE_MAX_BIT = __DEVLINK_FLASH_OVERWRITE_MAX_BIT - 1
};
#define DEVLINK_FLASH_OVERWRITE_SETTINGS _BITUL(DEVLINK_FLASH_OVERWRITE_SETTINGS_BIT)
#define DEVLINK_FLASH_OVERWRITE_IDENTIFIERS _BITUL(DEVLINK_FLASH_OVERWRITE_IDENTIFIERS_BIT)
#define DEVLINK_SUPPORTED_FLASH_OVERWRITE_SECTIONS (_BITUL(__DEVLINK_FLASH_OVERWRITE_MAX_BIT) - 1)
enum devlink_trap_action {
DEVLINK_TRAP_ACTION_DROP,
DEVLINK_TRAP_ACTION_TRAP,
@ -177,6 +189,20 @@ enum {
DEVLINK_ATTR_TRAP_METADATA_TYPE_IN_PORT,
DEVLINK_ATTR_TRAP_METADATA_TYPE_FA_COOKIE,
};
enum devlink_reload_action {
DEVLINK_RELOAD_ACTION_UNSPEC,
DEVLINK_RELOAD_ACTION_DRIVER_REINIT,
DEVLINK_RELOAD_ACTION_FW_ACTIVATE,
__DEVLINK_RELOAD_ACTION_MAX,
DEVLINK_RELOAD_ACTION_MAX = __DEVLINK_RELOAD_ACTION_MAX - 1
};
enum devlink_reload_limit {
DEVLINK_RELOAD_LIMIT_UNSPEC,
DEVLINK_RELOAD_LIMIT_NO_RESET,
__DEVLINK_RELOAD_LIMIT_MAX,
DEVLINK_RELOAD_LIMIT_MAX = __DEVLINK_RELOAD_LIMIT_MAX - 1
};
#define DEVLINK_RELOAD_LIMITS_VALID_MASK (BIT(__DEVLINK_RELOAD_LIMIT_MAX) - 1)
enum devlink_attr {
DEVLINK_ATTR_UNSPEC,
DEVLINK_ATTR_BUS_NAME,
@ -327,6 +353,21 @@ enum devlink_attr {
DEVLINK_ATTR_INFO_BOARD_SERIAL_NUMBER,
DEVLINK_ATTR_PORT_LANES,
DEVLINK_ATTR_PORT_SPLITTABLE,
DEVLINK_ATTR_PORT_EXTERNAL,
DEVLINK_ATTR_PORT_CONTROLLER_NUMBER,
DEVLINK_ATTR_FLASH_UPDATE_STATUS_TIMEOUT,
DEVLINK_ATTR_FLASH_UPDATE_OVERWRITE_MASK,
DEVLINK_ATTR_RELOAD_ACTION,
DEVLINK_ATTR_RELOAD_ACTIONS_PERFORMED,
DEVLINK_ATTR_RELOAD_LIMITS,
DEVLINK_ATTR_DEV_STATS,
DEVLINK_ATTR_RELOAD_STATS,
DEVLINK_ATTR_RELOAD_STATS_ENTRY,
DEVLINK_ATTR_RELOAD_STATS_LIMIT,
DEVLINK_ATTR_RELOAD_STATS_VALUE,
DEVLINK_ATTR_REMOTE_RELOAD_STATS,
DEVLINK_ATTR_RELOAD_ACTION_INFO,
DEVLINK_ATTR_RELOAD_ACTION_STATS,
__DEVLINK_ATTR_MAX,
DEVLINK_ATTR_MAX = __DEVLINK_ATTR_MAX - 1
};

View file

@ -104,9 +104,9 @@ enum {
#define DM_TARGET_MSG _IOWR(DM_IOCTL, DM_TARGET_MSG_CMD, struct dm_ioctl)
#define DM_DEV_SET_GEOMETRY _IOWR(DM_IOCTL, DM_DEV_SET_GEOMETRY_CMD, struct dm_ioctl)
#define DM_VERSION_MAJOR 4
#define DM_VERSION_MINOR 42
#define DM_VERSION_MINOR 43
#define DM_VERSION_PATCHLEVEL 0
#define DM_VERSION_EXTRA "-ioctl(2020-02-27)"
#define DM_VERSION_EXTRA "-ioctl(2020-10-01)"
#define DM_READONLY_FLAG (1 << 0)
#define DM_SUSPEND_FLAG (1 << 1)
#define DM_PERSISTENT_DEV_FLAG (1 << 3)

View file

@ -0,0 +1,65 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _LINUX_DM_USER_H
#define _LINUX_DM_USER_H
#include <linux/types.h>
#define DM_USER_REQ_MAP_READ 0
#define DM_USER_REQ_MAP_WRITE 1
#define DM_USER_REQ_MAP_FLUSH 2
#define DM_USER_REQ_MAP_DISCARD 3
#define DM_USER_REQ_MAP_SECURE_ERASE 4
#define DM_USER_REQ_MAP_WRITE_SAME 5
#define DM_USER_REQ_MAP_WRITE_ZEROES 6
#define DM_USER_REQ_MAP_ZONE_OPEN 7
#define DM_USER_REQ_MAP_ZONE_CLOSE 8
#define DM_USER_REQ_MAP_ZONE_FINISH 9
#define DM_USER_REQ_MAP_ZONE_APPEND 10
#define DM_USER_REQ_MAP_ZONE_RESET 11
#define DM_USER_REQ_MAP_ZONE_RESET_ALL 12
#define DM_USER_REQ_MAP_FLAG_FAILFAST_DEV 0x00001
#define DM_USER_REQ_MAP_FLAG_FAILFAST_TRANSPORT 0x00002
#define DM_USER_REQ_MAP_FLAG_FAILFAST_DRIVER 0x00004
#define DM_USER_REQ_MAP_FLAG_SYNC 0x00008
#define DM_USER_REQ_MAP_FLAG_META 0x00010
#define DM_USER_REQ_MAP_FLAG_PRIO 0x00020
#define DM_USER_REQ_MAP_FLAG_NOMERGE 0x00040
#define DM_USER_REQ_MAP_FLAG_IDLE 0x00080
#define DM_USER_REQ_MAP_FLAG_INTEGRITY 0x00100
#define DM_USER_REQ_MAP_FLAG_FUA 0x00200
#define DM_USER_REQ_MAP_FLAG_PREFLUSH 0x00400
#define DM_USER_REQ_MAP_FLAG_RAHEAD 0x00800
#define DM_USER_REQ_MAP_FLAG_BACKGROUND 0x01000
#define DM_USER_REQ_MAP_FLAG_NOWAIT 0x02000
#define DM_USER_REQ_MAP_FLAG_CGROUP_PUNT 0x04000
#define DM_USER_REQ_MAP_FLAG_NOUNMAP 0x08000
#define DM_USER_REQ_MAP_FLAG_HIPRI 0x10000
#define DM_USER_REQ_MAP_FLAG_DRV 0x20000
#define DM_USER_REQ_MAP_FLAG_SWAP 0x40000
#define DM_USER_RESP_SUCCESS 0
#define DM_USER_RESP_ERROR 1
#define DM_USER_RESP_UNSUPPORTED 2
struct dm_user_message {
__u64 seq;
__u64 type;
__u64 flags;
__u64 sector;
__u64 len;
__u8 buf[];
};
#endif

View file

@ -50,7 +50,10 @@ typedef struct fs_disk_quota {
__s32 d_btimer;
__u16 d_iwarns;
__u16 d_bwarns;
__s32 d_padding2;
__s8 d_itimer_hi;
__s8 d_btimer_hi;
__s8 d_rtbtimer_hi;
__s8 d_padding2;
__u64 d_rtb_hardlimit;
__u64 d_rtb_softlimit;
__u64 d_rtbcount;
@ -78,6 +81,7 @@ typedef struct fs_disk_quota {
#define FS_DQ_ICOUNT (1 << 13)
#define FS_DQ_RTBCOUNT (1 << 14)
#define FS_DQ_ACCT_MASK (FS_DQ_BCOUNT | FS_DQ_ICOUNT | FS_DQ_RTBCOUNT)
#define FS_DQ_BIGTIME (1 << 15)
#define FS_QUOTA_UDQ_ACCT (1 << 0)
#define FS_QUOTA_UDQ_ENFD (1 << 1)
#define FS_QUOTA_GDQ_ACCT (1 << 2)

View file

@ -359,6 +359,7 @@ typedef struct elf64_shdr {
#define NT_ARM_PAC_MASK 0x406
#define NT_ARM_PACA_KEYS 0x407
#define NT_ARM_PACG_KEYS 0x408
#define NT_ARM_TAGGED_ADDR_CTRL 0x409
#define NT_ARC_V2 0x600
#define NT_VMCOREDD 0x700
#define NT_MIPS_DSP 0x800

View file

@ -682,6 +682,8 @@ enum ethtool_link_mode_bit_indices {
ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT = 87,
ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT = 88,
ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT = 89,
ETHTOOL_LINK_MODE_100baseFX_Half_BIT = 90,
ETHTOOL_LINK_MODE_100baseFX_Full_BIT = 91,
__ETHTOOL_LINK_MODE_MASK_NBITS
};
#define __ETHTOOL_LINK_MODE_LEGACY_MASK(base_name) (1UL << (ETHTOOL_LINK_MODE_ ##base_name ##_BIT))

View file

@ -88,7 +88,8 @@ enum {
};
#define ETHTOOL_FLAG_COMPACT_BITSETS (1 << 0)
#define ETHTOOL_FLAG_OMIT_REPLY (1 << 1)
#define ETHTOOL_FLAG_ALL (ETHTOOL_FLAG_COMPACT_BITSETS | ETHTOOL_FLAG_OMIT_REPLY)
#define ETHTOOL_FLAG_STATS (1 << 2)
#define ETHTOOL_FLAG_ALL (ETHTOOL_FLAG_COMPACT_BITSETS | ETHTOOL_FLAG_OMIT_REPLY | ETHTOOL_FLAG_STATS)
enum {
ETHTOOL_A_HEADER_UNSPEC,
ETHTOOL_A_HEADER_DEV_INDEX,
@ -285,9 +286,18 @@ enum {
ETHTOOL_A_PAUSE_AUTONEG,
ETHTOOL_A_PAUSE_RX,
ETHTOOL_A_PAUSE_TX,
ETHTOOL_A_PAUSE_STATS,
__ETHTOOL_A_PAUSE_CNT,
ETHTOOL_A_PAUSE_MAX = (__ETHTOOL_A_PAUSE_CNT - 1)
};
enum {
ETHTOOL_A_PAUSE_STAT_UNSPEC,
ETHTOOL_A_PAUSE_STAT_PAD,
ETHTOOL_A_PAUSE_STAT_TX_FRAMES,
ETHTOOL_A_PAUSE_STAT_RX_FRAMES,
__ETHTOOL_A_PAUSE_STAT_CNT,
ETHTOOL_A_PAUSE_STAT_MAX = (__ETHTOOL_A_PAUSE_STAT_CNT - 1)
};
enum {
ETHTOOL_A_EEE_UNSPEC,
ETHTOOL_A_EEE_HEADER,

View file

@ -44,7 +44,6 @@ struct fscrypt_policy_v1 {
__u8 flags;
__u8 master_key_descriptor[FSCRYPT_KEY_DESCRIPTOR_SIZE];
};
#define fscrypt_policy fscrypt_policy_v1
#define FSCRYPT_KEY_DESC_PREFIX "fscrypt:"
#define FSCRYPT_KEY_DESC_PREFIX_SIZE 8
#define FSCRYPT_MAX_KEY_SIZE 64
@ -115,15 +114,16 @@ struct fscrypt_get_key_status_arg {
__u32 user_count;
__u32 __out_reserved[13];
};
#define FS_IOC_SET_ENCRYPTION_POLICY _IOR('f', 19, struct fscrypt_policy)
#define FS_IOC_SET_ENCRYPTION_POLICY _IOR('f', 19, struct fscrypt_policy_v1)
#define FS_IOC_GET_ENCRYPTION_PWSALT _IOW('f', 20, __u8[16])
#define FS_IOC_GET_ENCRYPTION_POLICY _IOW('f', 21, struct fscrypt_policy)
#define FS_IOC_GET_ENCRYPTION_POLICY _IOW('f', 21, struct fscrypt_policy_v1)
#define FS_IOC_GET_ENCRYPTION_POLICY_EX _IOWR('f', 22, __u8[9])
#define FS_IOC_ADD_ENCRYPTION_KEY _IOWR('f', 23, struct fscrypt_add_key_arg)
#define FS_IOC_REMOVE_ENCRYPTION_KEY _IOWR('f', 24, struct fscrypt_remove_key_arg)
#define FS_IOC_REMOVE_ENCRYPTION_KEY_ALL_USERS _IOWR('f', 25, struct fscrypt_remove_key_arg)
#define FS_IOC_GET_ENCRYPTION_KEY_STATUS _IOWR('f', 26, struct fscrypt_get_key_status_arg)
#define FS_IOC_GET_ENCRYPTION_NONCE _IOR('f', 27, __u8[16])
#define fscrypt_policy fscrypt_policy_v1
#define FS_KEY_DESCRIPTOR_SIZE FSCRYPT_KEY_DESCRIPTOR_SIZE
#define FS_POLICY_FLAGS_PAD_4 FSCRYPT_POLICY_FLAGS_PAD_4
#define FS_POLICY_FLAGS_PAD_8 FSCRYPT_POLICY_FLAGS_PAD_8

View file

@ -20,7 +20,7 @@
#define _LINUX_FUSE_H
#include <stdint.h>
#define FUSE_KERNEL_VERSION 7
#define FUSE_KERNEL_MINOR_VERSION 31
#define FUSE_KERNEL_MINOR_VERSION 32
#define FUSE_ROOT_ID 1
struct fuse_attr {
uint64_t ino;
@ -38,7 +38,7 @@ struct fuse_attr {
uint32_t gid;
uint32_t rdev;
uint32_t blksize;
uint32_t padding;
uint32_t flags;
};
struct fuse_kstatfs {
uint64_t blocks;
@ -101,6 +101,8 @@ struct fuse_file_lock {
#define FUSE_NO_OPENDIR_SUPPORT (1 << 24)
#define FUSE_EXPLICIT_INVAL_DATA (1 << 25)
#define FUSE_MAP_ALIGNMENT (1 << 26)
#define FUSE_SUBMOUNTS (1 << 27)
#define FUSE_PASSTHROUGH (1 << 31)
#define CUSE_UNRESTRICTED_IOCTL (1 << 0)
#define FUSE_RELEASE_FLUSH (1 << 0)
#define FUSE_RELEASE_FLOCK_UNLOCK (1 << 1)
@ -119,6 +121,7 @@ struct fuse_file_lock {
#define FUSE_IOCTL_MAX_IOV 256
#define FUSE_POLL_SCHEDULE_NOTIFY (1 << 0)
#define FUSE_FSYNC_FDATASYNC (1 << 0)
#define FUSE_ATTR_SUBMOUNT (1 << 0)
enum fuse_opcode {
FUSE_LOOKUP = 1,
FUSE_FORGET = 2,
@ -167,6 +170,7 @@ enum fuse_opcode {
FUSE_COPY_FILE_RANGE = 47,
FUSE_SETUPMAPPING = 48,
FUSE_REMOVEMAPPING = 49,
FUSE_CANONICAL_PATH = 2016,
CUSE_INIT = 4096,
CUSE_INIT_BSWAP_RESERVED = 1048576,
FUSE_INIT_BSWAP_RESERVED = 436207616,
@ -267,7 +271,7 @@ struct fuse_create_in {
struct fuse_open_out {
uint64_t fh;
uint32_t open_flags;
uint32_t padding;
uint32_t passthrough_fh;
};
struct fuse_release_in {
uint64_t fh;
@ -437,6 +441,11 @@ struct fuse_in_header {
uint32_t pid;
uint32_t padding;
};
struct fuse_passthrough_out {
uint32_t fd;
uint32_t len;
void * vec;
};
struct fuse_out_header {
uint32_t len;
int32_t error;
@ -496,6 +505,7 @@ struct fuse_notify_retrieve_in {
uint64_t dummy4;
};
#define FUSE_DEV_IOC_CLONE _IOR(229, 0, uint32_t)
#define FUSE_DEV_IOC_PASSTHROUGH_OPEN _IOW(229, 1, struct fuse_passthrough_out)
struct fuse_lseek_in {
uint64_t fh;
uint64_t offset;
@ -514,4 +524,21 @@ struct fuse_copy_file_range_in {
uint64_t len;
uint64_t flags;
};
#define FUSE_SETUPMAPPING_FLAG_WRITE (1ull << 0)
#define FUSE_SETUPMAPPING_FLAG_READ (1ull << 1)
struct fuse_setupmapping_in {
uint64_t fh;
uint64_t foffset;
uint64_t len;
uint64_t flags;
uint64_t moffset;
};
struct fuse_removemapping_in {
uint32_t count;
};
struct fuse_removemapping_one {
uint64_t moffset;
uint64_t len;
};
#define FUSE_REMOVEMAPPING_MAX_ENTRY (PAGE_SIZE / sizeof(struct fuse_removemapping_one))
#endif

View file

@ -63,6 +63,8 @@ enum {
CTRL_ATTR_OPS,
CTRL_ATTR_MCAST_GROUPS,
CTRL_ATTR_POLICY,
CTRL_ATTR_OP_POLICY,
CTRL_ATTR_OP,
__CTRL_ATTR_MAX,
};
#define CTRL_ATTR_MAX (__CTRL_ATTR_MAX - 1)
@ -79,5 +81,12 @@ enum {
CTRL_ATTR_MCAST_GRP_ID,
__CTRL_ATTR_MCAST_GRP_MAX,
};
enum {
CTRL_ATTR_POLICY_UNSPEC,
CTRL_ATTR_POLICY_DO,
CTRL_ATTR_POLICY_DUMP,
__CTRL_ATTR_POLICY_DUMP_MAX,
CTRL_ATTR_POLICY_DUMP_MAX = __CTRL_ATTR_POLICY_DUMP_MAX - 1
};
#define CTRL_ATTR_MCAST_GRP_MAX (__CTRL_ATTR_MCAST_GRP_MAX - 1)
#endif

View file

@ -18,13 +18,99 @@
****************************************************************************/
#ifndef _UAPI_GPIO_H_
#define _UAPI_GPIO_H_
#include <linux/const.h>
#include <linux/ioctl.h>
#include <linux/types.h>
#define GPIO_MAX_NAME_SIZE 32
struct gpiochip_info {
char name[32];
char label[32];
char name[GPIO_MAX_NAME_SIZE];
char label[GPIO_MAX_NAME_SIZE];
__u32 lines;
};
#define GPIO_V2_LINES_MAX 64
#define GPIO_V2_LINE_NUM_ATTRS_MAX 10
enum gpio_v2_line_flag {
GPIO_V2_LINE_FLAG_USED = _BITULL(0),
GPIO_V2_LINE_FLAG_ACTIVE_LOW = _BITULL(1),
GPIO_V2_LINE_FLAG_INPUT = _BITULL(2),
GPIO_V2_LINE_FLAG_OUTPUT = _BITULL(3),
GPIO_V2_LINE_FLAG_EDGE_RISING = _BITULL(4),
GPIO_V2_LINE_FLAG_EDGE_FALLING = _BITULL(5),
GPIO_V2_LINE_FLAG_OPEN_DRAIN = _BITULL(6),
GPIO_V2_LINE_FLAG_OPEN_SOURCE = _BITULL(7),
GPIO_V2_LINE_FLAG_BIAS_PULL_UP = _BITULL(8),
GPIO_V2_LINE_FLAG_BIAS_PULL_DOWN = _BITULL(9),
GPIO_V2_LINE_FLAG_BIAS_DISABLED = _BITULL(10),
};
struct gpio_v2_line_values {
__aligned_u64 bits;
__aligned_u64 mask;
};
enum gpio_v2_line_attr_id {
GPIO_V2_LINE_ATTR_ID_FLAGS = 1,
GPIO_V2_LINE_ATTR_ID_OUTPUT_VALUES = 2,
GPIO_V2_LINE_ATTR_ID_DEBOUNCE = 3,
};
struct gpio_v2_line_attribute {
__u32 id;
__u32 padding;
union {
__aligned_u64 flags;
__aligned_u64 values;
__u32 debounce_period_us;
};
};
struct gpio_v2_line_config_attribute {
struct gpio_v2_line_attribute attr;
__aligned_u64 mask;
};
struct gpio_v2_line_config {
__aligned_u64 flags;
__u32 num_attrs;
__u32 padding[5];
struct gpio_v2_line_config_attribute attrs[GPIO_V2_LINE_NUM_ATTRS_MAX];
};
struct gpio_v2_line_request {
__u32 offsets[GPIO_V2_LINES_MAX];
char consumer[GPIO_MAX_NAME_SIZE];
struct gpio_v2_line_config config;
__u32 num_lines;
__u32 event_buffer_size;
__u32 padding[5];
__s32 fd;
};
struct gpio_v2_line_info {
char name[GPIO_MAX_NAME_SIZE];
char consumer[GPIO_MAX_NAME_SIZE];
__u32 offset;
__u32 num_attrs;
__aligned_u64 flags;
struct gpio_v2_line_attribute attrs[GPIO_V2_LINE_NUM_ATTRS_MAX];
__u32 padding[4];
};
enum gpio_v2_line_changed_type {
GPIO_V2_LINE_CHANGED_REQUESTED = 1,
GPIO_V2_LINE_CHANGED_RELEASED = 2,
GPIO_V2_LINE_CHANGED_CONFIG = 3,
};
struct gpio_v2_line_info_changed {
struct gpio_v2_line_info info;
__aligned_u64 timestamp_ns;
__u32 event_type;
__u32 padding[5];
};
enum gpio_v2_line_event_id {
GPIO_V2_LINE_EVENT_RISING_EDGE = 1,
GPIO_V2_LINE_EVENT_FALLING_EDGE = 2,
};
struct gpio_v2_line_event {
__aligned_u64 timestamp_ns;
__u32 id;
__u32 offset;
__u32 seqno;
__u32 line_seqno;
__u32 padding[6];
};
#define GPIOLINE_FLAG_KERNEL (1UL << 0)
#define GPIOLINE_FLAG_IS_OUT (1UL << 1)
#define GPIOLINE_FLAG_ACTIVE_LOW (1UL << 2)
@ -36,8 +122,8 @@ struct gpiochip_info {
struct gpioline_info {
__u32 line_offset;
__u32 flags;
char name[32];
char consumer[32];
char name[GPIO_MAX_NAME_SIZE];
char consumer[GPIO_MAX_NAME_SIZE];
};
#define GPIOHANDLES_MAX 64
enum {
@ -63,7 +149,7 @@ struct gpiohandle_request {
__u32 lineoffsets[GPIOHANDLES_MAX];
__u32 flags;
__u8 default_values[GPIOHANDLES_MAX];
char consumer_label[32];
char consumer_label[GPIO_MAX_NAME_SIZE];
__u32 lines;
int fd;
};
@ -72,12 +158,9 @@ struct gpiohandle_config {
__u8 default_values[GPIOHANDLES_MAX];
__u32 padding[4];
};
#define GPIOHANDLE_SET_CONFIG_IOCTL _IOWR(0xB4, 0x0a, struct gpiohandle_config)
struct gpiohandle_data {
__u8 values[GPIOHANDLES_MAX];
};
#define GPIOHANDLE_GET_LINE_VALUES_IOCTL _IOWR(0xB4, 0x08, struct gpiohandle_data)
#define GPIOHANDLE_SET_LINE_VALUES_IOCTL _IOWR(0xB4, 0x09, struct gpiohandle_data)
#define GPIOEVENT_REQUEST_RISING_EDGE (1UL << 0)
#define GPIOEVENT_REQUEST_FALLING_EDGE (1UL << 1)
#define GPIOEVENT_REQUEST_BOTH_EDGES ((1UL << 0) | (1UL << 1))
@ -85,7 +168,7 @@ struct gpioevent_request {
__u32 lineoffset;
__u32 handleflags;
__u32 eventflags;
char consumer_label[32];
char consumer_label[GPIO_MAX_NAME_SIZE];
int fd;
};
#define GPIOEVENT_EVENT_RISING_EDGE 0x01
@ -95,9 +178,18 @@ struct gpioevent_data {
__u32 id;
};
#define GPIO_GET_CHIPINFO_IOCTL _IOR(0xB4, 0x01, struct gpiochip_info)
#define GPIO_GET_LINEINFO_UNWATCH_IOCTL _IOWR(0xB4, 0x0C, __u32)
#define GPIO_V2_GET_LINEINFO_IOCTL _IOWR(0xB4, 0x05, struct gpio_v2_line_info)
#define GPIO_V2_GET_LINEINFO_WATCH_IOCTL _IOWR(0xB4, 0x06, struct gpio_v2_line_info)
#define GPIO_V2_GET_LINE_IOCTL _IOWR(0xB4, 0x07, struct gpio_v2_line_request)
#define GPIO_V2_LINE_SET_CONFIG_IOCTL _IOWR(0xB4, 0x0D, struct gpio_v2_line_config)
#define GPIO_V2_LINE_GET_VALUES_IOCTL _IOWR(0xB4, 0x0E, struct gpio_v2_line_values)
#define GPIO_V2_LINE_SET_VALUES_IOCTL _IOWR(0xB4, 0x0F, struct gpio_v2_line_values)
#define GPIO_GET_LINEINFO_IOCTL _IOWR(0xB4, 0x02, struct gpioline_info)
#define GPIO_GET_LINEINFO_WATCH_IOCTL _IOWR(0xB4, 0x0b, struct gpioline_info)
#define GPIO_GET_LINEINFO_UNWATCH_IOCTL _IOWR(0xB4, 0x0c, __u32)
#define GPIO_GET_LINEHANDLE_IOCTL _IOWR(0xB4, 0x03, struct gpiohandle_request)
#define GPIO_GET_LINEEVENT_IOCTL _IOWR(0xB4, 0x04, struct gpioevent_request)
#define GPIOHANDLE_GET_LINE_VALUES_IOCTL _IOWR(0xB4, 0x08, struct gpiohandle_data)
#define GPIOHANDLE_SET_LINE_VALUES_IOCTL _IOWR(0xB4, 0x09, struct gpiohandle_data)
#define GPIOHANDLE_SET_CONFIG_IOCTL _IOWR(0xB4, 0x0A, struct gpiohandle_config)
#define GPIO_GET_LINEINFO_WATCH_IOCTL _IOWR(0xB4, 0x0B, struct gpioline_info)
#endif

View file

@ -18,6 +18,7 @@
****************************************************************************/
#ifndef _UAPI_LINUX_GTP_H_
#define _UAPI_LINUX_GTP_H_
#define GTP_GENL_MCGRP_NAME "gtp"
enum gtp_genl_cmds {
GTP_CMD_NEWPDP,
GTP_CMD_DELPDP,

View file

@ -106,6 +106,7 @@ struct icmp6hdr {
#define ICMPV6_HDR_FIELD 0
#define ICMPV6_UNK_NEXTHDR 1
#define ICMPV6_UNK_OPTION 2
#define ICMPV6_HDR_INCOMP 3
#define ICMPV6_FILTER 1
#define ICMPV6_FILTER_BLOCK 1
#define ICMPV6_FILTER_PASS 2

View file

@ -35,6 +35,7 @@ struct af_alg_iv {
#define ALG_SET_OP 3
#define ALG_SET_AEAD_ASSOCLEN 4
#define ALG_SET_AEAD_AUTHSIZE 5
#define ALG_SET_DRBG_ENTROPY 6
#define ALG_OP_DECRYPT 0
#define ALG_OP_ENCRYPT 1
#endif

View file

@ -355,9 +355,26 @@ enum {
enum {
MDBA_MDB_EATTR_UNSPEC,
MDBA_MDB_EATTR_TIMER,
MDBA_MDB_EATTR_SRC_LIST,
MDBA_MDB_EATTR_GROUP_MODE,
MDBA_MDB_EATTR_SOURCE,
MDBA_MDB_EATTR_RTPROT,
__MDBA_MDB_EATTR_MAX
};
#define MDBA_MDB_EATTR_MAX (__MDBA_MDB_EATTR_MAX - 1)
enum {
MDBA_MDB_SRCLIST_UNSPEC,
MDBA_MDB_SRCLIST_ENTRY,
__MDBA_MDB_SRCLIST_MAX
};
#define MDBA_MDB_SRCLIST_MAX (__MDBA_MDB_SRCLIST_MAX - 1)
enum {
MDBA_MDB_SRCATTR_UNSPEC,
MDBA_MDB_SRCATTR_ADDRESS,
MDBA_MDB_SRCATTR_TIMER,
__MDBA_MDB_SRCATTR_MAX
};
#define MDBA_MDB_SRCATTR_MAX (__MDBA_MDB_SRCATTR_MAX - 1)
enum {
MDB_RTR_TYPE_DISABLED,
MDB_RTR_TYPE_TEMP_QUERY,
@ -388,6 +405,8 @@ struct br_mdb_entry {
__u8 state;
#define MDB_FLAGS_OFFLOAD (1 << 0)
#define MDB_FLAGS_FAST_LEAVE (1 << 1)
#define MDB_FLAGS_STAR_EXCL (1 << 2)
#define MDB_FLAGS_BLOCKED (1 << 3)
__u8 flags;
__u16 vid;
struct {
@ -401,9 +420,16 @@ struct br_mdb_entry {
enum {
MDBA_SET_ENTRY_UNSPEC,
MDBA_SET_ENTRY,
MDBA_SET_ENTRY_ATTRS,
__MDBA_SET_ENTRY_MAX,
};
#define MDBA_SET_ENTRY_MAX (__MDBA_SET_ENTRY_MAX - 1)
enum {
MDBE_ATTR_UNSPEC,
MDBE_ATTR_SOURCE,
__MDBE_ATTR_MAX,
};
#define MDBE_ATTR_MAX (__MDBE_ATTR_MAX - 1)
enum {
BRIDGE_XSTATS_UNSPEC,
BRIDGE_XSTATS_VLAN,

View file

@ -100,6 +100,7 @@ enum iio_modifier {
IIO_MOD_PM10,
IIO_MOD_ETHANOL,
IIO_MOD_H2,
IIO_MOD_O2,
};
enum iio_event_type {
IIO_EV_TYPE_THRESH,

View file

@ -48,10 +48,12 @@
#define INCFS_IOC_GET_READ_TIMEOUTS _IOR(INCFS_IOCTL_BASE_CODE, 37, struct incfs_get_read_timeouts_args)
#define INCFS_IOC_SET_READ_TIMEOUTS _IOW(INCFS_IOCTL_BASE_CODE, 38, struct incfs_set_read_timeouts_args)
#define INCFS_FEATURE_FLAG_COREFS "corefs"
#define INCFS_FEATURE_FLAG_REPORT_UID "report_uid"
#define INCFS_FEATURE_FLAG_ZSTD "zstd"
#define INCFS_FEATURE_FLAG_V2 "v2"
enum incfs_compression_alg {
COMPRESSION_NONE = 0,
COMPRESSION_LZ4 = 1
COMPRESSION_LZ4 = 1,
COMPRESSION_ZSTD = 2,
};
enum incfs_block_flags {
INCFS_BLOCK_FLAGS_NONE = 0,
@ -147,9 +149,9 @@ struct incfs_get_block_count_args {
};
struct incfs_per_uid_read_timeouts {
__u32 uid;
__u32 min_time_ms;
__u32 min_pending_time_ms;
__u32 max_pending_time_ms;
__u32 min_time_us;
__u32 min_pending_time_us;
__u32 max_pending_time_us;
};
struct incfs_get_read_timeouts_args {
__aligned_u64 timeouts_array;

View file

@ -130,6 +130,7 @@ enum {
INET_DIAG_ULP_INFO,
INET_DIAG_SK_BPF_STORAGES,
INET_DIAG_CGROUP_ID,
INET_DIAG_SOCKOPT,
__INET_DIAG_MAX,
};
#define INET_DIAG_MAX (__INET_DIAG_MAX - 1)
@ -147,6 +148,10 @@ struct inet_diag_meminfo {
__u32 idiag_fmem;
__u32 idiag_tmem;
};
struct inet_diag_sockopt {
__u8 recverr : 1, is_icsk : 1, freebind : 1, hdrincl : 1, mc_loop : 1, transparent : 1, mc_all : 1, nodefrag : 1;
__u8 bind_address_no_port : 1, recverr_rfc4884 : 1, defer_connect : 1, unused : 5;
};
struct tcpvegas_info {
__u32 tcpv_enabled;
__u32 tcpv_rttcnt;

View file

@ -463,6 +463,9 @@
#define KEY_10CHANNELSUP 0x1b8
#define KEY_10CHANNELSDOWN 0x1b9
#define KEY_IMAGES 0x1ba
#define KEY_NOTIFICATION_CENTER 0x1bc
#define KEY_PICKUP_PHONE 0x1bd
#define KEY_HANGUP_PHONE 0x1be
#define KEY_DEL_EOL 0x1c0
#define KEY_DEL_EOS 0x1c1
#define KEY_INS_LINE 0x1c2
@ -488,6 +491,7 @@
#define KEY_FN_F 0x1e2
#define KEY_FN_S 0x1e3
#define KEY_FN_B 0x1e4
#define KEY_FN_RIGHT_SHIFT 0x1e5
#define KEY_BRL_DOT1 0x1f1
#define KEY_BRL_DOT2 0x1f2
#define KEY_BRL_DOT3 0x1f3

View file

@ -82,6 +82,7 @@ enum {
#define IORING_SETUP_CQSIZE (1U << 3)
#define IORING_SETUP_CLAMP (1U << 4)
#define IORING_SETUP_ATTACH_WQ (1U << 5)
#define IORING_SETUP_R_DISABLED (1U << 6)
enum {
IORING_OP_NOP,
IORING_OP_READV,
@ -161,6 +162,7 @@ struct io_cqring_offsets {
#define IORING_CQ_EVENTFD_DISABLED (1U << 0)
#define IORING_ENTER_GETEVENTS (1U << 0)
#define IORING_ENTER_SQ_WAKEUP (1U << 1)
#define IORING_ENTER_SQ_WAIT (1U << 2)
struct io_uring_params {
__u32 sq_entries;
__u32 cq_entries;
@ -180,17 +182,22 @@ struct io_uring_params {
#define IORING_FEAT_CUR_PERSONALITY (1U << 4)
#define IORING_FEAT_FAST_POLL (1U << 5)
#define IORING_FEAT_POLL_32BITS (1U << 6)
#define IORING_REGISTER_BUFFERS 0
#define IORING_UNREGISTER_BUFFERS 1
#define IORING_REGISTER_FILES 2
#define IORING_UNREGISTER_FILES 3
#define IORING_REGISTER_EVENTFD 4
#define IORING_UNREGISTER_EVENTFD 5
#define IORING_REGISTER_FILES_UPDATE 6
#define IORING_REGISTER_EVENTFD_ASYNC 7
#define IORING_REGISTER_PROBE 8
#define IORING_REGISTER_PERSONALITY 9
#define IORING_UNREGISTER_PERSONALITY 10
enum {
IORING_REGISTER_BUFFERS = 0,
IORING_UNREGISTER_BUFFERS = 1,
IORING_REGISTER_FILES = 2,
IORING_UNREGISTER_FILES = 3,
IORING_REGISTER_EVENTFD = 4,
IORING_UNREGISTER_EVENTFD = 5,
IORING_REGISTER_FILES_UPDATE = 6,
IORING_REGISTER_EVENTFD_ASYNC = 7,
IORING_REGISTER_PROBE = 8,
IORING_REGISTER_PERSONALITY = 9,
IORING_UNREGISTER_PERSONALITY = 10,
IORING_REGISTER_RESTRICTIONS = 11,
IORING_REGISTER_ENABLE_RINGS = 12,
IORING_REGISTER_LAST
};
struct io_uring_files_update {
__u32 offset;
__u32 resv;
@ -210,4 +217,21 @@ struct io_uring_probe {
__u32 resv2[3];
struct io_uring_probe_op ops[0];
};
struct io_uring_restriction {
__u16 opcode;
union {
__u8 register_op;
__u8 sqe_op;
__u8 sqe_flags;
};
__u8 resv;
__u32 resv2[3];
};
enum {
IORING_RESTRICTION_REGISTER_OP = 0,
IORING_RESTRICTION_SQE_OP = 1,
IORING_RESTRICTION_SQE_FLAGS_ALLOWED = 2,
IORING_RESTRICTION_SQE_FLAGS_REQUIRED = 3,
IORING_RESTRICTION_LAST
};
#endif

View file

@ -76,6 +76,7 @@ enum iommu_page_response_code {
IOMMU_PAGE_RESP_FAILURE,
};
struct iommu_page_response {
__u32 argsz;
#define IOMMU_PAGE_RESP_VERSION_1 1
__u32 version;
#define IOMMU_PAGE_RESP_PASID_VALID (1 << 0)
@ -109,6 +110,7 @@ struct iommu_inv_pasid_info {
__u64 pasid;
};
struct iommu_cache_invalidate_info {
__u32 argsz;
#define IOMMU_CACHE_INVALIDATE_INFO_VERSION_1 1
__u32 version;
#define IOMMU_CACHE_INV_TYPE_IOTLB (1 << 0)
@ -117,11 +119,11 @@ struct iommu_cache_invalidate_info {
#define IOMMU_CACHE_INV_TYPE_NR (3)
__u8 cache;
__u8 granularity;
__u8 padding[2];
__u8 padding[6];
union {
struct iommu_inv_pasid_info pasid_info;
struct iommu_inv_addr_info addr_info;
};
} granu;
};
struct iommu_gpasid_bind_data_vtd {
#define IOMMU_SVA_VTD_GPASID_SRE (1 << 0)
@ -130,25 +132,28 @@ struct iommu_gpasid_bind_data_vtd {
#define IOMMU_SVA_VTD_GPASID_PWT (1 << 3)
#define IOMMU_SVA_VTD_GPASID_EMTE (1 << 4)
#define IOMMU_SVA_VTD_GPASID_CD (1 << 5)
#define IOMMU_SVA_VTD_GPASID_LAST (1 << 6)
__u64 flags;
__u32 pat;
__u32 emt;
};
#define IOMMU_SVA_VTD_GPASID_MTS_MASK (IOMMU_SVA_VTD_GPASID_CD | IOMMU_SVA_VTD_GPASID_EMTE | IOMMU_SVA_VTD_GPASID_PCD | IOMMU_SVA_VTD_GPASID_PWT)
struct iommu_gpasid_bind_data {
__u32 argsz;
#define IOMMU_GPASID_BIND_VERSION_1 1
__u32 version;
#define IOMMU_PASID_FORMAT_INTEL_VTD 1
#define IOMMU_PASID_FORMAT_LAST 2
__u32 format;
__u32 addr_width;
#define IOMMU_SVA_GPASID_VAL (1 << 0)
__u64 flags;
__u64 gpgd;
__u64 hpasid;
__u64 gpasid;
__u32 addr_width;
__u8 padding[12];
__u8 padding[8];
union {
struct iommu_gpasid_bind_data_vtd vtd;
};
} vendor;
};
#endif

View file

@ -53,6 +53,8 @@
#define IPMI_ERR_MSG_TRUNCATED 0xc6
#define IPMI_REQ_LEN_INVALID_ERR 0xc7
#define IPMI_REQ_LEN_EXCEEDED_ERR 0xc8
#define IPMI_DEVICE_IN_FW_UPDATE_ERR 0xd1
#define IPMI_DEVICE_IN_INIT_ERR 0xd2
#define IPMI_NOT_IN_MY_STATE_ERR 0xd5
#define IPMI_LOST_ARBITRATION_ERR 0x81
#define IPMI_BUS_ERR 0x82

View file

@ -287,7 +287,14 @@ struct kfd_ioctl_import_dmabuf_args {
__u32 gpu_id;
__u32 dmabuf_fd;
};
#define KFD_SMI_EVENT_VMFAULT 0x0000000000000001
enum kfd_smi_event {
KFD_SMI_EVENT_NONE = 0,
KFD_SMI_EVENT_VMFAULT = 1,
KFD_SMI_EVENT_THERMAL_THROTTLE = 2,
KFD_SMI_EVENT_GPU_PRE_RESET = 3,
KFD_SMI_EVENT_GPU_POST_RESET = 4,
};
#define KFD_SMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1))
struct kfd_ioctl_smi_events_args {
__u32 gpuid;
__u32 anon_fd;

View file

@ -195,6 +195,8 @@ struct kvm_hyperv_exit {
#define KVM_EXIT_IOAPIC_EOI 26
#define KVM_EXIT_HYPERV 27
#define KVM_EXIT_ARM_NISV 28
#define KVM_EXIT_X86_RDMSR 29
#define KVM_EXIT_X86_WRMSR 30
#define KVM_INTERNAL_ERROR_EMULATION 1
#define KVM_INTERNAL_ERROR_SIMUL_EX 2
#define KVM_INTERNAL_ERROR_DELIVERY_EV 3
@ -322,6 +324,16 @@ struct kvm_run {
__u64 esr_iss;
__u64 fault_ipa;
} arm_nisv;
struct {
__u8 error;
__u8 pad[7];
#define KVM_MSR_EXIT_REASON_INVAL (1 << 0)
#define KVM_MSR_EXIT_REASON_UNKNOWN (1 << 1)
#define KVM_MSR_EXIT_REASON_FILTER (1 << 2)
__u32 reason;
__u32 index;
__u64 data;
} msr;
char padding[256];
};
#define SYNC_REGS_SIZE_BYTES 2048
@ -816,6 +828,9 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_SMALLER_MAXPHYADDR 185
#define KVM_CAP_S390_DIAG318 186
#define KVM_CAP_STEAL_TIME 187
#define KVM_CAP_X86_USER_SPACE_MSR 188
#define KVM_CAP_X86_MSR_FILTER 189
#define KVM_CAP_ENFORCE_PV_FEATURE_CPUID 190
#ifdef KVM_CAP_IRQ_ROUTING
struct kvm_irq_routing_irqchip {
__u32 irqchip;
@ -1167,6 +1182,7 @@ struct kvm_pv_cmd {
__u32 reserved[3];
};
#define KVM_S390_PV_COMMAND _IOWR(KVMIO, 0xc5, struct kvm_pv_cmd)
#define KVM_X86_SET_MSR_FILTER _IOW(KVMIO, 0xc6, struct kvm_msr_filter)
enum sev_cmd_id {
KVM_SEV_INIT = 0,
KVM_SEV_ES_INIT,

View file

@ -103,6 +103,7 @@ enum {
L2TP_ATTR_RX_OOS_PACKETS,
L2TP_ATTR_RX_ERRORS,
L2TP_ATTR_STATS_PAD,
L2TP_ATTR_RX_COOKIE_DISCARDS,
__L2TP_ATTR_STATS_MAX,
};
#define L2TP_ATTR_STATS_MAX (__L2TP_ATTR_STATS_MAX - 1)

View file

@ -33,4 +33,16 @@ struct mei_connect_client_data {
};
#define IOCTL_MEI_NOTIFY_SET _IOW('H', 0x02, __u32)
#define IOCTL_MEI_NOTIFY_GET _IOR('H', 0x03, __u32)
struct mei_connect_client_vtag {
uuid_le in_client_uuid;
__u8 vtag;
__u8 reserved[3];
};
struct mei_connect_client_data_vtag {
union {
struct mei_connect_client_vtag connect;
struct mei_client out_client_properties;
};
};
#define IOCTL_MEI_CONNECT_CLIENT_VTAG _IOWR('H', 0x04, struct mei_connect_client_data_vtag)
#endif

View file

@ -27,6 +27,11 @@ enum membarrier_cmd {
MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED = (1 << 4),
MEMBARRIER_CMD_PRIVATE_EXPEDITED_SYNC_CORE = (1 << 5),
MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_SYNC_CORE = (1 << 6),
MEMBARRIER_CMD_PRIVATE_EXPEDITED_RSEQ = (1 << 7),
MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_RSEQ = (1 << 8),
MEMBARRIER_CMD_SHARED = MEMBARRIER_CMD_GLOBAL,
};
enum membarrier_cmd_flag {
MEMBARRIER_CMD_FLAG_CPU = (1 << 0),
};
#endif

View file

@ -1,96 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef __MIC_COMMON_H_
#define __MIC_COMMON_H_
#include <linux/virtio_ring.h>
#define __mic_align(a,x) (((a) + (x) - 1) & ~((x) - 1))
struct mic_device_desc {
__s8 type;
__u8 num_vq;
__u8 feature_len;
__u8 config_len;
__u8 status;
__le64 config[0];
} __attribute__((aligned(8)));
struct mic_device_ctrl {
__le64 vdev;
__u8 config_change;
__u8 vdev_reset;
__u8 guest_ack;
__u8 host_ack;
__u8 used_address_updated;
__s8 c2h_vdev_db;
__s8 h2c_vdev_db;
} __attribute__((aligned(8)));
struct mic_bootparam {
__le32 magic;
__s8 h2c_config_db;
__u8 node_id;
__u8 h2c_scif_db;
__u8 c2h_scif_db;
__u64 scif_host_dma_addr;
__u64 scif_card_dma_addr;
} __attribute__((aligned(8)));
struct mic_device_page {
struct mic_bootparam bootparam;
struct mic_device_desc desc[0];
};
struct mic_vqconfig {
__le64 address;
__le64 used_address;
__le16 num;
} __attribute__((aligned(8)));
#define MIC_VIRTIO_RING_ALIGN 4096
#define MIC_MAX_VRINGS 4
#define MIC_VRING_ENTRIES 128
#define MIC_MAX_VRING_ENTRIES 128
#define MIC_MAX_DESC_BLK_SIZE 256
struct _mic_vring_info {
__u16 avail_idx;
__le32 magic;
};
struct mic_vring {
struct vring vr;
struct _mic_vring_info * info;
void * va;
int len;
};
#define mic_aligned_desc_size(d) __mic_align(mic_desc_size(d), 8)
#ifndef INTEL_MIC_CARD
#endif
#define MIC_DP_SIZE 4096
#define MIC_MAGIC 0xc0ffee00
enum mic_states {
MIC_READY = 0,
MIC_BOOTING,
MIC_ONLINE,
MIC_SHUTTING_DOWN,
MIC_RESETTING,
MIC_RESET_FAILED,
MIC_LAST
};
enum mic_status {
MIC_NOP = 0,
MIC_CRASHED,
MIC_HALTED,
MIC_POWER_OFF,
MIC_RESTART,
MIC_STATUS_LAST
};
#endif

View file

@ -31,6 +31,7 @@
#define MAP_SHARED_VALIDATE 0x03
#define MAP_HUGE_SHIFT HUGETLB_FLAG_ENCODE_SHIFT
#define MAP_HUGE_MASK HUGETLB_FLAG_ENCODE_MASK
#define MAP_HUGE_16KB HUGETLB_FLAG_ENCODE_16KB
#define MAP_HUGE_64KB HUGETLB_FLAG_ENCODE_64KB
#define MAP_HUGE_512KB HUGETLB_FLAG_ENCODE_512KB
#define MAP_HUGE_1MB HUGETLB_FLAG_ENCODE_1MB

View file

@ -26,6 +26,7 @@
#define MS_REMOUNT 32
#define MS_MANDLOCK 64
#define MS_DIRSYNC 128
#define MS_NOSYMFOLLOW 256
#define MS_NOATIME 1024
#define MS_NODIRATIME 2048
#define MS_BIND 4096

View file

@ -97,7 +97,7 @@ struct igmpmsg {
unsigned char im_msgtype;
unsigned char im_mbz;
unsigned char im_vif;
unsigned char unused3;
unsigned char im_vif_hi;
struct in_addr im_src, im_dst;
};
enum {
@ -140,6 +140,7 @@ enum {
IPMRA_CREPORT_SRC_ADDR,
IPMRA_CREPORT_DST_ADDR,
IPMRA_CREPORT_PKT,
IPMRA_CREPORT_TABLE,
__IPMRA_CREPORT_MAX
};
#define IPMRA_CREPORT_MAX (__IPMRA_CREPORT_MAX - 1)

View file

@ -42,7 +42,8 @@ enum nf_inet_hooks {
NF_INET_FORWARD,
NF_INET_LOCAL_OUT,
NF_INET_POST_ROUTING,
NF_INET_NUMHOOKS
NF_INET_NUMHOOKS,
NF_INET_INGRESS = NF_INET_NUMHOOKS,
};
enum nf_dev_hooks {
NF_NETDEV_INGRESS,

View file

@ -113,6 +113,7 @@ enum nft_table_attributes {
NFTA_TABLE_USE,
NFTA_TABLE_HANDLE,
NFTA_TABLE_PAD,
NFTA_TABLE_USERDATA,
__NFTA_TABLE_MAX
};
#define NFTA_TABLE_MAX (__NFTA_TABLE_MAX - 1)
@ -135,6 +136,7 @@ enum nft_chain_attributes {
NFTA_CHAIN_PAD,
NFTA_CHAIN_FLAGS,
NFTA_CHAIN_ID,
NFTA_CHAIN_USERDATA,
__NFTA_CHAIN_MAX
};
#define NFTA_CHAIN_MAX (__NFTA_CHAIN_MAX - 1)
@ -379,6 +381,7 @@ enum nft_payload_bases {
enum nft_payload_csum_types {
NFT_PAYLOAD_CSUM_NONE,
NFT_PAYLOAD_CSUM_INET,
NFT_PAYLOAD_CSUM_SCTP,
};
enum nft_payload_csum_flags {
NFT_PAYLOAD_L4CSUM_PSEUDOHDR = (1 << 0),
@ -507,6 +510,7 @@ enum nft_socket_attributes {
enum nft_socket_keys {
NFT_SOCKET_TRANSPARENT,
NFT_SOCKET_MARK,
NFT_SOCKET_WILDCARD,
__NFT_SOCKET_MAX
};
#define NFT_SOCKET_MAX (__NFT_SOCKET_MAX - 1)
@ -810,6 +814,7 @@ enum nft_object_attributes {
NFTA_OBJ_USE,
NFTA_OBJ_HANDLE,
NFTA_OBJ_PAD,
NFTA_OBJ_USERDATA,
__NFTA_OBJ_MAX
};
#define NFTA_OBJ_MAX (__NFTA_OBJ_MAX - 1)

View file

@ -248,6 +248,7 @@ enum ctattr_stats_cpu {
CTA_STATS_EARLY_DROP,
CTA_STATS_ERROR,
CTA_STATS_SEARCH_RESTART,
CTA_STATS_CLASH_RESOLVE,
__CTA_STATS_MAX,
};
#define CTA_STATS_MAX (__CTA_STATS_MAX - 1)

View file

@ -98,6 +98,7 @@ enum nlmsgerr_attrs {
NLMSGERR_ATTR_MSG,
NLMSGERR_ATTR_OFFS,
NLMSGERR_ATTR_COOKIE,
NLMSGERR_ATTR_POLICY,
__NLMSGERR_ATTR_MAX,
NLMSGERR_ATTR_MAX = __NLMSGERR_ATTR_MAX - 1
};
@ -190,6 +191,7 @@ enum netlink_policy_type_attr {
NL_POLICY_TYPE_ATTR_POLICY_MAXTYPE,
NL_POLICY_TYPE_ATTR_BITFIELD32_MASK,
NL_POLICY_TYPE_ATTR_PAD,
NL_POLICY_TYPE_ATTR_MASK,
__NL_POLICY_TYPE_ATTR_MAX,
NL_POLICY_TYPE_ATTR_MAX = __NL_POLICY_TYPE_ATTR_MAX - 1
};

View file

@ -124,8 +124,10 @@
#define EXCHGID4_FLAG_MASK_PNFS 0x00070000
#define EXCHGID4_FLAG_UPD_CONFIRMED_REC_A 0x40000000
#define EXCHGID4_FLAG_CONFIRMED_R 0x80000000
#define EXCHGID4_FLAG_SUPP_FENCE_OPS 0x00000004
#define EXCHGID4_FLAG_MASK_A 0x40070103
#define EXCHGID4_FLAG_MASK_R 0x80070103
#define EXCHGID4_2_FLAG_MASK_R 0x80070107
#define SEQ4_STATUS_CB_PATH_DOWN 0x00000001
#define SEQ4_STATUS_CB_GSS_CONTEXTS_EXPIRING 0x00000002
#define SEQ4_STATUS_CB_GSS_CONTEXTS_EXPIRED 0x00000004

View file

@ -19,10 +19,12 @@
#ifndef _UAPI__LINUX_NFSACL_H
#define _UAPI__LINUX_NFSACL_H
#define NFS_ACL_PROGRAM 100227
#define ACLPROC2_NULL 0
#define ACLPROC2_GETACL 1
#define ACLPROC2_SETACL 2
#define ACLPROC2_GETATTR 3
#define ACLPROC2_ACCESS 4
#define ACLPROC3_NULL 0
#define ACLPROC3_GETACL 1
#define ACLPROC3_SETACL 2
#define NFS_ACL 0x0001

View file

@ -0,0 +1,67 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _UAPI_LINUX_NITRO_ENCLAVES_H_
#define _UAPI_LINUX_NITRO_ENCLAVES_H_
#include <linux/types.h>
#define NE_CREATE_VM _IOR(0xAE, 0x20, __u64)
#define NE_ADD_VCPU _IOWR(0xAE, 0x21, __u32)
#define NE_GET_IMAGE_LOAD_INFO _IOWR(0xAE, 0x22, struct ne_image_load_info)
#define NE_SET_USER_MEMORY_REGION _IOW(0xAE, 0x23, struct ne_user_memory_region)
#define NE_START_ENCLAVE _IOWR(0xAE, 0x24, struct ne_enclave_start_info)
#define NE_ERR_VCPU_ALREADY_USED (256)
#define NE_ERR_VCPU_NOT_IN_CPU_POOL (257)
#define NE_ERR_VCPU_INVALID_CPU_CORE (258)
#define NE_ERR_INVALID_MEM_REGION_SIZE (259)
#define NE_ERR_INVALID_MEM_REGION_ADDR (260)
#define NE_ERR_UNALIGNED_MEM_REGION_ADDR (261)
#define NE_ERR_MEM_REGION_ALREADY_USED (262)
#define NE_ERR_MEM_NOT_HUGE_PAGE (263)
#define NE_ERR_MEM_DIFFERENT_NUMA_NODE (264)
#define NE_ERR_MEM_MAX_REGIONS (265)
#define NE_ERR_NO_MEM_REGIONS_ADDED (266)
#define NE_ERR_NO_VCPUS_ADDED (267)
#define NE_ERR_ENCLAVE_MEM_MIN_SIZE (268)
#define NE_ERR_FULL_CORES_NOT_USED (269)
#define NE_ERR_NOT_IN_INIT_STATE (270)
#define NE_ERR_INVALID_VCPU (271)
#define NE_ERR_NO_CPUS_AVAIL_IN_POOL (272)
#define NE_ERR_INVALID_PAGE_SIZE (273)
#define NE_ERR_INVALID_FLAG_VALUE (274)
#define NE_ERR_INVALID_ENCLAVE_CID (275)
#define NE_EIF_IMAGE (0x01)
#define NE_IMAGE_LOAD_MAX_FLAG_VAL (0x02)
struct ne_image_load_info {
__u64 flags;
__u64 memory_offset;
};
#define NE_DEFAULT_MEMORY_REGION (0x00)
#define NE_MEMORY_REGION_MAX_FLAG_VAL (0x01)
struct ne_user_memory_region {
__u64 flags;
__u64 memory_size;
__u64 userspace_addr;
};
#define NE_ENCLAVE_PRODUCTION_MODE (0x00)
#define NE_ENCLAVE_DEBUG_MODE (0x01)
#define NE_ENCLAVE_START_MAX_FLAG_VAL (0x02)
struct ne_enclave_start_info {
__u64 flags;
__u64 enclave_cid;
};
#endif

View file

@ -379,8 +379,8 @@ enum nl80211_attrs {
NL80211_ATTR_CH_SWITCH_COUNT,
NL80211_ATTR_CH_SWITCH_BLOCK_TX,
NL80211_ATTR_CSA_IES,
NL80211_ATTR_CSA_C_OFF_BEACON,
NL80211_ATTR_CSA_C_OFF_PRESP,
NL80211_ATTR_CNTDWN_OFFS_BEACON,
NL80211_ATTR_CNTDWN_OFFS_PRESP,
NL80211_ATTR_RXMGMT_FLAGS,
NL80211_ATTR_STA_SUPPORTED_CHANNELS,
NL80211_ATTR_STA_SUPPORTED_OPER_CLASSES,
@ -487,6 +487,10 @@ enum nl80211_attrs {
NL80211_ATTR_CENTER_FREQ1_OFFSET,
NL80211_ATTR_SCAN_FREQ_KHZ,
NL80211_ATTR_HE_6GHZ_CAPABILITY,
NL80211_ATTR_FILS_DISCOVERY,
NL80211_ATTR_UNSOL_BCAST_PROBE_RESP,
NL80211_ATTR_S1G_CAPABILITY,
NL80211_ATTR_S1G_CAPABILITY_MASK,
__NL80211_ATTR_AFTER_LAST,
NUM_NL80211_ATTR = __NL80211_ATTR_AFTER_LAST,
NL80211_ATTR_MAX = __NL80211_ATTR_AFTER_LAST - 1
@ -495,6 +499,8 @@ enum nl80211_attrs {
#define NL80211_ATTR_MESH_PARAMS NL80211_ATTR_MESH_CONFIG
#define NL80211_ATTR_IFACE_SOCKET_OWNER NL80211_ATTR_SOCKET_OWNER
#define NL80211_ATTR_SAE_DATA NL80211_ATTR_AUTH_DATA
#define NL80211_ATTR_CSA_C_OFF_BEACON NL80211_ATTR_CNTDWN_OFFS_BEACON
#define NL80211_ATTR_CSA_C_OFF_PRESP NL80211_ATTR_CNTDWN_OFFS_PRESP
#define NL80211_CMD_CONNECT NL80211_CMD_CONNECT
#define NL80211_ATTR_HT_CAPABILITY NL80211_ATTR_HT_CAPABILITY
#define NL80211_ATTR_BSS_BASIC_RATES NL80211_ATTR_BSS_BASIC_RATES
@ -576,6 +582,11 @@ enum nl80211_he_gi {
NL80211_RATE_INFO_HE_GI_1_6,
NL80211_RATE_INFO_HE_GI_3_2,
};
enum nl80211_he_ltf {
NL80211_RATE_INFO_HE_1XLTF,
NL80211_RATE_INFO_HE_2XLTF,
NL80211_RATE_INFO_HE_4XLTF,
};
enum nl80211_he_ru_alloc {
NL80211_RATE_INFO_HE_RU_ALLOC_26,
NL80211_RATE_INFO_HE_RU_ALLOC_52,
@ -773,6 +784,11 @@ enum nl80211_frequency_attr {
NL80211_FREQUENCY_ATTR_WMM,
NL80211_FREQUENCY_ATTR_NO_HE,
NL80211_FREQUENCY_ATTR_OFFSET,
NL80211_FREQUENCY_ATTR_1MHZ,
NL80211_FREQUENCY_ATTR_2MHZ,
NL80211_FREQUENCY_ATTR_4MHZ,
NL80211_FREQUENCY_ATTR_8MHZ,
NL80211_FREQUENCY_ATTR_16MHZ,
__NL80211_FREQUENCY_ATTR_AFTER_LAST,
NL80211_FREQUENCY_ATTR_MAX = __NL80211_FREQUENCY_ATTR_AFTER_LAST - 1
};
@ -872,6 +888,7 @@ enum nl80211_survey_info {
NL80211_SURVEY_INFO_TIME_SCAN,
NL80211_SURVEY_INFO_PAD,
NL80211_SURVEY_INFO_TIME_BSS_RX,
NL80211_SURVEY_INFO_FREQUENCY_OFFSET,
__NL80211_SURVEY_INFO_AFTER_LAST,
NL80211_SURVEY_INFO_MAX = __NL80211_SURVEY_INFO_AFTER_LAST - 1
};
@ -1089,6 +1106,9 @@ enum nl80211_tx_rate_attributes {
NL80211_TXRATE_HT,
NL80211_TXRATE_VHT,
NL80211_TXRATE_GI,
NL80211_TXRATE_HE,
NL80211_TXRATE_HE_GI,
NL80211_TXRATE_HE_LTF,
__NL80211_TXRATE_AFTER_LAST,
NL80211_TXRATE_MAX = __NL80211_TXRATE_AFTER_LAST - 1
};
@ -1097,6 +1117,10 @@ enum nl80211_tx_rate_attributes {
struct nl80211_txrate_vht {
__u16 mcs[NL80211_VHT_NSS_MAX];
};
#define NL80211_HE_NSS_MAX 8
struct nl80211_txrate_he {
__u16 mcs[NL80211_HE_NSS_MAX];
};
enum nl80211_txrate_gi {
NL80211_TXRATE_DEFAULT_GI,
NL80211_TXRATE_FORCE_SGI,
@ -1416,6 +1440,9 @@ enum nl80211_ext_feature_index {
NL80211_EXT_FEATURE_CONTROL_PORT_OVER_NL80211_TX_STATUS,
NL80211_EXT_FEATURE_OPERATING_CHANNEL_VALIDATION,
NL80211_EXT_FEATURE_4WAY_HANDSHAKE_AP_PSK,
NL80211_EXT_FEATURE_SAE_OFFLOAD_AP,
NL80211_EXT_FEATURE_FILS_DISCOVERY,
NL80211_EXT_FEATURE_UNSOL_BCAST_PROBE_RESP,
NUM_NL80211_EXT_FEATURES,
MAX_NL80211_EXT_FEATURES = NUM_NL80211_EXT_FEATURES - 1
};
@ -1450,6 +1477,7 @@ enum nl80211_scan_flags {
NL80211_SCAN_FLAG_RANDOM_SN = 1 << 11,
NL80211_SCAN_FLAG_MIN_PREQ_CONTENT = 1 << 12,
NL80211_SCAN_FLAG_FREQ_KHZ = 1 << 13,
NL80211_SCAN_FLAG_COLOCATED_6GHZ = 1 << 14,
};
enum nl80211_acl_policy {
NL80211_ACL_POLICY_ACCEPT_UNLESS_LISTED,
@ -1729,6 +1757,10 @@ enum nl80211_obss_pd_attributes {
__NL80211_HE_OBSS_PD_ATTR_INVALID,
NL80211_HE_OBSS_PD_ATTR_MIN_OFFSET,
NL80211_HE_OBSS_PD_ATTR_MAX_OFFSET,
NL80211_HE_OBSS_PD_ATTR_NON_SRG_MAX_OFFSET,
NL80211_HE_OBSS_PD_ATTR_BSS_COLOR_BITMAP,
NL80211_HE_OBSS_PD_ATTR_PARTIAL_BSSID_BITMAP,
NL80211_HE_OBSS_PD_ATTR_SR_CTRL,
__NL80211_HE_OBSS_PD_ATTR_LAST,
NL80211_HE_OBSS_PD_ATTR_MAX = __NL80211_HE_OBSS_PD_ATTR_LAST - 1,
};
@ -1747,4 +1779,20 @@ enum nl80211_iftype_akm_attributes {
__NL80211_IFTYPE_AKM_ATTR_LAST,
NL80211_IFTYPE_AKM_ATTR_MAX = __NL80211_IFTYPE_AKM_ATTR_LAST - 1,
};
enum nl80211_fils_discovery_attributes {
__NL80211_FILS_DISCOVERY_ATTR_INVALID,
NL80211_FILS_DISCOVERY_ATTR_INT_MIN,
NL80211_FILS_DISCOVERY_ATTR_INT_MAX,
NL80211_FILS_DISCOVERY_ATTR_TMPL,
__NL80211_FILS_DISCOVERY_ATTR_LAST,
NL80211_FILS_DISCOVERY_ATTR_MAX = __NL80211_FILS_DISCOVERY_ATTR_LAST - 1
};
#define NL80211_FILS_DISCOVERY_TMPL_MIN_LEN 42
enum nl80211_unsol_bcast_probe_resp_attributes {
__NL80211_UNSOL_BCAST_PROBE_RESP_ATTR_INVALID,
NL80211_UNSOL_BCAST_PROBE_RESP_ATTR_INT,
NL80211_UNSOL_BCAST_PROBE_RESP_ATTR_TMPL,
__NL80211_UNSOL_BCAST_PROBE_RESP_ATTR_LAST,
NL80211_UNSOL_BCAST_PROBE_RESP_ATTR_MAX = __NL80211_UNSOL_BCAST_PROBE_RESP_ATTR_LAST - 1
};
#endif

View file

@ -516,4 +516,5 @@ enum ovs_dec_ttl_attr {
OVS_DEC_TTL_ATTR_ACTION,
__OVS_DEC_TTL_ATTR_MAX
};
#define OVS_DEC_TTL_ATTR_MAX (__OVS_DEC_TTL_ATTR_MAX - 1)
#endif

View file

@ -60,6 +60,7 @@
#define PCI_CACHE_LINE_SIZE 0x0c
#define PCI_LATENCY_TIMER 0x0d
#define PCI_HEADER_TYPE 0x0e
#define PCI_HEADER_TYPE_MASK 0x7f
#define PCI_HEADER_TYPE_NORMAL 0
#define PCI_HEADER_TYPE_BRIDGE 1
#define PCI_HEADER_TYPE_CARDBUS 2
@ -200,7 +201,7 @@
#define PCI_PM_CAP_PME_D0 0x0800
#define PCI_PM_CAP_PME_D1 0x1000
#define PCI_PM_CAP_PME_D2 0x2000
#define PCI_PM_CAP_PME_D3 0x4000
#define PCI_PM_CAP_PME_D3hot 0x4000
#define PCI_PM_CAP_PME_D3cold 0x8000
#define PCI_PM_CAP_PME_SHIFT 11
#define PCI_PM_CTRL 4
@ -441,6 +442,8 @@
#define PCI_EXP_LNKCAP_SLS_32_0GB 0x00000005
#define PCI_EXP_LNKCAP_MLW 0x000003f0
#define PCI_EXP_LNKCAP_ASPMS 0x00000c00
#define PCI_EXP_LNKCAP_ASPM_L0S 0x00000400
#define PCI_EXP_LNKCAP_ASPM_L1 0x00000800
#define PCI_EXP_LNKCAP_L0SEL 0x00007000
#define PCI_EXP_LNKCAP_L1EL 0x00038000
#define PCI_EXP_LNKCAP_CLKPM 0x00040000
@ -900,6 +903,7 @@
#define PCI_L1SS_CTL1_PCIPM_L1_1 0x00000002
#define PCI_L1SS_CTL1_ASPM_L1_2 0x00000004
#define PCI_L1SS_CTL1_ASPM_L1_1 0x00000008
#define PCI_L1SS_CTL1_L1_2_MASK 0x00000005
#define PCI_L1SS_CTL1_L1SS_MASK 0x0000000f
#define PCI_L1SS_CTL1_CM_RESTORE_TIME 0x0000ff00
#define PCI_L1SS_CTL1_LTR_L12_TH_VALUE 0x03ff0000

View file

@ -431,7 +431,7 @@ union perf_mem_data_src {
#define PERF_MEM_SNOOP_HITM 0x10
#define PERF_MEM_SNOOP_SHIFT 19
#define PERF_MEM_SNOOPX_FWD 0x01
#define PERF_MEM_SNOOPX_SHIFT 37
#define PERF_MEM_SNOOPX_SHIFT 38
#define PERF_MEM_LOCK_NA 0x01
#define PERF_MEM_LOCK_LOCKED 0x02
#define PERF_MEM_LOCK_SHIFT 24

View file

@ -16,17 +16,9 @@
***
****************************************************************************
****************************************************************************/
#ifndef _MIC_IOCTL_H_
#define _MIC_IOCTL_H_
#ifndef _UAPI_LINUX_PIDFD_H
#define _UAPI_LINUX_PIDFD_H
#include <linux/types.h>
struct mic_copy_desc {
struct iovec * iov;
__u32 iovcnt;
__u8 vr_idx;
__u8 update_used;
__u32 out_len;
};
#define MIC_VIRTIO_ADD_DEVICE _IOWR('s', 1, struct mic_device_desc *)
#define MIC_VIRTIO_COPY_DESC _IOWR('s', 2, struct mic_copy_desc *)
#define MIC_VIRTIO_CONFIG_CHANGE _IOWR('s', 5, __u8 *)
#include <linux/fcntl.h>
#define PIDFD_NONBLOCK O_NONBLOCK
#endif

View file

@ -153,6 +153,13 @@ struct prctl_mm_map {
#define PR_SET_TAGGED_ADDR_CTRL 55
#define PR_GET_TAGGED_ADDR_CTRL 56
#define PR_TAGGED_ADDR_ENABLE (1UL << 0)
#define PR_MTE_TCF_SHIFT 1
#define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT)
#define PR_MTE_TCF_SYNC (1UL << PR_MTE_TCF_SHIFT)
#define PR_MTE_TCF_ASYNC (2UL << PR_MTE_TCF_SHIFT)
#define PR_MTE_TCF_MASK (3UL << PR_MTE_TCF_SHIFT)
#define PR_MTE_TAG_SHIFT 3
#define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT)
#define PR_SET_IO_FLUSHER 57
#define PR_GET_IO_FLUSHER 58
#define PR_SET_VMA 0x53564d41

View file

@ -105,5 +105,5 @@ struct statx {
#define STATX_ATTR_AUTOMOUNT 0x00001000
#define STATX_ATTR_MOUNT_ROOT 0x00002000
#define STATX_ATTR_VERITY 0x00100000
#define STATX_ATTR_DAX 0x00002000
#define STATX_ATTR_DAX 0x00200000
#endif

View file

@ -23,6 +23,7 @@
#define TCA_MPLS_ACT_PUSH 2
#define TCA_MPLS_ACT_MODIFY 3
#define TCA_MPLS_ACT_DEC_TTL 4
#define TCA_MPLS_ACT_MAC_PUSH 5
struct tc_mpls {
tc_gen;
int m_action;

View file

@ -22,6 +22,8 @@
#define TCA_VLAN_ACT_POP 1
#define TCA_VLAN_ACT_PUSH 2
#define TCA_VLAN_ACT_MODIFY 3
#define TCA_VLAN_ACT_POP_ETH 4
#define TCA_VLAN_ACT_PUSH_ETH 5
struct tc_vlan {
tc_gen;
int v_action;
@ -34,6 +36,8 @@ enum {
TCA_VLAN_PUSH_VLAN_PROTOCOL,
TCA_VLAN_PAD,
TCA_VLAN_PUSH_VLAN_PRIORITY,
TCA_VLAN_PUSH_ETH_DST,
TCA_VLAN_PUSH_ETH_SRC,
__TCA_VLAN_MAX,
};
#define TCA_VLAN_MAX (__TCA_VLAN_MAX - 1)

View file

@ -28,6 +28,8 @@
#define TEE_GEN_CAP_GP (1 << 0)
#define TEE_GEN_CAP_PRIVILEGED (1 << 1)
#define TEE_GEN_CAP_REG_MEM (1 << 2)
#define TEE_GEN_CAP_MEMREF_NULL (1 << 3)
#define TEE_MEMREF_NULL (__u64) (- 1)
#define TEE_IMPL_ID_OPTEE 1
#define TEE_IMPL_ID_AMDTEE 2
#define TEE_OPTEE_CAP_TZ (1 << 0)

View file

@ -146,6 +146,7 @@ struct tipc_aead_key {
#define TIPC_AEAD_KEYLEN_MIN (16 + 4)
#define TIPC_AEAD_KEYLEN_MAX (32 + 4)
#define TIPC_AEAD_KEY_SIZE_MAX (sizeof(struct tipc_aead_key) + TIPC_AEAD_KEYLEN_MAX)
#define TIPC_REKEYING_NOW (~0U)
#define TIPC_CFG_SRV 0
#define TIPC_ZONE_SCOPE 1
#define TIPC_ADDR_NAMESEQ 1

View file

@ -127,6 +127,8 @@ enum {
TIPC_NLA_NODE_UP,
TIPC_NLA_NODE_ID,
TIPC_NLA_NODE_KEY,
TIPC_NLA_NODE_KEY_MASTER,
TIPC_NLA_NODE_REKEYING,
__TIPC_NLA_NODE_MAX,
TIPC_NLA_NODE_MAX = __TIPC_NLA_NODE_MAX - 1
};

View file

@ -21,16 +21,21 @@
#include <linux/media-bus-format.h>
#include <linux/types.h>
#include <linux/videodev2.h>
#define V4L2_MBUS_FRAMEFMT_SET_CSC 0x0001
struct v4l2_mbus_framefmt {
__u32 width;
__u32 height;
__u32 code;
__u32 field;
__u32 colorspace;
__u16 ycbcr_enc;
union {
__u16 ycbcr_enc;
__u16 hsv_enc;
};
__u16 quantization;
__u16 xfer_func;
__u16 reserved[11];
__u16 flags;
__u16 reserved[10];
};
#define V4L2_MBUS_FROM_MEDIA_BUS_FMT(name) V4L2_MBUS_FMT_ ##name = MEDIA_BUS_FMT_ ##name
enum v4l2_mbus_pixelcode {

View file

@ -38,12 +38,18 @@ struct v4l2_subdev_crop {
struct v4l2_rect rect;
__u32 reserved[8];
};
#define V4L2_SUBDEV_MBUS_CODE_CSC_COLORSPACE 0x00000001
#define V4L2_SUBDEV_MBUS_CODE_CSC_XFER_FUNC 0x00000002
#define V4L2_SUBDEV_MBUS_CODE_CSC_YCBCR_ENC 0x00000004
#define V4L2_SUBDEV_MBUS_CODE_CSC_HSV_ENC V4L2_SUBDEV_MBUS_CODE_CSC_YCBCR_ENC
#define V4L2_SUBDEV_MBUS_CODE_CSC_QUANTIZATION 0x00000008
struct v4l2_subdev_mbus_code_enum {
__u32 pad;
__u32 index;
__u32 code;
__u32 which;
__u32 reserved[8];
__u32 flags;
__u32 reserved[7];
};
struct v4l2_subdev_frame_size_enum {
__u32 index;

View file

@ -16,5 +16,5 @@
***
****************************************************************************
****************************************************************************/
#define LINUX_VERSION_CODE 329984
#define LINUX_VERSION_CODE 330240
#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))

View file

@ -58,8 +58,11 @@ struct vfio_device_info {
#define VFIO_DEVICE_FLAGS_AMBA (1 << 3)
#define VFIO_DEVICE_FLAGS_CCW (1 << 4)
#define VFIO_DEVICE_FLAGS_AP (1 << 5)
#define VFIO_DEVICE_FLAGS_FSL_MC (1 << 6)
#define VFIO_DEVICE_FLAGS_CAPS (1 << 7)
__u32 num_regions;
__u32 num_irqs;
__u32 cap_offset;
};
#define VFIO_DEVICE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 7)
#define VFIO_DEVICE_API_PCI_STRING "vfio-pci"
@ -67,6 +70,10 @@ struct vfio_device_info {
#define VFIO_DEVICE_API_AMBA_STRING "vfio-amba"
#define VFIO_DEVICE_API_CCW_STRING "vfio-ccw"
#define VFIO_DEVICE_API_AP_STRING "vfio-ap"
#define VFIO_DEVICE_INFO_CAP_ZPCI_BASE 1
#define VFIO_DEVICE_INFO_CAP_ZPCI_GROUP 2
#define VFIO_DEVICE_INFO_CAP_ZPCI_UTIL 3
#define VFIO_DEVICE_INFO_CAP_ZPCI_PFIP 4
struct vfio_region_info {
__u32 argsz;
__u32 flags;
@ -301,6 +308,11 @@ struct vfio_iommu_type1_info_cap_migration {
__u64 pgsize_bitmap;
__u64 max_dirty_bitmap_size;
};
#define VFIO_IOMMU_TYPE1_INFO_DMA_AVAIL 3
struct vfio_iommu_type1_info_dma_avail {
struct vfio_info_cap_header header;
__u32 avail;
};
#define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
struct vfio_iommu_type1_dma_map {
__u32 argsz;

View file

@ -0,0 +1,54 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _VFIO_ZDEV_H_
#define _VFIO_ZDEV_H_
#include <linux/types.h>
#include <linux/vfio.h>
struct vfio_device_info_cap_zpci_base {
struct vfio_info_cap_header header;
__u64 start_dma;
__u64 end_dma;
__u16 pchid;
__u16 vfn;
__u16 fmb_length;
__u8 pft;
__u8 gid;
};
struct vfio_device_info_cap_zpci_group {
struct vfio_info_cap_header header;
__u64 dasm;
__u64 msi_addr;
__u64 flags;
#define VFIO_DEVICE_INFO_ZPCI_FLAG_REFRESH 1
__u16 mui;
__u16 noi;
__u16 maxstbl;
__u8 version;
};
struct vfio_device_info_cap_zpci_util {
struct vfio_info_cap_header header;
__u32 size;
__u8 util_str[];
};
struct vfio_device_info_cap_zpci_pfip {
struct vfio_info_cap_header header;
__u32 size;
__u8 pfip[];
};
#endif

View file

@ -63,4 +63,5 @@
#define VHOST_VDPA_SET_VRING_ENABLE _IOW(VHOST_VIRTIO, 0x75, struct vhost_vring_state)
#define VHOST_VDPA_GET_VRING_NUM _IOR(VHOST_VIRTIO, 0x76, __u16)
#define VHOST_VDPA_SET_CONFIG_CALL _IOW(VHOST_VIRTIO, 0x77, int)
#define VHOST_VDPA_GET_IOVA_RANGE _IOR(VHOST_VIRTIO, 0x78, struct vhost_vdpa_iova_range)
#endif

View file

@ -96,6 +96,10 @@ struct vhost_vdpa_config {
__u32 len;
__u8 buf[0];
};
struct vhost_vdpa_iova_range {
__u64 first;
__u64 last;
};
#define VHOST_F_LOG_ALL 26
#define VHOST_NET_F_VIRTIO_NET_HDR 27
#endif

View file

@ -128,7 +128,7 @@ enum v4l2_quantization {
V4L2_QUANTIZATION_FULL_RANGE = 1,
V4L2_QUANTIZATION_LIM_RANGE = 2,
};
#define V4L2_MAP_QUANTIZATION_DEFAULT(is_rgb_or_hsv,colsp,ycbcr_enc) (((is_rgb_or_hsv) && (colsp) == V4L2_COLORSPACE_BT2020) ? V4L2_QUANTIZATION_LIM_RANGE : (((is_rgb_or_hsv) || (colsp) == V4L2_COLORSPACE_JPEG) ? V4L2_QUANTIZATION_FULL_RANGE : V4L2_QUANTIZATION_LIM_RANGE))
#define V4L2_MAP_QUANTIZATION_DEFAULT(is_rgb_or_hsv,colsp,ycbcr_enc) (((is_rgb_or_hsv) || (colsp) == V4L2_COLORSPACE_JPEG) ? V4L2_QUANTIZATION_FULL_RANGE : V4L2_QUANTIZATION_LIM_RANGE)
#define V4L2_COLORSPACE_ADOBERGB V4L2_COLORSPACE_OPRGB
#define V4L2_XFER_FUNC_ADOBERGB V4L2_XFER_FUNC_OPRGB
enum v4l2_priority {
@ -416,6 +416,7 @@ struct v4l2_pix_format {
#define V4L2_META_FMT_VIVID v4l2_fourcc('V', 'I', 'V', 'D')
#define V4L2_PIX_FMT_PRIV_MAGIC 0xfeedcafe
#define V4L2_PIX_FMT_FLAG_PREMUL_ALPHA 0x00000001
#define V4L2_PIX_FMT_FLAG_SET_CSC 0x00000002
struct v4l2_fmtdesc {
__u32 index;
__u32 type;
@ -430,6 +431,11 @@ struct v4l2_fmtdesc {
#define V4L2_FMT_FLAG_CONTINUOUS_BYTESTREAM 0x0004
#define V4L2_FMT_FLAG_DYN_RESOLUTION 0x0008
#define V4L2_FMT_FLAG_ENC_CAP_FRAME_INTERVAL 0x0010
#define V4L2_FMT_FLAG_CSC_COLORSPACE 0x0020
#define V4L2_FMT_FLAG_CSC_XFER_FUNC 0x0040
#define V4L2_FMT_FLAG_CSC_YCBCR_ENC 0x0080
#define V4L2_FMT_FLAG_CSC_HSV_ENC V4L2_FMT_FLAG_CSC_YCBCR_ENC
#define V4L2_FMT_FLAG_CSC_QUANTIZATION 0x0100
enum v4l2_frmsizetypes {
V4L2_FRMSIZE_TYPE_DISCRETE = 1,
V4L2_FRMSIZE_TYPE_CONTINUOUS = 2,

View file

@ -26,4 +26,5 @@ struct virtio_fs_config {
__u8 tag[36];
__le32 num_request_queues;
} __attribute__((packed));
#define VIRTIO_FS_SHMCAP_ID_CACHE 0
#endif

View file

@ -21,6 +21,7 @@
#include <linux/types.h>
#define VIRTIO_GPU_F_VIRGL 0
#define VIRTIO_GPU_F_EDID 1
#define VIRTIO_GPU_F_RESOURCE_UUID 2
enum virtio_gpu_ctrl_type {
VIRTIO_GPU_UNDEFINED = 0,
VIRTIO_GPU_CMD_GET_DISPLAY_INFO = 0x0100,
@ -34,6 +35,7 @@ enum virtio_gpu_ctrl_type {
VIRTIO_GPU_CMD_GET_CAPSET_INFO,
VIRTIO_GPU_CMD_GET_CAPSET,
VIRTIO_GPU_CMD_GET_EDID,
VIRTIO_GPU_CMD_RESOURCE_ASSIGN_UUID,
VIRTIO_GPU_CMD_CTX_CREATE = 0x0200,
VIRTIO_GPU_CMD_CTX_DESTROY,
VIRTIO_GPU_CMD_CTX_ATTACH_RESOURCE,
@ -49,6 +51,7 @@ enum virtio_gpu_ctrl_type {
VIRTIO_GPU_RESP_OK_CAPSET_INFO,
VIRTIO_GPU_RESP_OK_CAPSET,
VIRTIO_GPU_RESP_OK_EDID,
VIRTIO_GPU_RESP_OK_RESOURCE_UUID,
VIRTIO_GPU_RESP_ERR_UNSPEC = 0x1200,
VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY,
VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID,
@ -238,4 +241,13 @@ enum virtio_gpu_formats {
VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM = 121,
VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM = 134,
};
struct virtio_gpu_resource_assign_uuid {
struct virtio_gpu_ctrl_hdr hdr;
__le32 resource_id;
__le32 padding;
};
struct virtio_gpu_resp_resource_uuid {
struct virtio_gpu_ctrl_hdr hdr;
__u8 uuid[16];
};
#endif

View file

@ -47,6 +47,11 @@
#define VIRTIO_MMIO_QUEUE_AVAIL_HIGH 0x094
#define VIRTIO_MMIO_QUEUE_USED_LOW 0x0a0
#define VIRTIO_MMIO_QUEUE_USED_HIGH 0x0a4
#define VIRTIO_MMIO_SHM_SEL 0x0ac
#define VIRTIO_MMIO_SHM_LEN_LOW 0x0b0
#define VIRTIO_MMIO_SHM_LEN_HIGH 0x0b4
#define VIRTIO_MMIO_SHM_BASE_LOW 0x0b8
#define VIRTIO_MMIO_SHM_BASE_HIGH 0x0bc
#define VIRTIO_MMIO_CONFIG_GENERATION 0x0fc
#define VIRTIO_MMIO_CONFIG 0x100
#define VIRTIO_MMIO_INT_VRING (1 << 0)

View file

@ -44,16 +44,23 @@
#define VIRTIO_PCI_CAP_ISR_CFG 3
#define VIRTIO_PCI_CAP_DEVICE_CFG 4
#define VIRTIO_PCI_CAP_PCI_CFG 5
#define VIRTIO_PCI_CAP_SHARED_MEMORY_CFG 8
struct virtio_pci_cap {
__u8 cap_vndr;
__u8 cap_next;
__u8 cap_len;
__u8 cfg_type;
__u8 bar;
__u8 padding[3];
__u8 id;
__u8 padding[2];
__le32 offset;
__le32 length;
};
struct virtio_pci_cap64 {
struct virtio_pci_cap cap;
__le32 offset_hi;
__le32 length_hi;
};
struct virtio_pci_notify_cap {
struct virtio_pci_cap cap;
__le32 notify_off_multiplier;

View file

@ -26,6 +26,7 @@
#define FASTRPC_IOCTL_INIT_CREATE _IOWR('R', 5, struct fastrpc_init_create)
#define FASTRPC_IOCTL_MMAP _IOWR('R', 6, struct fastrpc_req_mmap)
#define FASTRPC_IOCTL_MUNMAP _IOWR('R', 7, struct fastrpc_req_munmap)
#define FASTRPC_IOCTL_INIT_ATTACH_SNS _IO('R', 8)
struct fastrpc_invoke_args {
__u64 ptr;
__u64 length;

View file

@ -224,6 +224,10 @@ enum hl_device_status {
#define HL_INFO_RESET_COUNT 9
#define HL_INFO_TIME_SYNC 10
#define HL_INFO_CS_COUNTERS 11
#define HL_INFO_PCI_COUNTERS 12
#define HL_INFO_CLK_THROTTLE_REASON 13
#define HL_INFO_SYNC_MANAGER 14
#define HL_INFO_TOTAL_ENERGY 15
#define HL_INFO_VERSION_MAX_LEN 128
#define HL_INFO_CARD_NAME_MAX_LEN 16
struct hl_info_hw_ip_info {
@ -235,7 +239,7 @@ struct hl_info_hw_ip_info {
__u32 device_id;
__u32 module_id;
__u32 reserved[2];
__u32 armcp_cpld_version;
__u32 cpld_version;
__u32 psoc_pci_pll_nr;
__u32 psoc_pci_pll_nf;
__u32 psoc_pci_pll_od;
@ -243,7 +247,7 @@ struct hl_info_hw_ip_info {
__u8 tpc_enabled_mask;
__u8 dram_enabled;
__u8 pad[2];
__u8 armcp_version[HL_INFO_VERSION_MAX_LEN];
__u8 cpucp_version[HL_INFO_VERSION_MAX_LEN];
__u8 card_name[HL_INFO_CARD_NAME_MAX_LEN];
};
struct hl_info_dram_usage {
@ -253,6 +257,7 @@ struct hl_info_dram_usage {
struct hl_info_hw_idle {
__u32 is_idle;
__u32 busy_engines_mask;
__u64 busy_engines_mask_ext;
};
struct hl_info_device_status {
__u32 status;
@ -274,21 +279,46 @@ struct hl_info_time_sync {
__u64 device_time;
__u64 host_time;
};
struct hl_info_pci_counters {
__u64 rx_throughput;
__u64 tx_throughput;
__u64 replay_cnt;
};
#define HL_CLK_THROTTLE_POWER 0x1
#define HL_CLK_THROTTLE_THERMAL 0x2
struct hl_info_clk_throttle {
__u32 clk_throttling_reason;
};
struct hl_info_energy {
__u64 total_energy_consumption;
};
struct hl_info_sync_manager {
__u32 first_available_sync_object;
__u32 first_available_monitor;
};
struct hl_cs_counters {
__u64 out_of_mem_drop_cnt;
__u64 parsing_drop_cnt;
__u64 queue_full_drop_cnt;
__u64 device_in_reset_drop_cnt;
__u64 max_cs_in_flight_drop_cnt;
};
struct hl_info_cs_counters {
struct hl_cs_counters cs_counters;
struct hl_cs_counters ctx_cs_counters;
};
enum gaudi_dcores {
HL_GAUDI_WS_DCORE,
HL_GAUDI_WN_DCORE,
HL_GAUDI_EN_DCORE,
HL_GAUDI_ES_DCORE
};
struct hl_info_args {
__u64 return_pointer;
__u32 return_size;
__u32 op;
union {
__u32 dcore_id;
__u32 ctx_id;
__u32 period_ms;
};
@ -297,12 +327,13 @@ struct hl_info_args {
#define HL_CB_OP_CREATE 0
#define HL_CB_OP_DESTROY 1
#define HL_MAX_CB_SIZE (0x200000 - 32)
#define HL_CB_FLAGS_MAP 0x1
struct hl_cb_in {
__u64 cb_handle;
__u32 op;
__u32 cb_size;
__u32 ctx_id;
__u32 pad;
__u32 flags;
};
struct hl_cb_out {
__u64 cb_handle;

View file

@ -91,6 +91,7 @@ struct efa_ibv_create_ah_resp {
};
enum {
EFA_QUERY_DEVICE_CAPS_RDMA_READ = 1 << 0,
EFA_QUERY_DEVICE_CAPS_RNR_RETRY = 1 << 1,
};
struct efa_ibv_ex_query_device_resp {
__u32 comp_mask;

View file

@ -22,6 +22,8 @@
struct hns_roce_ib_create_cq {
__aligned_u64 buf_addr;
__aligned_u64 db_addr;
__u32 cqe_size;
__u32 reserved;
};
struct hns_roce_ib_create_cq_resp {
__aligned_u64 cqn;
@ -50,7 +52,7 @@ struct hns_roce_ib_create_qp_resp {
};
struct hns_roce_ib_alloc_ucontext_resp {
__u32 qp_tab_size;
__u32 reserved;
__u32 cqe_size;
};
struct hns_roce_ib_alloc_pd_resp {
__u32 pdn;

View file

@ -51,6 +51,8 @@ enum uverbs_methods_device {
UVERBS_METHOD_QUERY_PORT,
UVERBS_METHOD_GET_CONTEXT,
UVERBS_METHOD_QUERY_CONTEXT,
UVERBS_METHOD_QUERY_GID_TABLE,
UVERBS_METHOD_QUERY_GID_ENTRY,
};
enum uverbs_attrs_invoke_write_cmd_attr_ids {
UVERBS_ATTR_CORE_IN,
@ -284,4 +286,16 @@ enum uverbs_method_async_event {
enum uverbs_attrs_async_event_create {
UVERBS_ATTR_ASYNC_EVENT_ALLOC_FD_HANDLE,
};
enum uverbs_attrs_query_gid_table_cmd_attr_ids {
UVERBS_ATTR_QUERY_GID_TABLE_ENTRY_SIZE,
UVERBS_ATTR_QUERY_GID_TABLE_FLAGS,
UVERBS_ATTR_QUERY_GID_TABLE_RESP_ENTRIES,
UVERBS_ATTR_QUERY_GID_TABLE_RESP_NUM_ENTRIES,
};
enum uverbs_attrs_query_gid_entry_cmd_attr_ids {
UVERBS_ATTR_QUERY_GID_ENTRY_PORT,
UVERBS_ATTR_QUERY_GID_ENTRY_GID_INDEX,
UVERBS_ATTR_QUERY_GID_ENTRY_FLAGS,
UVERBS_ATTR_QUERY_GID_ENTRY_RESP_ENTRY,
};
#endif

View file

@ -153,6 +153,7 @@ enum ib_uverbs_read_counters_flags {
enum ib_uverbs_advise_mr_advice {
IB_UVERBS_ADVISE_MR_ADVICE_PREFETCH,
IB_UVERBS_ADVISE_MR_ADVICE_PREFETCH_WRITE,
IB_UVERBS_ADVISE_MR_ADVICE_PREFETCH_NO_FAULT,
};
enum ib_uverbs_advise_mr_flag {
IB_UVERBS_ADVISE_MR_FLAG_FLUSH = 1 << 0,
@ -190,4 +191,16 @@ enum rdma_driver_id {
RDMA_DRIVER_EFA,
RDMA_DRIVER_SIW,
};
enum ib_uverbs_gid_type {
IB_UVERBS_GID_TYPE_IB,
IB_UVERBS_GID_TYPE_ROCE_V1,
IB_UVERBS_GID_TYPE_ROCE_V2,
};
struct ib_uverbs_gid_entry {
__aligned_u64 gid[2];
__u32 gid_index;
__u32 port_num;
__u32 gid_type;
__u32 netdev_ifindex;
};
#endif

View file

@ -361,6 +361,16 @@ struct ib_uverbs_poll_cq {
__u32 cq_handle;
__u32 ne;
};
enum ib_uverbs_wc_opcode {
IB_UVERBS_WC_SEND = 0,
IB_UVERBS_WC_RDMA_WRITE = 1,
IB_UVERBS_WC_RDMA_READ = 2,
IB_UVERBS_WC_COMP_SWAP = 3,
IB_UVERBS_WC_FETCH_ADD = 4,
IB_UVERBS_WC_BIND_MW = 5,
IB_UVERBS_WC_LOCAL_INV = 6,
IB_UVERBS_WC_TSO = 7,
};
struct ib_uverbs_wc {
__aligned_u64 wr_id;
__u32 status;

View file

@ -22,6 +22,10 @@
#include <linux/socket.h>
#include <linux/in.h>
#include <linux/in6.h>
enum {
RXE_NETWORK_TYPE_IPV4 = 1,
RXE_NETWORK_TYPE_IPV6 = 2,
};
union rxe_gid {
__u8 raw[16];
struct {

View file

@ -19,7 +19,7 @@
#ifndef __INCLUDE_UAPI_SOUND_SOF_ABI_H__
#define __INCLUDE_UAPI_SOUND_SOF_ABI_H__
#define SOF_ABI_MAJOR 3
#define SOF_ABI_MINOR 16
#define SOF_ABI_MINOR 17
#define SOF_ABI_PATCH 0
#define SOF_ABI_MAJOR_SHIFT 24
#define SOF_ABI_MAJOR_MASK 0xff

View file

@ -22,6 +22,9 @@
#define SOF_TPLG_KCTL_ENUM_ID 257
#define SOF_TPLG_KCTL_BYTES_ID 258
#define SOF_TPLG_KCTL_SWITCH_ID 259
#define SOF_TPLG_KCTL_BYTES_VOLATILE_RO 260
#define SOF_TPLG_KCTL_BYTES_VOLATILE_RW 261
#define SOF_TPLG_KCTL_BYTES_WO_ID 262
#define SOF_TKN_BUF_SIZE 100
#define SOF_TKN_BUF_CAPS 101
#define SOF_TKN_DAI_TYPE 154
@ -45,6 +48,8 @@
#define SOF_TKN_COMP_PERIOD_SINK_COUNT 400
#define SOF_TKN_COMP_PERIOD_SOURCE_COUNT 401
#define SOF_TKN_COMP_FORMAT 402
#define SOF_TKN_COMP_CORE_ID 404
#define SOF_TKN_COMP_UUID 405
#define SOF_TKN_INTEL_SSP_CLKS_CONTROL 500
#define SOF_TKN_INTEL_SSP_MCLK_ID 501
#define SOF_TKN_INTEL_SSP_SAMPLE_BITS 502