Update to v6.4 kernel headers.

Kernel headers coming from:

Git: https://android.googlesource.com/kernel/common/
Branch: android-mainline
Tag: android-mainline-6.4

Test: Bionic unit tests pass.
Change-Id: I991f8eaa2b272a464166addb13e6bdc63734444d
This commit is contained in:
Christopher Ferris 2023-07-10 10:59:05 -07:00
parent 143f3cea32
commit 37c3f3c67e
69 changed files with 1081 additions and 196 deletions

View file

@ -909,6 +909,9 @@
#if defined(__NR_riscv_flush_icache)
#define SYS_riscv_flush_icache __NR_riscv_flush_icache
#endif
#if defined(__NR_riscv_hwprobe)
#define SYS_riscv_hwprobe __NR_riscv_hwprobe
#endif
#if defined(__NR_rmdir)
#define SYS_rmdir __NR_rmdir
#endif

View file

@ -126,6 +126,10 @@ struct kvm_arm_copy_mte_tags {
__u64 flags;
__u64 reserved[2];
};
struct kvm_arm_counter_offset {
__u64 counter_offset;
__u64 reserved;
};
#define KVM_ARM_TAGS_TO_GUEST 0
#define KVM_ARM_TAGS_FROM_GUEST 1
#define KVM_REG_ARM_COPROC_MASK 0x000000000FFF0000
@ -204,6 +208,8 @@ enum {
KVM_REG_ARM_VENDOR_HYP_BIT_FUNC_FEAT = 0,
KVM_REG_ARM_VENDOR_HYP_BIT_PTP = 1,
};
#define KVM_ARM_VM_SMCCC_CTRL 0
#define KVM_ARM_VM_SMCCC_FILTER 0
#define KVM_DEV_ARM_VGIC_GRP_ADDR 0
#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1
#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2
@ -237,6 +243,8 @@ enum {
#define KVM_ARM_VCPU_TIMER_CTRL 1
#define KVM_ARM_VCPU_TIMER_IRQ_VTIMER 0
#define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1
#define KVM_ARM_VCPU_TIMER_IRQ_HVTIMER 2
#define KVM_ARM_VCPU_TIMER_IRQ_HPTIMER 3
#define KVM_ARM_VCPU_PVTIME_CTRL 2
#define KVM_ARM_VCPU_PVTIME_IPA 0
#define KVM_ARM_IRQ_VCPU2_SHIFT 28
@ -266,5 +274,18 @@ enum {
#define KVM_PSCI_RET_DENIED PSCI_RET_DENIED
#define KVM_SYSTEM_EVENT_RESET_FLAG_PSCI_RESET2 (1ULL << 0)
#define KVM_EXIT_FAIL_ENTRY_CPU_UNSUPPORTED (1ULL << 0)
enum kvm_smccc_filter_action {
KVM_SMCCC_FILTER_HANDLE = 0,
KVM_SMCCC_FILTER_DENY,
KVM_SMCCC_FILTER_FWD_TO_USER,
};
struct kvm_smccc_filter {
__u32 base;
__u32 nr_functions;
__u8 action;
__u8 pad[15];
};
#define KVM_HYPERCALL_EXIT_SMC (1U << 0)
#define KVM_HYPERCALL_EXIT_16BIT (1U << 1)
#endif
#endif

View file

@ -78,7 +78,6 @@
#define __O_TMPFILE 020000000
#endif
#define O_TMPFILE (__O_TMPFILE | O_DIRECTORY)
#define O_TMPFILE_MASK (__O_TMPFILE | O_DIRECTORY | O_CREAT)
#ifndef O_NDELAY
#define O_NDELAY O_NONBLOCK
#endif

View file

@ -16,44 +16,26 @@
***
****************************************************************************
****************************************************************************/
#ifndef _DLM_NETLINK_H
#define _DLM_NETLINK_H
#ifndef _UAPI_ASM_HWPROBE_H
#define _UAPI_ASM_HWPROBE_H
#include <linux/types.h>
#include <linux/dlmconstants.h>
enum {
DLM_STATUS_WAITING = 1,
DLM_STATUS_GRANTED = 2,
DLM_STATUS_CONVERT = 3,
struct riscv_hwprobe {
__s64 key;
__u64 value;
};
#define DLM_LOCK_DATA_VERSION 1
struct dlm_lock_data {
__u16 version;
__u32 lockspace_id;
int nodeid;
int ownpid;
__u32 id;
__u32 remid;
__u64 xid;
__s8 status;
__s8 grmode;
__s8 rqmode;
unsigned long timestamp;
int resource_namelen;
char resource_name[DLM_RESNAME_MAXLEN];
};
enum {
DLM_CMD_UNSPEC = 0,
DLM_CMD_HELLO,
DLM_CMD_TIMEOUT,
__DLM_CMD_MAX,
};
#define DLM_CMD_MAX (__DLM_CMD_MAX - 1)
enum {
DLM_TYPE_UNSPEC = 0,
DLM_TYPE_LOCK,
__DLM_TYPE_MAX,
};
#define DLM_TYPE_MAX (__DLM_TYPE_MAX - 1)
#define DLM_GENL_VERSION 0x1
#define DLM_GENL_NAME "DLM"
#define RISCV_HWPROBE_KEY_MVENDORID 0
#define RISCV_HWPROBE_KEY_MARCHID 1
#define RISCV_HWPROBE_KEY_MIMPID 2
#define RISCV_HWPROBE_KEY_BASE_BEHAVIOR 3
#define RISCV_HWPROBE_BASE_BEHAVIOR_IMA (1 << 0)
#define RISCV_HWPROBE_KEY_IMA_EXT_0 4
#define RISCV_HWPROBE_IMA_FD (1 << 0)
#define RISCV_HWPROBE_IMA_C (1 << 1)
#define RISCV_HWPROBE_KEY_CPUPERF_0 5
#define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0)
#define RISCV_HWPROBE_MISALIGNED_EMULATED (1 << 0)
#define RISCV_HWPROBE_MISALIGNED_SLOW (2 << 0)
#define RISCV_HWPROBE_MISALIGNED_FAST (3 << 0)
#define RISCV_HWPROBE_MISALIGNED_UNSUPPORTED (4 << 0)
#define RISCV_HWPROBE_MISALIGNED_MASK (7 << 0)
#endif

View file

@ -20,6 +20,7 @@
#define __LINUX_KVM_RISCV_H
#ifndef __ASSEMBLY__
#include <linux/types.h>
#include <asm/bitsperlong.h>
#include <asm/ptrace.h>
#define __KVM_HAVE_READONLY_MEM
#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
@ -43,6 +44,7 @@ struct kvm_riscv_config {
unsigned long mvendorid;
unsigned long marchid;
unsigned long mimpid;
unsigned long zicboz_block_size;
};
struct kvm_riscv_core {
struct user_regs_struct regs;
@ -62,6 +64,15 @@ struct kvm_riscv_csr {
unsigned long satp;
unsigned long scounteren;
};
struct kvm_riscv_aia_csr {
unsigned long siselect;
unsigned long iprio1;
unsigned long iprio2;
unsigned long sieh;
unsigned long siph;
unsigned long iprio1h;
unsigned long iprio2h;
};
struct kvm_riscv_timer {
__u64 frequency;
__u64 time;
@ -81,19 +92,39 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_SVINVAL,
KVM_RISCV_ISA_EXT_ZIHINTPAUSE,
KVM_RISCV_ISA_EXT_ZICBOM,
KVM_RISCV_ISA_EXT_ZICBOZ,
KVM_RISCV_ISA_EXT_ZBB,
KVM_RISCV_ISA_EXT_SSAIA,
KVM_RISCV_ISA_EXT_MAX,
};
enum KVM_RISCV_SBI_EXT_ID {
KVM_RISCV_SBI_EXT_V01 = 0,
KVM_RISCV_SBI_EXT_TIME,
KVM_RISCV_SBI_EXT_IPI,
KVM_RISCV_SBI_EXT_RFENCE,
KVM_RISCV_SBI_EXT_SRST,
KVM_RISCV_SBI_EXT_HSM,
KVM_RISCV_SBI_EXT_PMU,
KVM_RISCV_SBI_EXT_EXPERIMENTAL,
KVM_RISCV_SBI_EXT_VENDOR,
KVM_RISCV_SBI_EXT_MAX,
};
#define KVM_RISCV_TIMER_STATE_OFF 0
#define KVM_RISCV_TIMER_STATE_ON 1
#define KVM_REG_SIZE(id) (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
#define KVM_REG_RISCV_TYPE_MASK 0x00000000FF000000
#define KVM_REG_RISCV_TYPE_SHIFT 24
#define KVM_REG_RISCV_SUBTYPE_MASK 0x0000000000FF0000
#define KVM_REG_RISCV_SUBTYPE_SHIFT 16
#define KVM_REG_RISCV_CONFIG (0x01 << KVM_REG_RISCV_TYPE_SHIFT)
#define KVM_REG_RISCV_CONFIG_REG(name) (offsetof(struct kvm_riscv_config, name) / sizeof(unsigned long))
#define KVM_REG_RISCV_CORE (0x02 << KVM_REG_RISCV_TYPE_SHIFT)
#define KVM_REG_RISCV_CORE_REG(name) (offsetof(struct kvm_riscv_core, name) / sizeof(unsigned long))
#define KVM_REG_RISCV_CSR (0x03 << KVM_REG_RISCV_TYPE_SHIFT)
#define KVM_REG_RISCV_CSR_GENERAL (0x0 << KVM_REG_RISCV_SUBTYPE_SHIFT)
#define KVM_REG_RISCV_CSR_AIA (0x1 << KVM_REG_RISCV_SUBTYPE_SHIFT)
#define KVM_REG_RISCV_CSR_REG(name) (offsetof(struct kvm_riscv_csr, name) / sizeof(unsigned long))
#define KVM_REG_RISCV_CSR_AIA_REG(name) (offsetof(struct kvm_riscv_aia_csr, name) / sizeof(unsigned long))
#define KVM_REG_RISCV_TIMER (0x04 << KVM_REG_RISCV_TYPE_SHIFT)
#define KVM_REG_RISCV_TIMER_REG(name) (offsetof(struct kvm_riscv_timer, name) / sizeof(__u64))
#define KVM_REG_RISCV_FP_F (0x05 << KVM_REG_RISCV_TYPE_SHIFT)
@ -101,5 +132,12 @@ enum KVM_RISCV_ISA_EXT_ID {
#define KVM_REG_RISCV_FP_D (0x06 << KVM_REG_RISCV_TYPE_SHIFT)
#define KVM_REG_RISCV_FP_D_REG(name) (offsetof(struct __riscv_d_ext_state, name) / sizeof(__u64))
#define KVM_REG_RISCV_ISA_EXT (0x07 << KVM_REG_RISCV_TYPE_SHIFT)
#define KVM_REG_RISCV_SBI_EXT (0x08 << KVM_REG_RISCV_TYPE_SHIFT)
#define KVM_REG_RISCV_SBI_SINGLE (0x0 << KVM_REG_RISCV_SUBTYPE_SHIFT)
#define KVM_REG_RISCV_SBI_MULTI_EN (0x1 << KVM_REG_RISCV_SUBTYPE_SHIFT)
#define KVM_REG_RISCV_SBI_MULTI_DIS (0x2 << KVM_REG_RISCV_SUBTYPE_SHIFT)
#define KVM_REG_RISCV_SBI_MULTI_REG(__ext_id) ((__ext_id) / __BITS_PER_LONG)
#define KVM_REG_RISCV_SBI_MULTI_MASK(__ext_id) (1UL << ((__ext_id) % __BITS_PER_LONG))
#define KVM_REG_RISCV_SBI_MULTI_REG_LAST KVM_REG_RISCV_SBI_MULTI_REG(KVM_RISCV_SBI_EXT_MAX - 1)
#endif
#endif

View file

@ -27,3 +27,7 @@
#define __NR_riscv_flush_icache (__NR_arch_specific_syscall + 15)
#endif
__SYSCALL(__NR_riscv_flush_icache, sys_riscv_flush_icache)
#ifndef __NR_riscv_hwprobe
#define __NR_riscv_hwprobe (__NR_arch_specific_syscall + 14)
#endif
__SYSCALL(__NR_riscv_hwprobe, sys_riscv_hwprobe)

View file

@ -420,4 +420,5 @@ struct kvm_pmu_event_filter {
#define KVM_PMU_MASKED_ENTRY_UMASK_MASK_SHIFT (56)
#define KVM_VCPU_TSC_CTRL 0
#define KVM_VCPU_TSC_OFFSET 0
#define KVM_EXIT_HYPERCALL_LONG_MODE BIT(0)
#endif

View file

@ -29,7 +29,13 @@
#define ARCH_REQ_XCOMP_PERM 0x1023
#define ARCH_GET_XCOMP_GUEST_PERM 0x1024
#define ARCH_REQ_XCOMP_GUEST_PERM 0x1025
#define ARCH_XCOMP_TILECFG 17
#define ARCH_XCOMP_TILEDATA 18
#define ARCH_MAP_VDSO_X32 0x2001
#define ARCH_MAP_VDSO_32 0x2002
#define ARCH_MAP_VDSO_64 0x2003
#define ARCH_GET_UNTAG_MASK 0x4001
#define ARCH_ENABLE_TAGGED_ADDR 0x4002
#define ARCH_GET_MAX_TAG_BITS 0x4003
#define ARCH_FORCE_TAGGED_SVA 0x4004
#endif

View file

@ -83,6 +83,10 @@
#define X86_CR3_PCD _BITUL(X86_CR3_PCD_BIT)
#define X86_CR3_PCID_BITS 12
#define X86_CR3_PCID_MASK (_AC((1UL << X86_CR3_PCID_BITS) - 1, UL))
#define X86_CR3_LAM_U57_BIT 61
#define X86_CR3_LAM_U57 _BITULL(X86_CR3_LAM_U57_BIT)
#define X86_CR3_LAM_U48_BIT 62
#define X86_CR3_LAM_U48 _BITULL(X86_CR3_LAM_U48_BIT)
#define X86_CR3_PCID_NOFLUSH_BIT 63
#define X86_CR3_PCID_NOFLUSH _BITULL(X86_CR3_PCID_NOFLUSH_BIT)
#define X86_CR4_VME_BIT 0
@ -129,6 +133,8 @@
#define X86_CR4_PKE _BITUL(X86_CR4_PKE_BIT)
#define X86_CR4_CET_BIT 23
#define X86_CR4_CET _BITUL(X86_CR4_CET_BIT)
#define X86_CR4_LAM_SUP_BIT 28
#define X86_CR4_LAM_SUP _BITUL(X86_CR4_LAM_SUP_BIT)
#define X86_CR8_TPR _AC(0x0000000f, UL)
#define CX86_PCR0 0x20
#define CX86_GCR 0xb8

View file

@ -619,7 +619,8 @@ enum hl_server_type {
HL_SERVER_GAUDI_HLS1H = 2,
HL_SERVER_GAUDI_TYPE1 = 3,
HL_SERVER_GAUDI_TYPE2 = 4,
HL_SERVER_GAUDI2_HLS2 = 5
HL_SERVER_GAUDI2_HLS2 = 5,
HL_SERVER_GAUDI2_TYPE1 = 7
};
#define HL_NOTIFIER_EVENT_TPC_ASSERT (1ULL << 0)
#define HL_NOTIFIER_EVENT_UNDEFINED_OPCODE (1ULL << 1)
@ -630,6 +631,8 @@ enum hl_server_type {
#define HL_NOTIFIER_EVENT_GENERAL_HW_ERR (1ULL << 6)
#define HL_NOTIFIER_EVENT_RAZWI (1ULL << 7)
#define HL_NOTIFIER_EVENT_PAGE_FAULT (1ULL << 8)
#define HL_NOTIFIER_EVENT_CRITICL_HW_ERR (1ULL << 9)
#define HL_NOTIFIER_EVENT_CRITICL_FW_ERR (1ULL << 10)
#define HL_INFO_HW_IP_INFO 0
#define HL_INFO_HW_EVENTS 1
#define HL_INFO_DRAM_USAGE 2
@ -663,6 +666,8 @@ enum hl_server_type {
#define HL_INFO_PAGE_FAULT_EVENT 33
#define HL_INFO_USER_MAPPINGS 34
#define HL_INFO_FW_GENERIC_REQ 35
#define HL_INFO_HW_ERR_EVENT 36
#define HL_INFO_FW_ERR_EVENT 37
#define HL_INFO_VERSION_MAX_LEN 128
#define HL_INFO_CARD_NAME_MAX_LEN 16
#define HL_ENGINES_DATA_MAX_SIZE SZ_1M
@ -692,15 +697,20 @@ struct hl_info_hw_ip_info {
__u64 dram_page_size;
__u32 edma_enabled_mask;
__u16 number_of_user_interrupts;
__u16 pad2;
__u64 reserved4;
__u8 reserved1;
__u8 reserved2;
__u64 reserved3;
__u64 device_mem_alloc_default_page_size;
__u64 reserved4;
__u64 reserved5;
__u64 reserved6;
__u32 reserved7;
__u8 reserved8;
__u32 reserved6;
__u8 reserved7;
__u8 revision_id;
__u8 pad[2];
__u16 tpc_interrupt_id;
__u32 rotator_enabled_mask;
__u32 reserved9;
__u64 engine_core_interrupt_reg_addr;
__u64 reserved_dram_size;
};
struct hl_info_dram_usage {
__u64 dram_free_mem;
@ -821,6 +831,21 @@ struct hl_info_undefined_opcode_event {
__u32 engine_id;
__u32 stream_id;
};
struct hl_info_hw_err_event {
__s64 timestamp;
__u16 event_id;
__u16 pad[3];
};
enum hl_info_fw_err_type {
HL_INFO_FW_HEARTBEAT_ERR,
HL_INFO_FW_REPORTED_ERR,
};
struct hl_info_fw_err_event {
__s64 timestamp;
__u16 err_type;
__u16 event_id;
__u32 pad;
};
struct hl_info_dev_memalloc_page_sizes {
__u64 page_order_bitmask;
};
@ -938,10 +963,16 @@ struct hl_cs_chunk {
#define HL_CS_FLAGS_UNRESERVE_SIGNALS_ONLY 0x2000
#define HL_CS_FLAGS_ENGINE_CORE_COMMAND 0x4000
#define HL_CS_FLAGS_FLUSH_PCI_HBW_WRITES 0x8000
#define HL_CS_FLAGS_ENGINES_COMMAND 0x10000
#define HL_CS_STATUS_SUCCESS 0
#define HL_MAX_JOBS_PER_CS 512
#define HL_ENGINE_CORE_HALT (1 << 0)
#define HL_ENGINE_CORE_RUN (1 << 1)
enum hl_engine_command {
HL_ENGINE_CORE_HALT = 1,
HL_ENGINE_CORE_RUN = 2,
HL_ENGINE_STALL = 3,
HL_ENGINE_RESUME = 4,
HL_ENGINE_COMMAND_MAX
};
struct hl_cs_in {
union {
struct {
@ -953,6 +984,11 @@ struct hl_cs_in {
__u32 num_engine_cores;
__u32 core_command;
};
struct {
__u64 engines;
__u32 num_engines;
__u32 engine_command;
};
};
union {
__u64 seq;

View file

@ -797,7 +797,7 @@ struct i915_context_param_engines {
#define I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE 0
#define I915_CONTEXT_ENGINES_EXT_BOND 1
#define I915_CONTEXT_ENGINES_EXT_PARALLEL_SUBMIT 2
struct i915_engine_class_instance engines[0];
struct i915_engine_class_instance engines[];
} __attribute__((packed));
#define I915_DEFINE_CONTEXT_PARAM_ENGINES(name__,N__) struct { __u64 extensions; struct i915_engine_class_instance engines[N__]; \
} __attribute__((packed)) name__
@ -849,6 +849,8 @@ enum drm_i915_oa_format {
I915_OA_FORMAT_A32u40_A4u32_B8_C8,
I915_OAR_FORMAT_A32u40_A4u32_B8_C8,
I915_OA_FORMAT_A24u40_A14u32_B8_C8,
I915_OAM_FORMAT_MPEC8u64_B8_C8,
I915_OAM_FORMAT_MPEC8u32_B8_C8,
I915_OA_FORMAT_MAX
};
enum drm_i915_perf_property_id {
@ -860,6 +862,8 @@ enum drm_i915_perf_property_id {
DRM_I915_PERF_PROP_HOLD_PREEMPTION,
DRM_I915_PERF_PROP_GLOBAL_SSEU,
DRM_I915_PERF_PROP_POLL_OA_PERIOD,
DRM_I915_PERF_PROP_OA_ENGINE_CLASS,
DRM_I915_PERF_PROP_OA_ENGINE_INSTANCE,
DRM_I915_PERF_PROP_MAX
};
struct drm_i915_perf_open_param {

View file

@ -85,7 +85,8 @@ struct drm_msm_gem_info {
#define MSM_PREP_READ 0x01
#define MSM_PREP_WRITE 0x02
#define MSM_PREP_NOSYNC 0x04
#define MSM_PREP_FLAGS (MSM_PREP_READ | MSM_PREP_WRITE | MSM_PREP_NOSYNC)
#define MSM_PREP_BOOST 0x08
#define MSM_PREP_FLAGS (MSM_PREP_READ | MSM_PREP_WRITE | MSM_PREP_NOSYNC | MSM_PREP_BOOST | 0)
struct drm_msm_gem_cpu_prep {
__u32 handle;
__u32 op;
@ -96,7 +97,11 @@ struct drm_msm_gem_cpu_fini {
};
struct drm_msm_gem_submit_reloc {
__u32 submit_offset;
#ifdef __cplusplus
__u32 _or;
#else
__u32 or;
#endif
__s32 shift;
__u32 reloc_idx;
__u64 reloc_offset;
@ -154,9 +159,11 @@ struct drm_msm_gem_submit {
__u32 syncobj_stride;
__u32 pad;
};
#define MSM_WAIT_FENCE_BOOST 0x00000001
#define MSM_WAIT_FENCE_FLAGS (MSM_WAIT_FENCE_BOOST | 0)
struct drm_msm_wait_fence {
__u32 fence;
__u32 pad;
__u32 flags;
struct drm_msm_timespec timeout;
__u32 queueid;
};

View file

@ -0,0 +1,204 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef QAIC_ACCEL_H_
#define QAIC_ACCEL_H_
#include "drm.h"
#ifdef __cplusplus
extern "C" {
#endif
#define QAIC_MANAGE_MAX_MSG_LENGTH SZ_4K
#define QAIC_SEM_INSYNCFENCE 2
#define QAIC_SEM_OUTSYNCFENCE 1
#define QAIC_SEM_NOP 0
#define QAIC_SEM_INIT 1
#define QAIC_SEM_INC 2
#define QAIC_SEM_DEC 3
#define QAIC_SEM_WAIT_EQUAL 4
#define QAIC_SEM_WAIT_GT_EQ 5
#define QAIC_SEM_WAIT_GT_0 6
#define QAIC_TRANS_UNDEFINED 0
#define QAIC_TRANS_PASSTHROUGH_FROM_USR 1
#define QAIC_TRANS_PASSTHROUGH_TO_USR 2
#define QAIC_TRANS_PASSTHROUGH_FROM_DEV 3
#define QAIC_TRANS_PASSTHROUGH_TO_DEV 4
#define QAIC_TRANS_DMA_XFER_FROM_USR 5
#define QAIC_TRANS_DMA_XFER_TO_DEV 6
#define QAIC_TRANS_ACTIVATE_FROM_USR 7
#define QAIC_TRANS_ACTIVATE_FROM_DEV 8
#define QAIC_TRANS_ACTIVATE_TO_DEV 9
#define QAIC_TRANS_DEACTIVATE_FROM_USR 10
#define QAIC_TRANS_DEACTIVATE_FROM_DEV 11
#define QAIC_TRANS_STATUS_FROM_USR 12
#define QAIC_TRANS_STATUS_TO_USR 13
#define QAIC_TRANS_STATUS_FROM_DEV 14
#define QAIC_TRANS_STATUS_TO_DEV 15
#define QAIC_TRANS_TERMINATE_FROM_DEV 16
#define QAIC_TRANS_TERMINATE_TO_DEV 17
#define QAIC_TRANS_DMA_XFER_CONT 18
#define QAIC_TRANS_VALIDATE_PARTITION_FROM_DEV 19
#define QAIC_TRANS_VALIDATE_PARTITION_TO_DEV 20
struct qaic_manage_trans_hdr {
__u32 type;
__u32 len;
};
struct qaic_manage_trans_passthrough {
struct qaic_manage_trans_hdr hdr;
__u8 data[];
};
struct qaic_manage_trans_dma_xfer {
struct qaic_manage_trans_hdr hdr;
__u32 tag;
__u32 pad;
__u64 addr;
__u64 size;
};
struct qaic_manage_trans_activate_to_dev {
struct qaic_manage_trans_hdr hdr;
__u32 queue_size;
__u32 eventfd;
__u32 options;
__u32 pad;
};
struct qaic_manage_trans_activate_from_dev {
struct qaic_manage_trans_hdr hdr;
__u32 status;
__u32 dbc_id;
__u64 options;
};
struct qaic_manage_trans_deactivate {
struct qaic_manage_trans_hdr hdr;
__u32 dbc_id;
__u32 pad;
};
struct qaic_manage_trans_status_to_dev {
struct qaic_manage_trans_hdr hdr;
};
struct qaic_manage_trans_status_from_dev {
struct qaic_manage_trans_hdr hdr;
__u16 major;
__u16 minor;
__u32 status;
__u64 status_flags;
};
struct qaic_manage_msg {
__u32 len;
__u32 count;
__u64 data;
};
struct qaic_create_bo {
__u64 size;
__u32 handle;
__u32 pad;
};
struct qaic_mmap_bo {
__u32 handle;
__u32 pad;
__u64 offset;
};
struct qaic_sem {
__u16 val;
__u8 index;
__u8 presync;
__u8 cmd;
__u8 flags;
__u16 pad;
};
struct qaic_attach_slice_entry {
__u64 size;
struct qaic_sem sem0;
struct qaic_sem sem1;
struct qaic_sem sem2;
struct qaic_sem sem3;
__u64 dev_addr;
__u64 db_addr;
__u32 db_data;
__u32 db_len;
__u64 offset;
};
struct qaic_attach_slice_hdr {
__u32 count;
__u32 dbc_id;
__u32 handle;
__u32 dir;
__u64 size;
};
struct qaic_attach_slice {
struct qaic_attach_slice_hdr hdr;
__u64 data;
};
struct qaic_execute_entry {
__u32 handle;
__u32 dir;
};
struct qaic_partial_execute_entry {
__u32 handle;
__u32 dir;
__u64 resize;
};
struct qaic_execute_hdr {
__u32 count;
__u32 dbc_id;
};
struct qaic_execute {
struct qaic_execute_hdr hdr;
__u64 data;
};
struct qaic_wait {
__u32 handle;
__u32 timeout;
__u32 dbc_id;
__u32 pad;
};
struct qaic_perf_stats_hdr {
__u16 count;
__u16 pad;
__u32 dbc_id;
};
struct qaic_perf_stats {
struct qaic_perf_stats_hdr hdr;
__u64 data;
};
struct qaic_perf_stats_entry {
__u32 handle;
__u32 queue_level_before;
__u32 num_queue_element;
__u32 submit_latency_us;
__u32 device_latency_us;
__u32 pad;
};
#define DRM_QAIC_MANAGE 0x00
#define DRM_QAIC_CREATE_BO 0x01
#define DRM_QAIC_MMAP_BO 0x02
#define DRM_QAIC_ATTACH_SLICE_BO 0x03
#define DRM_QAIC_EXECUTE_BO 0x04
#define DRM_QAIC_PARTIAL_EXECUTE_BO 0x05
#define DRM_QAIC_WAIT_BO 0x06
#define DRM_QAIC_PERF_STATS_BO 0x07
#define DRM_IOCTL_QAIC_MANAGE DRM_IOWR(DRM_COMMAND_BASE + DRM_QAIC_MANAGE, struct qaic_manage_msg)
#define DRM_IOCTL_QAIC_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_QAIC_CREATE_BO, struct qaic_create_bo)
#define DRM_IOCTL_QAIC_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_QAIC_MMAP_BO, struct qaic_mmap_bo)
#define DRM_IOCTL_QAIC_ATTACH_SLICE_BO DRM_IOW(DRM_COMMAND_BASE + DRM_QAIC_ATTACH_SLICE_BO, struct qaic_attach_slice)
#define DRM_IOCTL_QAIC_EXECUTE_BO DRM_IOW(DRM_COMMAND_BASE + DRM_QAIC_EXECUTE_BO, struct qaic_execute)
#define DRM_IOCTL_QAIC_PARTIAL_EXECUTE_BO DRM_IOW(DRM_COMMAND_BASE + DRM_QAIC_PARTIAL_EXECUTE_BO, struct qaic_execute)
#define DRM_IOCTL_QAIC_WAIT_BO DRM_IOW(DRM_COMMAND_BASE + DRM_QAIC_WAIT_BO, struct qaic_wait)
#define DRM_IOCTL_QAIC_PERF_STATS_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_QAIC_PERF_STATS_BO, struct qaic_perf_stats)
#ifdef __cplusplus
}
#endif
#endif

View file

@ -204,6 +204,7 @@ enum bpf_prog_type {
BPF_PROG_TYPE_LSM,
BPF_PROG_TYPE_SK_LOOKUP,
BPF_PROG_TYPE_SYSCALL,
BPF_PROG_TYPE_NETFILTER,
};
enum bpf_attach_type {
BPF_CGROUP_INET_INGRESS,
@ -250,6 +251,8 @@ enum bpf_attach_type {
BPF_PERF_EVENT,
BPF_TRACE_KPROBE_MULTI,
BPF_LSM_CGROUP,
BPF_STRUCT_OPS,
BPF_NETFILTER,
__MAX_BPF_ATTACH_TYPE
};
#define MAX_BPF_ATTACH_TYPE __MAX_BPF_ATTACH_TYPE
@ -264,6 +267,7 @@ enum bpf_link_type {
BPF_LINK_TYPE_PERF_EVENT = 7,
BPF_LINK_TYPE_KPROBE_MULTI = 8,
BPF_LINK_TYPE_STRUCT_OPS = 9,
BPF_LINK_TYPE_NETFILTER = 10,
MAX_BPF_LINK_TYPE,
};
#define BPF_F_ALLOW_OVERRIDE (1U << 0)
@ -305,6 +309,7 @@ enum {
BPF_F_MMAPABLE = (1U << 10),
BPF_F_PRESERVE_ELEMS = (1U << 11),
BPF_F_INNER_MAP = (1U << 12),
BPF_F_LINK = (1U << 13),
};
#define BPF_F_QUERY_EFFECTIVE (1U << 0)
#define BPF_F_TEST_RUN_ON_CPU (1U << 0)
@ -392,6 +397,7 @@ union bpf_attr {
__aligned_u64 fd_array;
__aligned_u64 core_relos;
__u32 core_relo_rec_size;
__u32 log_true_size;
};
struct {
__aligned_u64 pathname;
@ -457,6 +463,7 @@ union bpf_attr {
__u32 btf_size;
__u32 btf_log_size;
__u32 btf_log_level;
__u32 btf_log_true_size;
};
struct {
__u32 pid;
@ -470,7 +477,10 @@ union bpf_attr {
__u64 probe_addr;
} task_fd_query;
struct {
__u32 prog_fd;
union {
__u32 prog_fd;
__u32 map_fd;
};
union {
__u32 target_fd;
__u32 target_ifindex;
@ -497,13 +507,25 @@ union bpf_attr {
__u32 target_btf_id;
__u64 cookie;
} tracing;
struct {
__u32 pf;
__u32 hooknum;
__s32 priority;
__u32 flags;
} netfilter;
};
} link_create;
struct {
__u32 link_fd;
__u32 new_prog_fd;
union {
__u32 new_prog_fd;
__u32 new_map_fd;
};
__u32 flags;
__u32 old_prog_fd;
union {
__u32 old_prog_fd;
__u32 old_map_fd;
};
} link_update;
struct {
__u32 link_fd;
@ -954,6 +976,15 @@ struct bpf_link_info {
struct {
__u32 ifindex;
} xdp;
struct {
__u32 map_id;
} struct_ops;
struct {
__u32 pf;
__u32 hooknum;
__s32 priority;
__u32 flags;
} netfilter;
};
} __attribute__((aligned(8)));
struct bpf_sock_addr {
@ -1232,6 +1263,9 @@ struct bpf_rb_node {
__u64 : 64;
__u64 : 64;
} __attribute__((aligned(8)));
struct bpf_refcount {
__u32 : 32;
} __attribute__((aligned(4)));
struct bpf_sysctl {
__u32 write;
__u32 file_pos;
@ -1297,4 +1331,10 @@ struct bpf_core_relo {
__u32 access_str_off;
enum bpf_core_relo_kind kind;
};
enum {
BPF_F_TIMER_ABS = (1ULL << 0),
};
struct bpf_iter_num {
__u64 __opaque[1];
} __attribute__((aligned(8)));
#endif

View file

@ -107,6 +107,7 @@ struct btrfs_scrub_progress {
__u64 unverified_errors;
};
#define BTRFS_SCRUB_READONLY 1
#define BTRFS_SCRUB_SUPPORTED_FLAGS (BTRFS_SCRUB_READONLY)
struct btrfs_ioctl_scrub_args {
__u64 devid;
__u64 start;

View file

@ -30,7 +30,7 @@
#define _ULL(x) (_AC(x, ULL))
#define _BITUL(x) (_UL(1) << (x))
#define _BITULL(x) (_ULL(1) << (x))
#define __ALIGN_KERNEL(x,a) __ALIGN_KERNEL_MASK(x, (typeof(x)) (a) - 1)
#define __ALIGN_KERNEL(x,a) __ALIGN_KERNEL_MASK(x, (__typeof__(x)) (a) - 1)
#define __ALIGN_KERNEL_MASK(x,mask) (((x) + (mask)) & ~(mask))
#define __KERNEL_DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
#endif

View file

@ -21,19 +21,27 @@
#include <linux/types.h>
#define CXL_MEM_QUERY_COMMANDS _IOR(0xCE, 1, struct cxl_mem_query_commands)
#define CXL_MEM_SEND_COMMAND _IOWR(0xCE, 2, struct cxl_send_command)
#define CXL_CMDS ___C(INVALID, "Invalid Command"), ___C(IDENTIFY, "Identify Command"), ___C(RAW, "Raw device command"), ___C(GET_SUPPORTED_LOGS, "Get Supported Logs"), ___C(GET_FW_INFO, "Get FW Info"), ___C(GET_PARTITION_INFO, "Get Partition Information"), ___C(GET_LSA, "Get Label Storage Area"), ___C(GET_HEALTH_INFO, "Get Health Info"), ___C(GET_LOG, "Get Log"), ___C(SET_PARTITION_INFO, "Set Partition Information"), ___C(SET_LSA, "Set Label Storage Area"), ___C(GET_ALERT_CONFIG, "Get Alert Configuration"), ___C(SET_ALERT_CONFIG, "Set Alert Configuration"), ___C(GET_SHUTDOWN_STATE, "Get Shutdown State"), ___C(SET_SHUTDOWN_STATE, "Set Shutdown State"), ___C(GET_POISON, "Get Poison List"), ___C(INJECT_POISON, "Inject Poison"), ___C(CLEAR_POISON, "Clear Poison"), ___C(GET_SCAN_MEDIA_CAPS, "Get Scan Media Capabilities"), ___C(SCAN_MEDIA, "Scan Media"), ___C(GET_SCAN_MEDIA, "Get Scan Media Results"), ___C(MAX, "invalid / last command")
#define CXL_CMDS ___C(INVALID, "Invalid Command"), ___C(IDENTIFY, "Identify Command"), ___C(RAW, "Raw device command"), ___C(GET_SUPPORTED_LOGS, "Get Supported Logs"), ___C(GET_FW_INFO, "Get FW Info"), ___C(GET_PARTITION_INFO, "Get Partition Information"), ___C(GET_LSA, "Get Label Storage Area"), ___C(GET_HEALTH_INFO, "Get Health Info"), ___C(GET_LOG, "Get Log"), ___C(SET_PARTITION_INFO, "Set Partition Information"), ___C(SET_LSA, "Set Label Storage Area"), ___C(GET_ALERT_CONFIG, "Get Alert Configuration"), ___C(SET_ALERT_CONFIG, "Set Alert Configuration"), ___C(GET_SHUTDOWN_STATE, "Get Shutdown State"), ___C(SET_SHUTDOWN_STATE, "Set Shutdown State"), ___DEPRECATED(GET_POISON, "Get Poison List"), ___DEPRECATED(INJECT_POISON, "Inject Poison"), ___DEPRECATED(CLEAR_POISON, "Clear Poison"), ___C(GET_SCAN_MEDIA_CAPS, "Get Scan Media Capabilities"), ___DEPRECATED(SCAN_MEDIA, "Scan Media"), ___DEPRECATED(GET_SCAN_MEDIA, "Get Scan Media Results"), ___C(MAX, "invalid / last command")
#define ___C(a,b) CXL_MEM_COMMAND_ID_ ##a
#define ___DEPRECATED(a,b) CXL_MEM_DEPRECATED_ID_ ##a
enum {
CXL_CMDS
};
#undef ___C
#undef ___DEPRECATED
#define ___C(a,b) { b }
#define ___DEPRECATED(a,b) { "Deprecated " b }
static const struct {
const char * name;
} cxl_command_names[] __attribute__((__unused__)) = {
CXL_CMDS
};
#undef ___C
#undef ___DEPRECATED
#define ___C(a,b) (0)
#define ___DEPRECATED(a,b) (1)
#undef ___C
#undef ___DEPRECATED
struct cxl_command_info {
__u32 id;
__u32 flags;

View file

@ -106,9 +106,9 @@ enum {
#define DM_TARGET_MSG _IOWR(DM_IOCTL, DM_TARGET_MSG_CMD, struct dm_ioctl)
#define DM_DEV_SET_GEOMETRY _IOWR(DM_IOCTL, DM_DEV_SET_GEOMETRY_CMD, struct dm_ioctl)
#define DM_VERSION_MAJOR 4
#define DM_VERSION_MINOR 47
#define DM_VERSION_MINOR 48
#define DM_VERSION_PATCHLEVEL 0
#define DM_VERSION_EXTRA "-ioctl(2022-07-28)"
#define DM_VERSION_EXTRA "-ioctl(2023-03-01)"
#define DM_READONLY_FLAG (1 << 0)
#define DM_SUSPEND_FLAG (1 << 1)
#define DM_PERSISTENT_DEV_FLAG (1 << 3)

View file

@ -277,6 +277,8 @@ enum {
ETHTOOL_A_RINGS_CQE_SIZE,
ETHTOOL_A_RINGS_TX_PUSH,
ETHTOOL_A_RINGS_RX_PUSH,
ETHTOOL_A_RINGS_TX_PUSH_BUF_LEN,
ETHTOOL_A_RINGS_TX_PUSH_BUF_LEN_MAX,
__ETHTOOL_A_RINGS_CNT,
ETHTOOL_A_RINGS_MAX = (__ETHTOOL_A_RINGS_CNT - 1)
};
@ -576,7 +578,7 @@ enum {
ETHTOOL_A_STATS_GRP_HIST_BKT_HI,
ETHTOOL_A_STATS_GRP_HIST_VAL,
__ETHTOOL_A_STATS_GRP_CNT,
ETHTOOL_A_STATS_GRP_MAX = (__ETHTOOL_A_STATS_CNT - 1)
ETHTOOL_A_STATS_GRP_MAX = (__ETHTOOL_A_STATS_GRP_CNT - 1)
};
enum {
ETHTOOL_A_STATS_ETH_PHY_5_SYM_ERR,

View file

@ -0,0 +1,88 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _UAPI_LINUX_EXT4_H
#define _UAPI_LINUX_EXT4_H
#include <linux/fiemap.h>
#include <linux/fs.h>
#include <linux/ioctl.h>
#include <linux/types.h>
#define EXT4_IOC_GETVERSION _IOR('f', 3, long)
#define EXT4_IOC_SETVERSION _IOW('f', 4, long)
#define EXT4_IOC_GETVERSION_OLD FS_IOC_GETVERSION
#define EXT4_IOC_SETVERSION_OLD FS_IOC_SETVERSION
#define EXT4_IOC_GETRSVSZ _IOR('f', 5, long)
#define EXT4_IOC_SETRSVSZ _IOW('f', 6, long)
#define EXT4_IOC_GROUP_EXTEND _IOW('f', 7, unsigned long)
#define EXT4_IOC_GROUP_ADD _IOW('f', 8, struct ext4_new_group_input)
#define EXT4_IOC_MIGRATE _IO('f', 9)
#define EXT4_IOC_ALLOC_DA_BLKS _IO('f', 12)
#define EXT4_IOC_MOVE_EXT _IOWR('f', 15, struct move_extent)
#define EXT4_IOC_RESIZE_FS _IOW('f', 16, __u64)
#define EXT4_IOC_SWAP_BOOT _IO('f', 17)
#define EXT4_IOC_PRECACHE_EXTENTS _IO('f', 18)
#define EXT4_IOC_CLEAR_ES_CACHE _IO('f', 40)
#define EXT4_IOC_GETSTATE _IOW('f', 41, __u32)
#define EXT4_IOC_GET_ES_CACHE _IOWR('f', 42, struct fiemap)
#define EXT4_IOC_CHECKPOINT _IOW('f', 43, __u32)
#define EXT4_IOC_GETFSUUID _IOR('f', 44, struct fsuuid)
#define EXT4_IOC_SETFSUUID _IOW('f', 44, struct fsuuid)
#define EXT4_IOC_SHUTDOWN _IOR('X', 125, __u32)
#define EXT4_IOC32_GETVERSION _IOR('f', 3, int)
#define EXT4_IOC32_SETVERSION _IOW('f', 4, int)
#define EXT4_IOC32_GETRSVSZ _IOR('f', 5, int)
#define EXT4_IOC32_SETRSVSZ _IOW('f', 6, int)
#define EXT4_IOC32_GROUP_EXTEND _IOW('f', 7, unsigned int)
#define EXT4_IOC32_GROUP_ADD _IOW('f', 8, struct compat_ext4_new_group_input)
#define EXT4_IOC32_GETVERSION_OLD FS_IOC32_GETVERSION
#define EXT4_IOC32_SETVERSION_OLD FS_IOC32_SETVERSION
#define EXT4_STATE_FLAG_EXT_PRECACHED 0x00000001
#define EXT4_STATE_FLAG_NEW 0x00000002
#define EXT4_STATE_FLAG_NEWENTRY 0x00000004
#define EXT4_STATE_FLAG_DA_ALLOC_CLOSE 0x00000008
#define EXT4_IOC_CHECKPOINT_FLAG_DISCARD 0x1
#define EXT4_IOC_CHECKPOINT_FLAG_ZEROOUT 0x2
#define EXT4_IOC_CHECKPOINT_FLAG_DRY_RUN 0x4
#define EXT4_IOC_CHECKPOINT_FLAG_VALID (EXT4_IOC_CHECKPOINT_FLAG_DISCARD | EXT4_IOC_CHECKPOINT_FLAG_ZEROOUT | EXT4_IOC_CHECKPOINT_FLAG_DRY_RUN)
struct fsuuid {
__u32 fsu_len;
__u32 fsu_flags;
__u8 fsu_uuid[];
};
struct move_extent {
__u32 reserved;
__u32 donor_fd;
__u64 orig_start;
__u64 donor_start;
__u64 len;
__u64 moved_len;
};
#define EXT4_GOING_FLAGS_DEFAULT 0x0
#define EXT4_GOING_FLAGS_LOGFLUSH 0x1
#define EXT4_GOING_FLAGS_NOLOGFLUSH 0x2
struct ext4_new_group_input {
__u32 group;
__u64 block_bitmap;
__u64 inode_bitmap;
__u64 inode_table;
__u32 blocks_count;
__u16 reserved_blocks;
__u16 unused;
};
#define EXT4_FIEMAP_EXTENT_HOLE 0x08000000
#endif

View file

@ -49,8 +49,20 @@ struct gsm_netconfig {
#define GSMIOC_GETFIRST _IOR('G', 4, __u32)
struct gsm_config_ext {
__u32 keep_alive;
__u32 reserved[7];
__u32 wait_config;
__u32 reserved[6];
};
#define GSMIOC_GETCONF_EXT _IOR('G', 5, struct gsm_config_ext)
#define GSMIOC_SETCONF_EXT _IOW('G', 6, struct gsm_config_ext)
struct gsm_dlci_config {
__u32 channel;
__u32 adaption;
__u32 mtu;
__u32 priority;
__u32 i;
__u32 k;
__u32 reserved[8];
};
#define GSMIOC_GETCONF_DLCI _IOWR('G', 7, struct gsm_dlci_config)
#define GSMIOC_SETCONF_DLCI _IOW('G', 8, struct gsm_dlci_config)
#endif

View file

@ -0,0 +1,73 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _UAPI_LINUX_HANDSHAKE_H
#define _UAPI_LINUX_HANDSHAKE_H
#define HANDSHAKE_FAMILY_NAME "handshake"
#define HANDSHAKE_FAMILY_VERSION 1
enum handshake_handler_class {
HANDSHAKE_HANDLER_CLASS_NONE,
HANDSHAKE_HANDLER_CLASS_TLSHD,
HANDSHAKE_HANDLER_CLASS_MAX,
};
enum handshake_msg_type {
HANDSHAKE_MSG_TYPE_UNSPEC,
HANDSHAKE_MSG_TYPE_CLIENTHELLO,
HANDSHAKE_MSG_TYPE_SERVERHELLO,
};
enum handshake_auth {
HANDSHAKE_AUTH_UNSPEC,
HANDSHAKE_AUTH_UNAUTH,
HANDSHAKE_AUTH_PSK,
HANDSHAKE_AUTH_X509,
};
enum {
HANDSHAKE_A_X509_CERT = 1,
HANDSHAKE_A_X509_PRIVKEY,
__HANDSHAKE_A_X509_MAX,
HANDSHAKE_A_X509_MAX = (__HANDSHAKE_A_X509_MAX - 1)
};
enum {
HANDSHAKE_A_ACCEPT_SOCKFD = 1,
HANDSHAKE_A_ACCEPT_HANDLER_CLASS,
HANDSHAKE_A_ACCEPT_MESSAGE_TYPE,
HANDSHAKE_A_ACCEPT_TIMEOUT,
HANDSHAKE_A_ACCEPT_AUTH_MODE,
HANDSHAKE_A_ACCEPT_PEER_IDENTITY,
HANDSHAKE_A_ACCEPT_CERTIFICATE,
HANDSHAKE_A_ACCEPT_PEERNAME,
__HANDSHAKE_A_ACCEPT_MAX,
HANDSHAKE_A_ACCEPT_MAX = (__HANDSHAKE_A_ACCEPT_MAX - 1)
};
enum {
HANDSHAKE_A_DONE_STATUS = 1,
HANDSHAKE_A_DONE_SOCKFD,
HANDSHAKE_A_DONE_REMOTE_AUTH,
__HANDSHAKE_A_DONE_MAX,
HANDSHAKE_A_DONE_MAX = (__HANDSHAKE_A_DONE_MAX - 1)
};
enum {
HANDSHAKE_CMD_READY = 1,
HANDSHAKE_CMD_ACCEPT,
HANDSHAKE_CMD_DONE,
__HANDSHAKE_CMD_MAX,
HANDSHAKE_CMD_MAX = (__HANDSHAKE_CMD_MAX - 1)
};
#define HANDSHAKE_MCGRP_NONE "none"
#define HANDSHAKE_MCGRP_TLSHD "tlshd"
#endif

View file

@ -36,9 +36,4 @@ enum {
HW_BREAKPOINT_X = 4,
HW_BREAKPOINT_INVALID = HW_BREAKPOINT_RW | HW_BREAKPOINT_X,
};
enum bp_type_idx {
TYPE_INST = 0,
TYPE_DATA = 1,
TYPE_MAX
};
#endif

View file

@ -39,6 +39,7 @@ enum idxd_scmd_stat {
IDXD_SCMD_WQ_NO_PRIV = 0x800f0000,
IDXD_SCMD_WQ_IRQ_ERR = 0x80100000,
IDXD_SCMD_WQ_USER_NO_IOMMU = 0x80110000,
IDXD_SCMD_DEV_EVL_ERR = 0x80120000,
};
#define IDXD_SCMD_SOFTERR_MASK 0x80000000
#define IDXD_SCMD_SOFTERR_SHIFT 16
@ -74,12 +75,14 @@ enum dsa_opcode {
DSA_OPCODE_CR_DELTA,
DSA_OPCODE_AP_DELTA,
DSA_OPCODE_DUALCAST,
DSA_OPCODE_TRANSL_FETCH,
DSA_OPCODE_CRCGEN = 0x10,
DSA_OPCODE_COPY_CRC,
DSA_OPCODE_DIF_CHECK,
DSA_OPCODE_DIF_INS,
DSA_OPCODE_DIF_STRP,
DSA_OPCODE_DIF_UPDT,
DSA_OPCODE_DIX_GEN = 0x17,
DSA_OPCODE_CFLUSH = 0x20,
};
enum iax_opcode {
@ -131,6 +134,8 @@ enum dsa_completion_status {
DSA_COMP_HW_ERR1,
DSA_COMP_HW_ERR_DRB,
DSA_COMP_TRANSLATION_FAIL,
DSA_COMP_DRAIN_EVL = 0x26,
DSA_COMP_BATCH_EVL_ERR,
};
enum iax_completion_status {
IAX_COMP_NONE = 0,
@ -164,6 +169,7 @@ enum iax_completion_status {
};
#define DSA_COMP_STATUS_MASK 0x7f
#define DSA_COMP_STATUS_WRITE 0x80
#define DSA_COMP_STATUS(status) ((status) & DSA_COMP_STATUS_MASK)
struct dsa_hw_desc {
uint32_t pasid : 20;
uint32_t rsvd : 11;
@ -176,6 +182,8 @@ struct dsa_hw_desc {
uint64_t rdback_addr;
uint64_t pattern;
uint64_t desc_list_addr;
uint64_t pattern_lower;
uint64_t transl_fetch_addr;
};
union {
uint64_t dst_addr;
@ -186,6 +194,7 @@ struct dsa_hw_desc {
union {
uint32_t xfer_size;
uint32_t desc_count;
uint32_t region_size;
};
uint16_t int_handle;
uint16_t rsvd1;
@ -234,6 +243,20 @@ struct dsa_hw_desc {
uint16_t dest_app_tag_mask;
uint16_t dest_app_tag_seed;
};
uint64_t pattern_upper;
struct {
uint64_t transl_fetch_res;
uint32_t region_stride;
};
struct {
uint8_t dix_gen_res;
uint8_t dest_dif_flags;
uint8_t dif_flags;
uint8_t dix_gen_res2[13];
uint32_t ref_tag_seed;
uint16_t app_tag_mask;
uint16_t app_tag_seed;
};
uint8_t op_specific[24];
};
} __attribute__((packed));
@ -267,8 +290,12 @@ struct dsa_completion_record {
uint8_t result;
uint8_t dif_status;
};
uint16_t rsvd;
uint32_t bytes_completed;
uint8_t fault_info;
uint8_t rsvd;
union {
uint32_t bytes_completed;
uint32_t descs_completed;
};
uint64_t fault_addr;
union {
struct {
@ -296,6 +323,12 @@ struct dsa_completion_record {
uint16_t dif_upd_dest_app_tag_mask;
uint16_t dif_upd_dest_app_tag;
};
struct {
uint64_t dix_gen_res;
uint32_t dix_ref_tag;
uint16_t dix_app_tag_mask;
uint16_t dix_app_tag;
};
uint8_t op_specific[16];
};
} __attribute__((packed));
@ -305,7 +338,8 @@ struct dsa_raw_completion_record {
struct iax_completion_record {
volatile uint8_t status;
uint8_t error_code;
uint16_t rsvd;
uint8_t fault_info;
uint8_t rsvd;
uint32_t bytes_completed;
uint64_t fault_addr;
uint32_t invalid_flags;

View file

@ -437,6 +437,7 @@ enum {
BRIDGE_VLANDB_ENTRY_MCAST_ROUTER,
BRIDGE_VLANDB_ENTRY_MCAST_N_GROUPS,
BRIDGE_VLANDB_ENTRY_MCAST_MAX_GROUPS,
BRIDGE_VLANDB_ENTRY_NEIGH_SUPPRESS,
__BRIDGE_VLANDB_ENTRY_MAX,
};
#define BRIDGE_VLANDB_ENTRY_MAX (__BRIDGE_VLANDB_ENTRY_MAX - 1)
@ -506,6 +507,11 @@ enum {
MDBA_MDB_EATTR_GROUP_MODE,
MDBA_MDB_EATTR_SOURCE,
MDBA_MDB_EATTR_RTPROT,
MDBA_MDB_EATTR_DST,
MDBA_MDB_EATTR_DST_PORT,
MDBA_MDB_EATTR_VNI,
MDBA_MDB_EATTR_IFINDEX,
MDBA_MDB_EATTR_SRC_VNI,
__MDBA_MDB_EATTR_MAX
};
#define MDBA_MDB_EATTR_MAX (__MDBA_MDB_EATTR_MAX - 1)
@ -581,6 +587,11 @@ enum {
MDBE_ATTR_SRC_LIST,
MDBE_ATTR_GROUP_MODE,
MDBE_ATTR_RTPROT,
MDBE_ATTR_DST,
MDBE_ATTR_DST_PORT,
MDBE_ATTR_VNI,
MDBE_ATTR_IFINDEX,
MDBE_ATTR_SRC_VNI,
__MDBE_ATTR_MAX,
};
#define MDBE_ATTR_MAX (__MDBE_ATTR_MAX - 1)

View file

@ -311,6 +311,7 @@ enum {
IFLA_BRPORT_MAB,
IFLA_BRPORT_MCAST_N_GROUPS,
IFLA_BRPORT_MCAST_MAX_GROUPS,
IFLA_BRPORT_NEIGH_VLAN_SUPPRESS,
__IFLA_BRPORT_MAX
};
#define IFLA_BRPORT_MAX (__IFLA_BRPORT_MAX - 1)
@ -364,6 +365,7 @@ enum {
IFLA_MACVLAN_MACADDR_COUNT,
IFLA_MACVLAN_BC_QUEUE_LEN,
IFLA_MACVLAN_BC_QUEUE_LEN_USED,
IFLA_MACVLAN_BC_CUTOFF,
__IFLA_MACVLAN_MAX,
};
#define IFLA_MACVLAN_MAX (__IFLA_MACVLAN_MAX - 1)

View file

@ -65,6 +65,7 @@ struct sockaddr_ll {
#define PACKET_ROLLOVER_STATS 21
#define PACKET_FANOUT_DATA 22
#define PACKET_IGNORE_OUTGOING 23
#define PACKET_VNET_HDR_SZ 24
#define PACKET_FANOUT_HASH 0
#define PACKET_FANOUT_LB 1
#define PACKET_FANOUT_CPU 2

View file

@ -142,6 +142,7 @@ enum {
#define IP_MULTICAST_ALL 49
#define IP_UNICAST_IF 50
#define IP_LOCAL_PORT_RANGE 51
#define IP_PROTOCOL 52
#define MCAST_EXCLUDE 0
#define MCAST_INCLUDE 1
#define IP_DEFAULT_MULTICAST_TTL 1

View file

@ -178,6 +178,7 @@ enum io_uring_op {
#define IORING_TIMEOUT_REALTIME (1U << 3)
#define IORING_LINK_TIMEOUT_UPDATE (1U << 4)
#define IORING_TIMEOUT_ETIME_SUCCESS (1U << 5)
#define IORING_TIMEOUT_MULTISHOT (1U << 6)
#define IORING_TIMEOUT_CLOCK_MASK (IORING_TIMEOUT_BOOTTIME | IORING_TIMEOUT_REALTIME)
#define IORING_TIMEOUT_UPDATE_MASK (IORING_TIMEOUT_UPDATE | IORING_LINK_TIMEOUT_UPDATE)
#define SPLICE_F_FD_IN_FIXED (1U << 31)
@ -217,6 +218,9 @@ enum {
#define IORING_OFF_SQ_RING 0ULL
#define IORING_OFF_CQ_RING 0x8000000ULL
#define IORING_OFF_SQES 0x10000000ULL
#define IORING_OFF_PBUF_RING 0x80000000ULL
#define IORING_OFF_PBUF_SHIFT 16
#define IORING_OFF_MMAP_MASK 0xf8000000ULL
struct io_sqring_offsets {
__u32 head;
__u32 tail;
@ -334,17 +338,6 @@ struct io_uring_rsrc_update2 {
__u32 nr;
__u32 resv2;
};
struct io_uring_notification_slot {
__u64 tag;
__u64 resv[3];
};
struct io_uring_notification_register {
__u32 nr_slots;
__u32 resv;
__u64 resv2;
__u64 data;
__u64 resv3;
};
#define IORING_REGISTER_FILES_SKIP (- 2)
#define IO_URING_OP_SUPPORTED (1U << 0)
struct io_uring_probe_op {
@ -387,11 +380,14 @@ struct io_uring_buf_ring {
__DECLARE_FLEX_ARRAY(struct io_uring_buf, bufs);
};
};
enum {
IOU_PBUF_RING_MMAP = 1,
};
struct io_uring_buf_reg {
__u64 ring_addr;
__u32 ring_entries;
__u16 bgid;
__u16 pad;
__u16 flags;
__u64 resv[3];
};
enum {

View file

@ -62,7 +62,7 @@ struct ipv6_opt_hdr {
struct rt0_hdr {
struct ipv6_rt_hdr rt_hdr;
__u32 reserved;
struct in6_addr addr[0];
struct in6_addr addr[];
#define rt0_type rt_hdr.type
};
struct rt2_hdr {

View file

@ -67,10 +67,136 @@ struct isst_if_msr_cmds {
__u32 cmd_count;
struct isst_if_msr_cmd msr_cmd[1];
};
struct isst_core_power {
__u8 get_set;
__u8 socket_id;
__u8 power_domain_id;
__u8 enable;
__u8 supported;
__u8 priority_type;
};
struct isst_clos_param {
__u8 get_set;
__u8 socket_id;
__u8 power_domain_id;
__u8 clos;
__u16 min_freq_mhz;
__u16 max_freq_mhz;
__u8 prop_prio;
};
struct isst_if_clos_assoc {
__u8 socket_id;
__u8 power_domain_id;
__u16 logical_cpu;
__u16 clos;
};
struct isst_if_clos_assoc_cmds {
__u16 cmd_count;
__u16 get_set;
__u16 punit_cpu_map;
struct isst_if_clos_assoc assoc_info[1];
};
struct isst_tpmi_instance_count {
__u8 socket_id;
__u8 count;
__u16 valid_mask;
};
struct isst_perf_level_info {
__u8 socket_id;
__u8 power_domain_id;
__u8 max_level;
__u8 feature_rev;
__u8 level_mask;
__u8 current_level;
__u8 feature_state;
__u8 locked;
__u8 enabled;
__u8 sst_tf_support;
__u8 sst_bf_support;
};
struct isst_perf_level_control {
__u8 socket_id;
__u8 power_domain_id;
__u8 level;
};
struct isst_perf_feature_control {
__u8 socket_id;
__u8 power_domain_id;
__u8 feature;
};
#define TRL_MAX_BUCKETS 8
#define TRL_MAX_LEVELS 6
struct isst_perf_level_data_info {
__u8 socket_id;
__u8 power_domain_id;
__u16 level;
__u16 tdp_ratio;
__u16 base_freq_mhz;
__u16 base_freq_avx2_mhz;
__u16 base_freq_avx512_mhz;
__u16 base_freq_amx_mhz;
__u16 thermal_design_power_w;
__u16 tjunction_max_c;
__u16 max_memory_freq_mhz;
__u16 cooling_type;
__u16 p0_freq_mhz;
__u16 p1_freq_mhz;
__u16 pn_freq_mhz;
__u16 pm_freq_mhz;
__u16 p0_fabric_freq_mhz;
__u16 p1_fabric_freq_mhz;
__u16 pn_fabric_freq_mhz;
__u16 pm_fabric_freq_mhz;
__u16 max_buckets;
__u16 max_trl_levels;
__u16 bucket_core_counts[TRL_MAX_BUCKETS];
__u16 trl_freq_mhz[TRL_MAX_LEVELS][TRL_MAX_BUCKETS];
};
struct isst_perf_level_cpu_mask {
__u8 socket_id;
__u8 power_domain_id;
__u8 level;
__u8 punit_cpu_map;
__u64 mask;
__u16 cpu_buffer_size;
__s8 cpu_buffer[1];
};
struct isst_base_freq_info {
__u8 socket_id;
__u8 power_domain_id;
__u16 level;
__u16 high_base_freq_mhz;
__u16 low_base_freq_mhz;
__u16 tjunction_max_c;
__u16 thermal_design_power_w;
};
struct isst_turbo_freq_info {
__u8 socket_id;
__u8 power_domain_id;
__u16 level;
__u16 max_clip_freqs;
__u16 max_buckets;
__u16 max_trl_levels;
__u16 lp_clip_freq_mhz[TRL_MAX_LEVELS];
__u16 bucket_core_counts[TRL_MAX_BUCKETS];
__u16 trl_freq_mhz[TRL_MAX_LEVELS][TRL_MAX_BUCKETS];
};
#define ISST_IF_MAGIC 0xFE
#define ISST_IF_GET_PLATFORM_INFO _IOR(ISST_IF_MAGIC, 0, struct isst_if_platform_info *)
#define ISST_IF_GET_PHY_ID _IOWR(ISST_IF_MAGIC, 1, struct isst_if_cpu_map *)
#define ISST_IF_IO_CMD _IOW(ISST_IF_MAGIC, 2, struct isst_if_io_regs *)
#define ISST_IF_MBOX_COMMAND _IOWR(ISST_IF_MAGIC, 3, struct isst_if_mbox_cmds *)
#define ISST_IF_MSR_COMMAND _IOWR(ISST_IF_MAGIC, 4, struct isst_if_msr_cmds *)
#define ISST_IF_COUNT_TPMI_INSTANCES _IOR(ISST_IF_MAGIC, 5, struct isst_tpmi_instance_count *)
#define ISST_IF_CORE_POWER_STATE _IOWR(ISST_IF_MAGIC, 6, struct isst_core_power *)
#define ISST_IF_CLOS_PARAM _IOWR(ISST_IF_MAGIC, 7, struct isst_clos_param *)
#define ISST_IF_CLOS_ASSOC _IOWR(ISST_IF_MAGIC, 8, struct isst_if_clos_assoc_cmds *)
#define ISST_IF_PERF_LEVELS _IOWR(ISST_IF_MAGIC, 9, struct isst_perf_level_info *)
#define ISST_IF_PERF_SET_LEVEL _IOW(ISST_IF_MAGIC, 10, struct isst_perf_level_control *)
#define ISST_IF_PERF_SET_FEATURE _IOW(ISST_IF_MAGIC, 11, struct isst_perf_feature_control *)
#define ISST_IF_GET_PERF_LEVEL_INFO _IOR(ISST_IF_MAGIC, 12, struct isst_perf_level_data_info *)
#define ISST_IF_GET_PERF_LEVEL_CPU_MASK _IOR(ISST_IF_MAGIC, 13, struct isst_perf_level_cpu_mask *)
#define ISST_IF_GET_BASE_FREQ_INFO _IOR(ISST_IF_MAGIC, 14, struct isst_base_freq_info *)
#define ISST_IF_GET_BASE_FREQ_CPU_MASK _IOR(ISST_IF_MAGIC, 15, struct isst_perf_level_cpu_mask *)
#define ISST_IF_GET_TURBO_FREQ_INFO _IOR(ISST_IF_MAGIC, 16, struct isst_turbo_freq_info *)
#endif

View file

@ -21,7 +21,7 @@
#include <drm/drm.h>
#include <linux/ioctl.h>
#define KFD_IOCTL_MAJOR_VERSION 1
#define KFD_IOCTL_MINOR_VERSION 11
#define KFD_IOCTL_MINOR_VERSION 12
struct kfd_ioctl_get_version_args {
__u32 major_version;
__u32 minor_version;
@ -294,6 +294,11 @@ struct kfd_ioctl_import_dmabuf_args {
__u32 gpu_id;
__u32 dmabuf_fd;
};
struct kfd_ioctl_export_dmabuf_args {
__u64 handle;
__u32 flags;
__u32 dmabuf_fd;
};
enum kfd_smi_event {
KFD_SMI_EVENT_NONE = 0,
KFD_SMI_EVENT_VMFAULT = 1,
@ -451,6 +456,7 @@ struct kfd_ioctl_set_xnack_mode_args {
#define AMDKFD_IOC_SET_XNACK_MODE AMDKFD_IOWR(0x21, struct kfd_ioctl_set_xnack_mode_args)
#define AMDKFD_IOC_CRIU_OP AMDKFD_IOWR(0x22, struct kfd_ioctl_criu_args)
#define AMDKFD_IOC_AVAILABLE_MEMORY AMDKFD_IOWR(0x23, struct kfd_ioctl_get_available_memory_args)
#define AMDKFD_IOC_EXPORT_DMABUF AMDKFD_IOWR(0x24, struct kfd_ioctl_export_dmabuf_args)
#define AMDKFD_COMMAND_START 0x01
#define AMDKFD_COMMAND_END 0x24
#define AMDKFD_COMMAND_END 0x25
#endif

View file

@ -265,8 +265,10 @@ struct kvm_run {
__u64 nr;
__u64 args[6];
__u64 ret;
__u32 longmode;
__u32 pad;
union {
__u32 longmode;
__u64 flags;
};
} hypercall;
struct {
__u64 rip;
@ -932,6 +934,7 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_S390_PROTECTED_ASYNC_DISABLE 224
#define KVM_CAP_DIRTY_LOG_RING_WITH_BITMAP 225
#define KVM_CAP_PMU_EVENT_MASKED_EVENTS 226
#define KVM_CAP_COUNTER_OFFSET 227
#ifdef KVM_CAP_IRQ_ROUTING
struct kvm_irq_routing_irqchip {
__u32 irqchip;
@ -1198,6 +1201,7 @@ struct kvm_s390_ucas_mapping {
#define KVM_SET_PMU_EVENT_FILTER _IOW(KVMIO, 0xb2, struct kvm_pmu_event_filter)
#define KVM_PPC_SVM_OFF _IO(KVMIO, 0xb3)
#define KVM_ARM_MTE_COPY_TAGS _IOR(KVMIO, 0xb4, struct kvm_arm_copy_mte_tags)
#define KVM_ARM_SET_COUNTER_OFFSET _IOW(KVMIO, 0xb5, struct kvm_arm_counter_offset)
#define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device)
#define KVM_SET_DEVICE_ATTR _IOW(KVMIO, 0xe1, struct kvm_device_attr)
#define KVM_GET_DEVICE_ATTR _IOW(KVMIO, 0xe2, struct kvm_device_attr)

View file

@ -18,7 +18,7 @@
****************************************************************************/
#ifndef _LINUX_MEI_H
#define _LINUX_MEI_H
#include <linux/uuid.h>
#include <linux/mei_uuid.h>
#define IOCTL_MEI_CONNECT_CLIENT _IOWR('H', 0x01, struct mei_connect_client_data)
struct mei_client {
__u32 max_msg_length;

View file

@ -0,0 +1,29 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _UAPI_LINUX_MEI_UUID_H_
#define _UAPI_LINUX_MEI_UUID_H_
#include <linux/types.h>
typedef struct {
__u8 b[16];
} uuid_le;
#define UUID_LE(a,b,c,d0,d1,d2,d3,d4,d5,d6,d7) \
((uuid_le) \
{ { (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, (b) & 0xff, ((b) >> 8) & 0xff, (c) & 0xff, ((c) >> 8) & 0xff, (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) } })
#define NULL_UUID_LE UUID_LE(0x00000000, 0x0000, 0x0000, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00)
#endif

View file

@ -51,13 +51,19 @@ enum {
struct nbd_request {
__be32 magic;
__be32 type;
char handle[8];
union {
__be64 cookie;
char handle[8];
};
__be64 from;
__be32 len;
} __attribute__((packed));
struct nbd_reply {
__be32 magic;
__be32 error;
char handle[8];
union {
__be64 cookie;
char handle[8];
};
};
#endif

View file

@ -500,6 +500,7 @@ enum nft_meta_keys {
NFT_META_TIME_HOUR,
NFT_META_SDIF,
NFT_META_SDIFNAME,
NFT_META_BRI_BROUTE,
__NFT_META_IIFTYPE,
};
enum nft_rt_keys {

View file

@ -50,5 +50,12 @@ enum nfnl_hook_chain_desc_attributes {
#define NFNLA_CHAIN_MAX (__NFNLA_CHAIN_MAX - 1)
enum nfnl_hook_chaintype {
NFNL_HOOK_TYPE_NFTABLES = 0x1,
NFNL_HOOK_TYPE_BPF,
};
enum nfnl_hook_bpf_attributes {
NFNLA_HOOK_BPF_UNSPEC,
NFNLA_HOOK_BPF_ID,
__NFNLA_HOOK_BPF_MAX,
};
#define NFNLA_HOOK_BPF_MAX (__NFNLA_HOOK_BPF_MAX - 1)
#endif

View file

@ -71,6 +71,7 @@ enum nfqnl_attr_type {
NFQA_VLAN,
NFQA_L2HDR,
NFQA_PRIORITY,
NFQA_CGROUP_CLASSID,
__NFQA_MAX
};
#define NFQA_MAX (__NFQA_MAX - 1)

View file

@ -41,4 +41,9 @@
#define NFSEXP_PNFS 0x20000
#define NFSEXP_ALLFLAGS 0x3FEFF
#define NFSEXP_SECINFO_FLAGS (NFSEXP_READONLY | NFSEXP_ROOTSQUASH | NFSEXP_ALLSQUASH | NFSEXP_INSECURE_PORT)
#define NFSEXP_XPRTSEC_NONE 0x0001
#define NFSEXP_XPRTSEC_TLS 0x0002
#define NFSEXP_XPRTSEC_MTLS 0x0004
#define NFSEXP_XPRTSEC_NUM (3)
#define NFSEXP_XPRTSEC_ALL (NFSEXP_XPRTSEC_NONE | NFSEXP_XPRTSEC_TLS | NFSEXP_XPRTSEC_MTLS)
#endif

View file

@ -190,6 +190,7 @@ enum nl80211_commands {
NL80211_CMD_ADD_LINK_STA,
NL80211_CMD_MODIFY_LINK_STA,
NL80211_CMD_REMOVE_LINK_STA,
NL80211_CMD_SET_HW_TIMESTAMP,
__NL80211_CMD_AFTER_LAST,
NL80211_CMD_MAX = __NL80211_CMD_AFTER_LAST - 1
};
@ -529,6 +530,9 @@ enum nl80211_attrs {
NL80211_ATTR_RX_HW_TIMESTAMP,
NL80211_ATTR_TD_BITMAP,
NL80211_ATTR_PUNCT_BITMAP,
NL80211_ATTR_MAX_HW_TIMESTAMP_PEERS,
NL80211_ATTR_HW_TIMESTAMP_ENABLED,
NL80211_ATTR_EMA_RNR_ELEMS,
__NL80211_ATTR_AFTER_LAST,
NUM_NL80211_ATTR = __NL80211_ATTR_AFTER_LAST,
NL80211_ATTR_MAX = __NL80211_ATTR_AFTER_LAST - 1
@ -822,6 +826,8 @@ enum nl80211_band_attr {
NL80211_BAND_ATTR_IFTYPE_DATA,
NL80211_BAND_ATTR_EDMG_CHANNELS,
NL80211_BAND_ATTR_EDMG_BW_CONFIG,
NL80211_BAND_ATTR_S1G_MCS_NSS_SET,
NL80211_BAND_ATTR_S1G_CAPA,
__NL80211_BAND_ATTR_AFTER_LAST,
NL80211_BAND_ATTR_MAX = __NL80211_BAND_ATTR_AFTER_LAST - 1
};
@ -1537,6 +1543,7 @@ enum nl80211_ext_feature_index {
NL80211_EXT_FEATURE_POWERED_ADDR_CHANGE,
NL80211_EXT_FEATURE_PUNCT,
NL80211_EXT_FEATURE_SECURE_NAN,
NL80211_EXT_FEATURE_AUTH_AND_DEAUTH_RANDOM_TA,
NUM_NL80211_EXT_FEATURES,
MAX_NL80211_EXT_FEATURES = NUM_NL80211_EXT_FEATURES - 1
};

View file

@ -75,4 +75,7 @@ typedef enum {
#define IEEE1284_DATA 0
#define PARPORT_EPP_FAST (1 << 0)
#define PARPORT_W91284PIC (1 << 1)
#define PARPORT_EPP_FAST_32 PARPORT_EPP_FAST
#define PARPORT_EPP_FAST_16 (1 << 2)
#define PARPORT_EPP_FAST_8 (1 << 3)
#endif

View file

@ -532,6 +532,10 @@ enum {
__TC_MQPRIO_SHAPER_MAX
};
#define __TC_MQPRIO_SHAPER_MAX (__TC_MQPRIO_SHAPER_MAX - 1)
enum {
TC_FP_EXPRESS = 1,
TC_FP_PREEMPTIBLE = 2,
};
struct tc_mqprio_qopt {
__u8 num_tc;
__u8 prio_tc_map[TC_QOPT_BITMASK + 1];
@ -543,12 +547,20 @@ struct tc_mqprio_qopt {
#define TC_MQPRIO_F_SHAPER 0x2
#define TC_MQPRIO_F_MIN_RATE 0x4
#define TC_MQPRIO_F_MAX_RATE 0x8
enum {
TCA_MQPRIO_TC_ENTRY_UNSPEC,
TCA_MQPRIO_TC_ENTRY_INDEX,
TCA_MQPRIO_TC_ENTRY_FP,
__TCA_MQPRIO_TC_ENTRY_CNT,
TCA_MQPRIO_TC_ENTRY_MAX = (__TCA_MQPRIO_TC_ENTRY_CNT - 1)
};
enum {
TCA_MQPRIO_UNSPEC,
TCA_MQPRIO_MODE,
TCA_MQPRIO_SHAPER,
TCA_MQPRIO_MIN_RATE64,
TCA_MQPRIO_MAX_RATE64,
TCA_MQPRIO_TC_ENTRY,
__TCA_MQPRIO_MAX,
};
#define TCA_MQPRIO_MAX (__TCA_MQPRIO_MAX - 1)
@ -927,6 +939,7 @@ enum {
TCA_TAPRIO_TC_ENTRY_UNSPEC,
TCA_TAPRIO_TC_ENTRY_INDEX,
TCA_TAPRIO_TC_ENTRY_MAX_SDU,
TCA_TAPRIO_TC_ENTRY_FP,
__TCA_TAPRIO_TC_ENTRY_CNT,
TCA_TAPRIO_TC_ENTRY_MAX = (__TCA_TAPRIO_TC_ENTRY_CNT - 1)
};

View file

@ -23,7 +23,6 @@
#define MAX_WRITERS 8
#define PKT_RB_POOL_SIZE 512
#define PACKET_WAIT_TIME (HZ * 5 / 1000)
#define USE_WCACHING 0
#define PACKET_CDR 1
#define PACKET_CDRW 2
#define PACKET_DVDR 3

View file

@ -189,4 +189,7 @@ struct prctl_mm_map {
#define PR_GET_MDWE 66
#define PR_SET_VMA 0x53564d41
#define PR_SET_VMA_ANON_NAME 0
#define PR_GET_AUXV 0x41555856
#define PR_SET_MEMORY_MERGE 67
#define PR_GET_MEMORY_MERGE 68
#endif

View file

@ -32,6 +32,7 @@ enum {
SEV_MAX,
};
typedef enum {
SEV_RET_NO_FW_CALL = - 1,
SEV_RET_SUCCESS = 0,
SEV_RET_INVALID_PLATFORM_STATE,
SEV_RET_INVALID_GUEST_STATE,

View file

@ -90,6 +90,14 @@ struct ptrace_rseq_configuration {
__u32 flags;
__u32 pad;
};
#define PTRACE_SET_SYSCALL_USER_DISPATCH_CONFIG 0x4210
#define PTRACE_GET_SYSCALL_USER_DISPATCH_CONFIG 0x4211
struct ptrace_sud_config {
__u64 mode;
__u64 selector;
__u64 offset;
__u64 len;
};
#define PTRACE_EVENTMSG_SYSCALL_ENTRY 1
#define PTRACE_EVENTMSG_SYSCALL_EXIT 2
#define PTRACE_PEEKSIGINFO_SHARED (1 << 0)

View file

@ -709,7 +709,9 @@ enum sctp_sched_type {
SCTP_SS_DEFAULT = SCTP_SS_FCFS,
SCTP_SS_PRIO,
SCTP_SS_RR,
SCTP_SS_MAX = SCTP_SS_RR
SCTP_SS_FC,
SCTP_SS_WFQ,
SCTP_SS_MAX = SCTP_SS_WFQ
};
struct sctp_probeinterval {
sctp_assoc_t spi_assoc_id;

View file

@ -74,6 +74,15 @@ struct opal_user_lr_setup {
__u32 WLE;
struct opal_session_info session;
};
struct opal_lr_status {
struct opal_session_info session;
__u64 range_start;
__u64 range_length;
__u32 RLE;
__u32 WLE;
__u32 l_state;
__u8 align[4];
};
struct opal_lock_unlock {
struct opal_session_info session;
__u32 l_state;
@ -127,6 +136,13 @@ struct opal_status {
__u32 flags;
__u32 reserved;
};
struct opal_geometry {
__u8 align;
__u32 logical_block_size;
__u64 alignment_granularity;
__u64 lowest_aligned_lba;
__u8 __align[3];
};
#define IOC_OPAL_SAVE _IOW('p', 220, struct opal_lock_unlock)
#define IOC_OPAL_LOCK_UNLOCK _IOW('p', 221, struct opal_lock_unlock)
#define IOC_OPAL_TAKE_OWNERSHIP _IOW('p', 222, struct opal_key)
@ -144,4 +160,6 @@ struct opal_status {
#define IOC_OPAL_WRITE_SHADOW_MBR _IOW('p', 234, struct opal_shadow_mbr)
#define IOC_OPAL_GENERIC_TABLE_RW _IOW('p', 235, struct opal_read_write_table)
#define IOC_OPAL_GET_STATUS _IOR('p', 236, struct opal_status)
#define IOC_OPAL_GET_LR_STATUS _IOW('p', 237, struct opal_lr_status)
#define IOC_OPAL_GET_GEOMETRY _IOR('p', 238, struct opal_geometry)
#endif

View file

@ -42,7 +42,13 @@ struct snp_guest_request_ioctl {
__u8 msg_version;
__u64 req_data;
__u64 resp_data;
__u64 fw_err;
union {
__u64 exitinfo2;
struct {
__u32 fw_error;
__u32 vmm_error;
};
};
};
struct snp_ext_report_req {
struct snp_report_req data;
@ -53,4 +59,9 @@ struct snp_ext_report_req {
#define SNP_GET_REPORT _IOWR(SNP_GUEST_REQ_IOC_TYPE, 0x0, struct snp_guest_request_ioctl)
#define SNP_GET_DERIVED_KEY _IOWR(SNP_GUEST_REQ_IOC_TYPE, 0x1, struct snp_guest_request_ioctl)
#define SNP_GET_EXT_REPORT _IOWR(SNP_GUEST_REQ_IOC_TYPE, 0x2, struct snp_guest_request_ioctl)
#define SNP_GUEST_FW_ERR_MASK GENMASK_ULL(31, 0)
#define SNP_GUEST_VMM_ERR_SHIFT 32
#define SNP_GUEST_VMM_ERR(x) (((u64) x) << SNP_GUEST_VMM_ERR_SHIFT)
#define SNP_GUEST_VMM_ERR_INVALID_LEN 1
#define SNP_GUEST_VMM_ERR_BUSY 2
#endif

View file

@ -61,7 +61,7 @@ struct tcmu_cmd_entry {
__u64 cdb_off;
__u64 __pad1;
__u64 __pad2;
struct iovec iov[0];
__DECLARE_FLEX_ARRAY(struct iovec, iov);
} req;
struct {
__u8 scsi_status;

View file

@ -19,7 +19,7 @@
#ifndef _LINUX_TASKSTATS_H
#define _LINUX_TASKSTATS_H
#include <linux/types.h>
#define TASKSTATS_VERSION 13
#define TASKSTATS_VERSION 14
#define TS_COMM_LEN 32
struct taskstats {
__u16 version;
@ -77,6 +77,8 @@ struct taskstats {
__u64 ac_exe_inode;
__u64 wpcopy_count;
__u64 wpcopy_delay_total;
__u64 irq_count;
__u64 irq_delay_total;
};
enum {
TASKSTATS_CMD_UNSPEC = 0,

View file

@ -40,6 +40,7 @@ enum {
TCA_TUNNEL_KEY_ENC_OPTS,
TCA_TUNNEL_KEY_ENC_TOS,
TCA_TUNNEL_KEY_ENC_TTL,
TCA_TUNNEL_KEY_NO_FRAG,
__TCA_TUNNEL_KEY_MAX,
};
#define TCA_TUNNEL_KEY_MAX (__TCA_TUNNEL_KEY_MAX - 1)

View file

@ -30,9 +30,23 @@
#define UBLK_CMD_START_USER_RECOVERY 0x10
#define UBLK_CMD_END_USER_RECOVERY 0x11
#define UBLK_CMD_GET_DEV_INFO2 0x12
#define UBLK_U_CMD_GET_QUEUE_AFFINITY _IOR('u', UBLK_CMD_GET_QUEUE_AFFINITY, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_GET_DEV_INFO _IOR('u', UBLK_CMD_GET_DEV_INFO, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_ADD_DEV _IOWR('u', UBLK_CMD_ADD_DEV, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_DEL_DEV _IOWR('u', UBLK_CMD_DEL_DEV, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_START_DEV _IOWR('u', UBLK_CMD_START_DEV, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_STOP_DEV _IOWR('u', UBLK_CMD_STOP_DEV, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_SET_PARAMS _IOWR('u', UBLK_CMD_SET_PARAMS, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_GET_PARAMS _IOR('u', UBLK_CMD_GET_PARAMS, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_START_USER_RECOVERY _IOWR('u', UBLK_CMD_START_USER_RECOVERY, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_END_USER_RECOVERY _IOWR('u', UBLK_CMD_END_USER_RECOVERY, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_GET_DEV_INFO2 _IOR('u', UBLK_CMD_GET_DEV_INFO2, struct ublksrv_ctrl_cmd)
#define UBLK_IO_FETCH_REQ 0x20
#define UBLK_IO_COMMIT_AND_FETCH_REQ 0x21
#define UBLK_IO_NEED_GET_DATA 0x22
#define UBLK_U_IO_FETCH_REQ _IOWR('u', UBLK_IO_FETCH_REQ, struct ublksrv_io_cmd)
#define UBLK_U_IO_COMMIT_AND_FETCH_REQ _IOWR('u', UBLK_IO_COMMIT_AND_FETCH_REQ, struct ublksrv_io_cmd)
#define UBLK_U_IO_NEED_GET_DATA _IOWR('u', UBLK_IO_NEED_GET_DATA, struct ublksrv_io_cmd)
#define UBLK_IO_RES_OK 0
#define UBLK_IO_RES_NEED_GET_DATA 1
#define UBLK_IO_RES_ABORT (- ENODEV)
@ -45,6 +59,7 @@
#define UBLK_F_USER_RECOVERY (1UL << 3)
#define UBLK_F_USER_RECOVERY_REISSUE (1UL << 4)
#define UBLK_F_UNPRIVILEGED_DEV (1UL << 5)
#define UBLK_F_CMD_IOCTL_ENCODE (1UL << 6)
#define UBLK_S_DEV_DEAD 0
#define UBLK_S_DEV_LIVE 1
#define UBLK_S_DEV_QUIESCED 2

View file

@ -16,39 +16,31 @@
***
****************************************************************************
****************************************************************************/
#ifndef _UAPI_CM4000_H_
#define _UAPI_CM4000_H_
#ifndef _UAPI_LINUX_USER_EVENTS_H
#define _UAPI_LINUX_USER_EVENTS_H
#include <linux/types.h>
#include <linux/ioctl.h>
#define MAX_ATR 33
#define CM4000_MAX_DEV 4
typedef struct atreq {
__s32 atr_len;
unsigned char atr[64];
__s32 power_act;
unsigned char bIFSD;
unsigned char bIFSC;
} atreq_t;
typedef struct ptsreq {
__u32 protocol;
unsigned char flags;
unsigned char pts1;
unsigned char pts2;
unsigned char pts3;
} ptsreq_t;
#define CM_IOC_MAGIC 'c'
#define CM_IOC_MAXNR 255
#define CM_IOCGSTATUS _IOR(CM_IOC_MAGIC, 0, unsigned char *)
#define CM_IOCGATR _IOWR(CM_IOC_MAGIC, 1, atreq_t *)
#define CM_IOCSPTS _IOW(CM_IOC_MAGIC, 2, ptsreq_t *)
#define CM_IOCSRDR _IO(CM_IOC_MAGIC, 3)
#define CM_IOCARDOFF _IO(CM_IOC_MAGIC, 4)
#define CM_IOSDBGLVL _IOW(CM_IOC_MAGIC, 250, int *)
#define CM_CARD_INSERTED 0x01
#define CM_CARD_POWERED 0x02
#define CM_ATR_PRESENT 0x04
#define CM_ATR_VALID 0x08
#define CM_STATE_VALID 0x0f
#define CM_NO_READER 0x10
#define CM_BAD_CARD 0x20
#define USER_EVENTS_SYSTEM "user_events"
#define USER_EVENTS_PREFIX "u:"
#define DYN_LOC(offset,size) ((size) << 16 | (offset))
struct user_reg {
__u32 size;
__u8 enable_bit;
__u8 enable_size;
__u16 flags;
__u64 enable_addr;
__u64 name_args;
__u32 write_index;
} __attribute__((__packed__));
struct user_unreg {
__u32 size;
__u8 disable_bit;
__u8 __reserved;
__u16 __reserved2;
__u64 disable_addr;
} __attribute__((__packed__));
#define DIAG_IOC_MAGIC '*'
#define DIAG_IOCSREG _IOWR(DIAG_IOC_MAGIC, 0, struct user_reg *)
#define DIAG_IOCSDEL _IOW(DIAG_IOC_MAGIC, 1, char *)
#define DIAG_IOCSUNREG _IOW(DIAG_IOC_MAGIC, 2, struct user_unreg *)
#endif

View file

@ -23,7 +23,7 @@
#define USERFAULTFD_IOC_NEW _IO(USERFAULTFD_IOC, 0x00)
#define UFFD_API ((__u64) 0xAA)
#define UFFD_API_REGISTER_MODES (UFFDIO_REGISTER_MODE_MISSING | UFFDIO_REGISTER_MODE_WP | UFFDIO_REGISTER_MODE_MINOR)
#define UFFD_API_FEATURES (UFFD_FEATURE_PAGEFAULT_FLAG_WP | UFFD_FEATURE_EVENT_FORK | UFFD_FEATURE_EVENT_REMAP | UFFD_FEATURE_EVENT_REMOVE | UFFD_FEATURE_EVENT_UNMAP | UFFD_FEATURE_MISSING_HUGETLBFS | UFFD_FEATURE_MISSING_SHMEM | UFFD_FEATURE_SIGBUS | UFFD_FEATURE_THREAD_ID | UFFD_FEATURE_MINOR_HUGETLBFS | UFFD_FEATURE_MINOR_SHMEM | UFFD_FEATURE_EXACT_ADDRESS | UFFD_FEATURE_WP_HUGETLBFS_SHMEM)
#define UFFD_API_FEATURES (UFFD_FEATURE_PAGEFAULT_FLAG_WP | UFFD_FEATURE_EVENT_FORK | UFFD_FEATURE_EVENT_REMAP | UFFD_FEATURE_EVENT_REMOVE | UFFD_FEATURE_EVENT_UNMAP | UFFD_FEATURE_MISSING_HUGETLBFS | UFFD_FEATURE_MISSING_SHMEM | UFFD_FEATURE_SIGBUS | UFFD_FEATURE_THREAD_ID | UFFD_FEATURE_MINOR_HUGETLBFS | UFFD_FEATURE_MINOR_SHMEM | UFFD_FEATURE_EXACT_ADDRESS | UFFD_FEATURE_WP_HUGETLBFS_SHMEM | UFFD_FEATURE_WP_UNPOPULATED)
#define UFFD_API_IOCTLS ((__u64) 1 << _UFFDIO_REGISTER | (__u64) 1 << _UFFDIO_UNREGISTER | (__u64) 1 << _UFFDIO_API)
#define UFFD_API_RANGE_IOCTLS ((__u64) 1 << _UFFDIO_WAKE | (__u64) 1 << _UFFDIO_COPY | (__u64) 1 << _UFFDIO_ZEROPAGE | (__u64) 1 << _UFFDIO_WRITEPROTECT | (__u64) 1 << _UFFDIO_CONTINUE)
#define UFFD_API_RANGE_IOCTLS_BASIC ((__u64) 1 << _UFFDIO_WAKE | (__u64) 1 << _UFFDIO_COPY | (__u64) 1 << _UFFDIO_CONTINUE | (__u64) 1 << _UFFDIO_WRITEPROTECT)
@ -99,6 +99,7 @@ struct uffdio_api {
#define UFFD_FEATURE_MINOR_SHMEM (1 << 10)
#define UFFD_FEATURE_EXACT_ADDRESS (1 << 11)
#define UFFD_FEATURE_WP_HUGETLBFS_SHMEM (1 << 12)
#define UFFD_FEATURE_WP_UNPOPULATED (1 << 13)
__u64 features;
__u64 ioctls;
};
@ -138,6 +139,7 @@ struct uffdio_writeprotect {
struct uffdio_continue {
struct uffdio_range range;
#define UFFDIO_CONTINUE_MODE_DONTWAKE ((__u64) 1 << 0)
#define UFFDIO_CONTINUE_MODE_WP ((__u64) 1 << 1)
__u64 mode;
__s64 mapped;
};

View file

@ -16,14 +16,4 @@
***
****************************************************************************
****************************************************************************/
#ifndef _UAPI_LINUX_UUID_H_
#define _UAPI_LINUX_UUID_H_
#include <linux/types.h>
typedef struct {
__u8 b[16];
} uuid_le;
#define UUID_LE(a,b,c,d0,d1,d2,d3,d4,d5,d6,d7) \
((uuid_le) \
{ { (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, (b) & 0xff, ((b) >> 8) & 0xff, (c) & 0xff, ((c) >> 8) & 0xff, (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) } })
#define NULL_UUID_LE UUID_LE(0x00000000, 0x0000, 0x0000, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00)
#endif
#include <linux/mei_uuid.h>

View file

@ -115,6 +115,10 @@ struct v4l2_subdev_routing {
__u64 routes;
__u32 reserved[6];
};
#define V4L2_SUBDEV_CLIENT_CAP_STREAMS (1U << 0)
struct v4l2_subdev_client_capability {
__u64 capabilities;
};
#define v4l2_subdev_edid v4l2_edid
#define VIDIOC_SUBDEV_QUERYCAP _IOR('V', 0, struct v4l2_subdev_capability)
#define VIDIOC_SUBDEV_G_FMT _IOWR('V', 4, struct v4l2_subdev_format)
@ -130,6 +134,8 @@ struct v4l2_subdev_routing {
#define VIDIOC_SUBDEV_S_SELECTION _IOWR('V', 62, struct v4l2_subdev_selection)
#define VIDIOC_SUBDEV_G_ROUTING _IOWR('V', 38, struct v4l2_subdev_routing)
#define VIDIOC_SUBDEV_S_ROUTING _IOWR('V', 39, struct v4l2_subdev_routing)
#define VIDIOC_SUBDEV_G_CLIENT_CAP _IOR('V', 101, struct v4l2_subdev_client_capability)
#define VIDIOC_SUBDEV_S_CLIENT_CAP _IOWR('V', 102, struct v4l2_subdev_client_capability)
#define VIDIOC_SUBDEV_G_STD _IOR('V', 23, v4l2_std_id)
#define VIDIOC_SUBDEV_S_STD _IOW('V', 24, v4l2_std_id)
#define VIDIOC_SUBDEV_ENUMSTD _IOWR('V', 25, struct v4l2_standard)

View file

@ -16,8 +16,8 @@
***
****************************************************************************
****************************************************************************/
#define LINUX_VERSION_CODE 393984
#define LINUX_VERSION_CODE 394240
#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + ((c) > 255 ? 255 : (c)))
#define LINUX_VERSION_MAJOR 6
#define LINUX_VERSION_PATCHLEVEL 3
#define LINUX_VERSION_PATCHLEVEL 4
#define LINUX_VERSION_SUBLEVEL 0

View file

@ -247,11 +247,14 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_RGBX1010102 v4l2_fourcc('R', 'X', '3', '0')
#define V4L2_PIX_FMT_RGBA1010102 v4l2_fourcc('R', 'A', '3', '0')
#define V4L2_PIX_FMT_ARGB2101010 v4l2_fourcc('A', 'R', '3', '0')
#define V4L2_PIX_FMT_BGR48_12 v4l2_fourcc('B', '3', '1', '2')
#define V4L2_PIX_FMT_ABGR64_12 v4l2_fourcc('B', '4', '1', '2')
#define V4L2_PIX_FMT_GREY v4l2_fourcc('G', 'R', 'E', 'Y')
#define V4L2_PIX_FMT_Y4 v4l2_fourcc('Y', '0', '4', ' ')
#define V4L2_PIX_FMT_Y6 v4l2_fourcc('Y', '0', '6', ' ')
#define V4L2_PIX_FMT_Y10 v4l2_fourcc('Y', '1', '0', ' ')
#define V4L2_PIX_FMT_Y12 v4l2_fourcc('Y', '1', '2', ' ')
#define V4L2_PIX_FMT_Y012 v4l2_fourcc('Y', '0', '1', '2')
#define V4L2_PIX_FMT_Y14 v4l2_fourcc('Y', '1', '4', ' ')
#define V4L2_PIX_FMT_Y16 v4l2_fourcc('Y', '1', '6', ' ')
#define V4L2_PIX_FMT_Y16_BE v4l2_fourcc_be('Y', '1', '6', ' ')
@ -278,6 +281,7 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_YUVA32 v4l2_fourcc('Y', 'U', 'V', 'A')
#define V4L2_PIX_FMT_YUVX32 v4l2_fourcc('Y', 'U', 'V', 'X')
#define V4L2_PIX_FMT_M420 v4l2_fourcc('M', '4', '2', '0')
#define V4L2_PIX_FMT_YUV48_12 v4l2_fourcc('Y', '3', '1', '2')
#define V4L2_PIX_FMT_Y210 v4l2_fourcc('Y', '2', '1', '0')
#define V4L2_PIX_FMT_Y212 v4l2_fourcc('Y', '2', '1', '2')
#define V4L2_PIX_FMT_Y216 v4l2_fourcc('Y', '2', '1', '6')
@ -288,10 +292,12 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_NV24 v4l2_fourcc('N', 'V', '2', '4')
#define V4L2_PIX_FMT_NV42 v4l2_fourcc('N', 'V', '4', '2')
#define V4L2_PIX_FMT_P010 v4l2_fourcc('P', '0', '1', '0')
#define V4L2_PIX_FMT_P012 v4l2_fourcc('P', '0', '1', '2')
#define V4L2_PIX_FMT_NV12M v4l2_fourcc('N', 'M', '1', '2')
#define V4L2_PIX_FMT_NV21M v4l2_fourcc('N', 'M', '2', '1')
#define V4L2_PIX_FMT_NV16M v4l2_fourcc('N', 'M', '1', '6')
#define V4L2_PIX_FMT_NV61M v4l2_fourcc('N', 'M', '6', '1')
#define V4L2_PIX_FMT_P012M v4l2_fourcc('P', 'M', '1', '2')
#define V4L2_PIX_FMT_YUV410 v4l2_fourcc('Y', 'U', 'V', '9')
#define V4L2_PIX_FMT_YVU410 v4l2_fourcc('Y', 'V', 'U', '9')
#define V4L2_PIX_FMT_YUV411P v4l2_fourcc('4', '1', '1', 'P')
@ -380,6 +386,9 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_FWHT_STATELESS v4l2_fourcc('S', 'F', 'W', 'H')
#define V4L2_PIX_FMT_H264_SLICE v4l2_fourcc('S', '2', '6', '4')
#define V4L2_PIX_FMT_HEVC_SLICE v4l2_fourcc('S', '2', '6', '5')
#define V4L2_PIX_FMT_SPK v4l2_fourcc('S', 'P', 'K', '0')
#define V4L2_PIX_FMT_RV30 v4l2_fourcc('R', 'V', '3', '0')
#define V4L2_PIX_FMT_RV40 v4l2_fourcc('R', 'V', '4', '0')
#define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A')
#define V4L2_PIX_FMT_WNVA v4l2_fourcc('W', 'N', 'V', 'A')
#define V4L2_PIX_FMT_SN9C10X v4l2_fourcc('S', '9', '1', '0')

View file

@ -38,5 +38,6 @@
#define VIRTIO_F_IN_ORDER 35
#define VIRTIO_F_ORDER_PLATFORM 36
#define VIRTIO_F_SR_IOV 37
#define VIRTIO_F_NOTIFICATION_DATA 38
#define VIRTIO_F_RING_RESET 40
#endif

View file

@ -50,6 +50,7 @@
#define VIRTIO_NET_F_GUEST_USO6 55
#define VIRTIO_NET_F_HOST_USO 56
#define VIRTIO_NET_F_HASH_REPORT 57
#define VIRTIO_NET_F_GUEST_HDRLEN 59
#define VIRTIO_NET_F_RSS 60
#define VIRTIO_NET_F_RSC_EXT 61
#define VIRTIO_NET_F_STANDBY 62

View file

@ -60,6 +60,9 @@ struct bnxt_re_cq_resp {
__u32 phase;
__u32 rsvd;
};
struct bnxt_re_resize_cq_req {
__aligned_u64 cq_va;
};
struct bnxt_re_qp_req {
__aligned_u64 qpsva;
__aligned_u64 qprva;

View file

@ -104,6 +104,8 @@ enum {
EFA_QUERY_DEVICE_CAPS_RNR_RETRY = 1 << 1,
EFA_QUERY_DEVICE_CAPS_CQ_NOTIFICATIONS = 1 << 2,
EFA_QUERY_DEVICE_CAPS_CQ_WITH_SGID = 1 << 3,
EFA_QUERY_DEVICE_CAPS_DATA_POLLING_128 = 1 << 4,
EFA_QUERY_DEVICE_CAPS_RDMA_WRITE = 1 << 5,
};
struct efa_ibv_ex_query_device_resp {
__u32 comp_mask;

View file

@ -149,9 +149,9 @@ struct snd_soc_tplg_vendor_array {
__le32 type;
__le32 num_elems;
union {
struct snd_soc_tplg_vendor_uuid_elem uuid[0];
struct snd_soc_tplg_vendor_value_elem value[0];
struct snd_soc_tplg_vendor_string_elem string[0];
__DECLARE_FLEX_ARRAY(struct snd_soc_tplg_vendor_uuid_elem, uuid);
__DECLARE_FLEX_ARRAY(struct snd_soc_tplg_vendor_value_elem, value);
__DECLARE_FLEX_ARRAY(struct snd_soc_tplg_vendor_string_elem, string);
};
} __attribute__((packed));
struct snd_soc_tplg_private {

View file

@ -21,8 +21,6 @@
#ifdef __linux__
#include <linux/types.h>
#endif
#define EMU10K1_CARD_CREATIVE 0x00000000
#define EMU10K1_CARD_EMUAPS 0x00000001
#define EMU10K1_FX8010_PCM_COUNT 8
#define __EMU10K1_DECLARE_BITMAP(name,bits) unsigned long name[(bits) / (sizeof(unsigned long) * 8)]
#define iMAC0 0x00
@ -41,10 +39,29 @@
#define iEXP 0x0d
#define iINTERP 0x0e
#define iSKIP 0x0f
#define LOWORD_OPX_MASK 0x000ffc00
#define LOWORD_OPY_MASK 0x000003ff
#define HIWORD_OPCODE_MASK 0x00f00000
#define HIWORD_RESULT_MASK 0x000ffc00
#define HIWORD_OPA_MASK 0x000003ff
#define A_LOWORD_OPX_MASK 0x007ff000
#define A_LOWORD_OPY_MASK 0x000007ff
#define A_HIWORD_OPCODE_MASK 0x0f000000
#define A_HIWORD_RESULT_MASK 0x007ff000
#define A_HIWORD_OPA_MASK 0x000007ff
#define FXBUS(x) (0x00 + (x))
#define EXTIN(x) (0x10 + (x))
#define EXTOUT(x) (0x20 + (x))
#define FXBUS2(x) (0x30 + (x))
#define A_FXBUS(x) (0x00 + (x))
#define A_EXTIN(x) (0x40 + (x))
#define A_P16VIN(x) (0x50 + (x))
#define A_EXTOUT(x) (0x60 + (x))
#define A_FXBUS2(x) (0x80 + (x))
#define A_EMU32OUTH(x) (0xa0 + (x))
#define A_EMU32OUTL(x) (0xb0 + (x))
#define A3_EMU32IN(x) (0x160 + (x))
#define A3_EMU32OUT(x) (0x1E0 + (x))
#define C_00000000 0x40
#define C_00000001 0x41
#define C_00000002 0x42
@ -73,33 +90,71 @@
#define GPR_NOISE1 0x59
#define GPR_IRQ 0x5a
#define GPR_DBAC 0x5b
#define A_C_00000000 0xc0
#define A_C_00000001 0xc1
#define A_C_00000002 0xc2
#define A_C_00000003 0xc3
#define A_C_00000004 0xc4
#define A_C_00000008 0xc5
#define A_C_00000010 0xc6
#define A_C_00000020 0xc7
#define A_C_00000100 0xc8
#define A_C_00010000 0xc9
#define A_C_00000800 0xca
#define A_C_10000000 0xcb
#define A_C_20000000 0xcc
#define A_C_40000000 0xcd
#define A_C_80000000 0xce
#define A_C_7fffffff 0xcf
#define A_C_ffffffff 0xd0
#define A_C_fffffffe 0xd1
#define A_C_c0000000 0xd2
#define A_C_4f1bbcdc 0xd3
#define A_C_5a7ef9db 0xd4
#define A_C_00100000 0xd5
#define A_GPR_ACCU 0xd6
#define A_GPR_COND 0xd7
#define A_GPR_NOISE0 0xd8
#define A_GPR_NOISE1 0xd9
#define A_GPR_IRQ 0xda
#define A_GPR_DBAC 0xdb
#define A_GPR_DBACE 0xde
#define FXGPREGBASE 0x100
#define A_FXGPREGBASE 0x400
#define A_TANKMEMCTLREGBASE 0x100
#define A_TANKMEMCTLREG_MASK 0x1f
#define TANKMEMDATAREGBASE 0x200
#define TANKMEMDATAREG_MASK 0x000fffff
#define TANKMEMADDRREGBASE 0x300
#define TANKMEMADDRREG_ADDR_MASK 0x000fffff
#define TANKMEMADDRREG_CLEAR 0x00800000
#define TANKMEMADDRREG_ALIGN 0x00400000
#define TANKMEMADDRREG_WRITE 0x00200000
#define TANKMEMADDRREG_READ 0x00100000
#define GPR(x) (FXGPREGBASE + (x))
#define ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x))
#define ETRAM_DATA(x) (TANKMEMDATAREGBASE + 0x80 + (x))
#define ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x))
#define ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x80 + (x))
#define A_GPR(x) (A_FXGPREGBASE + (x))
#define A_ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x))
#define A_ETRAM_DATA(x) (TANKMEMDATAREGBASE + 0xc0 + (x))
#define A_ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x))
#define A_ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0xc0 + (x))
#define A_ITRAM_CTL(x) (A_TANKMEMCTLREGBASE + 0x00 + (x))
#define A_ETRAM_CTL(x) (A_TANKMEMCTLREGBASE + 0xc0 + (x))
#define A_FXBUS(x) (0x00 + (x))
#define A_EXTIN(x) (0x40 + (x))
#define A_P16VIN(x) (0x50 + (x))
#define A_EXTOUT(x) (0x60 + (x))
#define A_FXBUS2(x) (0x80 + (x))
#define A_EMU32OUTH(x) (0xa0 + (x))
#define A_EMU32OUTL(x) (0xb0 + (x))
#define A3_EMU32IN(x) (0x160 + (x))
#define A3_EMU32OUT(x) (0x1E0 + (x))
#define A_GPR(x) (A_FXGPREGBASE + (x))
#define CC_REG_NORMALIZED C_00000001
#define CC_REG_BORROW C_00000002
#define CC_REG_MINUS C_00000004
#define CC_REG_ZERO C_00000008
#define CC_REG_SATURATE C_00000010
#define CC_REG_NONZERO C_00000100
#define A_CC_REG_NORMALIZED A_C_00000001
#define A_CC_REG_BORROW A_C_00000002
#define A_CC_REG_MINUS A_C_00000004
#define A_CC_REG_ZERO A_C_00000008
#define A_CC_REG_SATURATE A_C_00000010
#define A_CC_REG_NONZERO A_C_00000100
#define FXBUS_PCM_LEFT 0x00
#define FXBUS_PCM_RIGHT 0x01
#define FXBUS_PCM_LEFT_REAR 0x02
@ -180,35 +235,6 @@
#define A_EXTOUT_ADC_CAP_L 0x16
#define A_EXTOUT_ADC_CAP_R 0x17
#define A_EXTOUT_MIC_CAP 0x18
#define A_C_00000000 0xc0
#define A_C_00000001 0xc1
#define A_C_00000002 0xc2
#define A_C_00000003 0xc3
#define A_C_00000004 0xc4
#define A_C_00000008 0xc5
#define A_C_00000010 0xc6
#define A_C_00000020 0xc7
#define A_C_00000100 0xc8
#define A_C_00010000 0xc9
#define A_C_00000800 0xca
#define A_C_10000000 0xcb
#define A_C_20000000 0xcc
#define A_C_40000000 0xcd
#define A_C_80000000 0xce
#define A_C_7fffffff 0xcf
#define A_C_ffffffff 0xd0
#define A_C_fffffffe 0xd1
#define A_C_c0000000 0xd2
#define A_C_4f1bbcdc 0xd3
#define A_C_5a7ef9db 0xd4
#define A_C_00100000 0xd5
#define A_GPR_ACCU 0xd6
#define A_GPR_COND 0xd7
#define A_GPR_NOISE0 0xd8
#define A_GPR_NOISE1 0xd9
#define A_GPR_IRQ 0xda
#define A_GPR_DBAC 0xdb
#define A_GPR_DBACE 0xde
#define EMU10K1_DBG_ZC 0x80000000
#define EMU10K1_DBG_SATURATION_OCCURED 0x02000000
#define EMU10K1_DBG_SATURATION_ADDR 0x01ff0000
@ -216,11 +242,13 @@
#define EMU10K1_DBG_STEP 0x00004000
#define EMU10K1_DBG_CONDITION_CODE 0x00003e00
#define EMU10K1_DBG_SINGLE_STEP_ADDR 0x000001ff
#define TANKMEMADDRREG_ADDR_MASK 0x000fffff
#define TANKMEMADDRREG_CLEAR 0x00800000
#define TANKMEMADDRREG_ALIGN 0x00400000
#define TANKMEMADDRREG_WRITE 0x00200000
#define TANKMEMADDRREG_READ 0x00100000
#define A_DBG_ZC 0x40000000
#define A_DBG_SATURATION_OCCURED 0x20000000
#define A_DBG_SATURATION_ADDR 0x0ffc0000
#define A_DBG_SINGLE_STEP 0x00020000
#define A_DBG_STEP 0x00010000
#define A_DBG_CONDITION_CODE 0x0000f800
#define A_DBG_STEP_ADDR 0x000003ff
struct snd_emu10k1_fx8010_info {
unsigned int internal_tram_size;
unsigned int external_tram_size;

View file

@ -47,7 +47,8 @@ enum skl_ch_cfg {
SKL_CH_CFG_DUAL_MONO = 9,
SKL_CH_CFG_I2S_DUAL_STEREO_0 = 10,
SKL_CH_CFG_I2S_DUAL_STEREO_1 = 11,
SKL_CH_CFG_4_CHANNEL = 12,
SKL_CH_CFG_7_1 = 12,
SKL_CH_CFG_4_CHANNEL = SKL_CH_CFG_7_1,
SKL_CH_CFG_INVALID
};
enum skl_module_type {

View file

@ -35,4 +35,5 @@
#define SOF_ABI_VERSION_INCOMPATIBLE(sof_ver,client_ver) (SOF_ABI_VERSION_MAJOR((sof_ver)) != SOF_ABI_VERSION_MAJOR((client_ver)))
#define SOF_ABI_VERSION SOF_ABI_VER(SOF_ABI_MAJOR, SOF_ABI_MINOR, SOF_ABI_PATCH)
#define SOF_ABI_MAGIC 0x00464F53
#define SOF_IPC4_ABI_MAGIC 0x34464F53
#endif

View file

@ -39,6 +39,7 @@
#define SOF_TKN_SCHED_DYNAMIC_PIPELINE 206
#define SOF_TKN_SCHED_LP_MODE 207
#define SOF_TKN_SCHED_MEM_USAGE 208
#define SOF_TKN_SCHED_USE_CHAIN_DMA 209
#define SOF_TKN_VOLUME_RAMP_STEP_TYPE 250
#define SOF_TKN_VOLUME_RAMP_STEP_MS 251
#define SOF_TKN_GAIN_RAMP_TYPE 260
@ -59,10 +60,12 @@
#define SOF_TKN_COMP_CPC 406
#define SOF_TKN_COMP_IS_PAGES 409
#define SOF_TKN_COMP_NUM_AUDIO_FORMATS 410
#define SOF_TKN_COMP_NUM_SINK_PINS 411
#define SOF_TKN_COMP_NUM_SOURCE_PINS 412
#define SOF_TKN_COMP_SINK_PIN_BINDING_WNAME 413
#define SOF_TKN_COMP_SRC_PIN_BINDING_WNAME 414
#define SOF_TKN_COMP_NUM_INPUT_PINS 411
#define SOF_TKN_COMP_NUM_OUTPUT_PINS 412
#define SOF_TKN_COMP_INPUT_PIN_BINDING_WNAME 413
#define SOF_TKN_COMP_OUTPUT_PIN_BINDING_WNAME 414
#define SOF_TKN_COMP_NUM_INPUT_AUDIO_FORMATS 415
#define SOF_TKN_COMP_NUM_OUTPUT_AUDIO_FORMATS 416
#define SOF_TKN_INTEL_SSP_CLKS_CONTROL 500
#define SOF_TKN_INTEL_SSP_MCLK_ID 501
#define SOF_TKN_INTEL_SSP_SAMPLE_BITS 502
@ -107,26 +110,29 @@
#define SOF_TKN_AMD_ACPDMIC_CH 1801
#define SOF_TKN_CAVS_AUDIO_FORMAT_IN_RATE 1900
#define SOF_TKN_CAVS_AUDIO_FORMAT_IN_BIT_DEPTH 1901
#define SOF_TKN_CAVS_AUDIO_FORMAT_IN_VALID_BIT 1902
#define SOF_TKN_CAVS_AUDIO_FORMAT_IN_VALID_BIT_DEPTH 1902
#define SOF_TKN_CAVS_AUDIO_FORMAT_IN_CHANNELS 1903
#define SOF_TKN_CAVS_AUDIO_FORMAT_IN_CH_MAP 1904
#define SOF_TKN_CAVS_AUDIO_FORMAT_IN_CH_CFG 1905
#define SOF_TKN_CAVS_AUDIO_FORMAT_IN_INTERLEAVING_STYLE 1906
#define SOF_TKN_CAVS_AUDIO_FORMAT_IN_FMT_CFG 1907
#define SOF_TKN_CAVS_AUDIO_FORMAT_IN_SAMPLE_TYPE 1908
#define SOF_TKN_CAVS_AUDIO_FORMAT_INPUT_PIN_INDEX 1909
#define SOF_TKN_CAVS_AUDIO_FORMAT_OUT_RATE 1930
#define SOF_TKN_CAVS_AUDIO_FORMAT_OUT_BIT_DEPTH 1931
#define SOF_TKN_CAVS_AUDIO_FORMAT_OUT_VALID_BIT 1932
#define SOF_TKN_CAVS_AUDIO_FORMAT_OUT_VALID_BIT_DEPTH 1932
#define SOF_TKN_CAVS_AUDIO_FORMAT_OUT_CHANNELS 1933
#define SOF_TKN_CAVS_AUDIO_FORMAT_OUT_CH_MAP 1934
#define SOF_TKN_CAVS_AUDIO_FORMAT_OUT_CH_CFG 1935
#define SOF_TKN_CAVS_AUDIO_FORMAT_OUT_INTERLEAVING_STYLE 1936
#define SOF_TKN_CAVS_AUDIO_FORMAT_OUT_FMT_CFG 1937
#define SOF_TKN_CAVS_AUDIO_FORMAT_OUT_SAMPLE_TYPE 1938
#define SOF_TKN_CAVS_AUDIO_FORMAT_OUTPUT_PIN_INDEX 1939
#define SOF_TKN_CAVS_AUDIO_FORMAT_IBS 1970
#define SOF_TKN_CAVS_AUDIO_FORMAT_OBS 1971
#define SOF_TKN_CAVS_AUDIO_FORMAT_DMA_BUFFER_SIZE 1972
#define SOF_TKN_INTEL_COPIER_NODE_TYPE 1980
#define SOF_TKN_INTEL_COPIER_DEEP_BUFFER_DMA_MS 1981
#define SOF_TKN_AMD_ACPI2S_RATE 1700
#define SOF_TKN_AMD_ACPI2S_CH 1701
#define SOF_TKN_AMD_ACPI2S_TDM_MODE 1702