Merge "Clean up the math headers."

This commit is contained in:
Elliott Hughes 2020-02-12 00:56:48 +00:00 committed by Gerrit Code Review
commit 419ffcd827
6 changed files with 52 additions and 399 deletions

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@ -1,43 +0,0 @@
/*
* Copyright (C) 2018 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#pragma once
/**
* @file legacy_fenv_inlines_mips.h
* @brief Inline MIPS-specific definitions of fenv for old API levels.
*/
#include <sys/cdefs.h>
#if __ANDROID_API__ < 21 && (defined(__mips__) && !defined(__LP64__))
#define __BIONIC_FENV_INLINE static __inline
#include <bits/fenv_inlines_mips.h>
#endif

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@ -1,171 +0,0 @@
/*-
* Copyright (c) 2004 David Schultz <das@FreeBSD.ORG>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: src/lib/msun/mips/fenv.c,v 1.1 2008/04/26 12:20:29 imp Exp $
*/
#pragma once
#include <sys/cdefs.h>
#if defined(__mips__)
#if !defined(__BIONIC_FENV_INLINE)
#define __BIONIC_FENV_INLINE static __inline
#endif
#include <bits/fenv_mips.h>
__BEGIN_DECLS
#define FCSR_CAUSE_SHIFT 10
#define FCSR_ENABLE_SHIFT 5
#define FCSR_ENABLE_MASK (FE_ALL_EXCEPT << FCSR_ENABLE_SHIFT)
#define FCSR_RMASK 0x3
__BIONIC_FENV_INLINE int fegetenv(fenv_t* __envp) {
fenv_t _fcsr = 0;
#ifdef __mips_hard_float
__asm__ __volatile__("cfc1 %0,$31" : "=r" (_fcsr));
#endif
*__envp = _fcsr;
return 0;
}
__BIONIC_FENV_INLINE int fesetenv(const fenv_t* __envp) {
fenv_t _fcsr = *__envp;
#ifdef __mips_hard_float
__asm__ __volatile__("ctc1 %0,$31" : : "r" (_fcsr));
#endif
return 0;
}
__BIONIC_FENV_INLINE int feclearexcept(int __excepts) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
__excepts &= FE_ALL_EXCEPT;
__fcsr &= ~(__excepts | (__excepts << FCSR_CAUSE_SHIFT));
fesetenv(&__fcsr);
return 0;
}
__BIONIC_FENV_INLINE int fegetexceptflag(fexcept_t* __flagp, int __excepts) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
*__flagp = __fcsr & __excepts & FE_ALL_EXCEPT;
return 0;
}
__BIONIC_FENV_INLINE int fesetexceptflag(const fexcept_t* __flagp, int __excepts) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
/* Ensure that flags are all legal */
__excepts &= FE_ALL_EXCEPT;
__fcsr &= ~__excepts;
__fcsr |= *__flagp & __excepts;
fesetenv(&__fcsr);
return 0;
}
__BIONIC_FENV_INLINE int feraiseexcept(int __excepts) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
/* Ensure that flags are all legal */
__excepts &= FE_ALL_EXCEPT;
/* Cause bit needs to be set as well for generating the exception*/
__fcsr |= __excepts | (__excepts << FCSR_CAUSE_SHIFT);
fesetenv(&__fcsr);
return 0;
}
__BIONIC_FENV_INLINE int fetestexcept(int __excepts) {
fexcept_t __FCSR;
fegetenv(&__FCSR);
return (__FCSR & __excepts & FE_ALL_EXCEPT);
}
__BIONIC_FENV_INLINE int fegetround(void) {
fenv_t _fcsr;
fegetenv(&_fcsr);
return (_fcsr & FCSR_RMASK);
}
__BIONIC_FENV_INLINE int fesetround(int __round) {
fenv_t _fcsr;
fegetenv(&_fcsr);
_fcsr &= ~FCSR_RMASK;
_fcsr |= (__round & FCSR_RMASK);
fesetenv(&_fcsr);
return 0;
}
__BIONIC_FENV_INLINE int feholdexcept(fenv_t* __envp) {
fenv_t __env;
fegetenv(&__env);
*__envp = __env;
__env &= ~(FE_ALL_EXCEPT | FCSR_ENABLE_MASK);
fesetenv(&__env);
return 0;
}
__BIONIC_FENV_INLINE int feupdateenv(const fenv_t* __envp) {
fexcept_t __fcsr;
fegetenv(&__fcsr);
fesetenv(__envp);
feraiseexcept(__fcsr & FE_ALL_EXCEPT);
return 0;
}
__BIONIC_FENV_INLINE int feenableexcept(int __mask) {
fenv_t __old_fcsr, __new_fcsr;
fegetenv(&__old_fcsr);
__new_fcsr = __old_fcsr | (__mask & FE_ALL_EXCEPT) << FCSR_ENABLE_SHIFT;
fesetenv(&__new_fcsr);
return ((__old_fcsr >> FCSR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
__BIONIC_FENV_INLINE int fedisableexcept(int __mask) {
fenv_t __old_fcsr, __new_fcsr;
fegetenv(&__old_fcsr);
__new_fcsr = __old_fcsr & ~((__mask & FE_ALL_EXCEPT) << FCSR_ENABLE_SHIFT);
fesetenv(&__new_fcsr);
return ((__old_fcsr >> FCSR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
}
__BIONIC_FENV_INLINE int fegetexcept(void) {
fenv_t __fcsr;
fegetenv(&__fcsr);
return ((__fcsr & FCSR_ENABLE_MASK) >> FCSR_ENABLE_SHIFT);
}
#undef FCSR_CAUSE_SHIFT
#undef FCSR_ENABLE_SHIFT
#undef FCSR_ENABLE_MASK
#undef FCSR_RMASK
__END_DECLS
#endif

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@ -1,95 +0,0 @@
/*-
* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD: src/lib/msun/arm/fenv.h,v 1.5 2005/03/16 19:03:45 das Exp $
*/
/*
Rewritten for Android.
*/
/* MIPS FPU floating point control register bits.
*
* 31-25 -> floating point conditions code bits set by FP compare
* instructions
* 24 -> flush denormalized results to zero instead of
* causing unimplemented operation exception.
* 23 -> Condition bit
* 22 -> In conjunction with FS detects denormalized
* operands and replaces them internally with 0.
* 21 -> In conjunction with FS forces denormalized operands
* to the closest normalized value.
* 20-18 -> reserved (read as 0, write with 0)
* 17 -> cause bit for unimplemented operation
* 16 -> cause bit for invalid exception
* 15 -> cause bit for division by zero exception
* 14 -> cause bit for overflow exception
* 13 -> cause bit for underflow exception
* 12 -> cause bit for inexact exception
* 11 -> enable exception for invalid exception
* 10 -> enable exception for division by zero exception
* 9 -> enable exception for overflow exception
* 8 -> enable exception for underflow exception
* 7 -> enable exception for inexact exception
* 6 -> flag invalid exception
* 5 -> flag division by zero exception
* 4 -> flag overflow exception
* 3 -> flag underflow exception
* 2 -> flag inexact exception
* 1-0 -> rounding control
*
*
* Rounding Control:
* 00 - rounding to nearest (RN)
* 01 - rounding toward zero (RZ)
* 10 - rounding (up) toward plus infinity (RP)
* 11 - rounding (down)toward minus infinity (RM)
*/
#pragma once
#include <sys/types.h>
__BEGIN_DECLS
typedef __uint32_t fenv_t;
typedef __uint32_t fexcept_t;
/* Exception flags */
#define FE_INVALID 0x40
#define FE_DIVBYZERO 0x20
#define FE_OVERFLOW 0x10
#define FE_UNDERFLOW 0x08
#define FE_INEXACT 0x04
#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \
FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
/* Rounding modes */
#define FE_TONEAREST 0x0000
#define FE_TOWARDZERO 0x0001
#define FE_UPWARD 0x0002
#define FE_DOWNWARD 0x0003
__END_DECLS

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@ -35,8 +35,6 @@
#include <bits/fenv_arm.h>
#elif defined(__i386__)
#include <bits/fenv_x86.h>
#elif defined(__mips__)
#include <bits/fenv_mips.h>
#elif defined(__x86_64__)
#include <bits/fenv_x86_64.h>
#endif
@ -45,25 +43,25 @@ __BEGIN_DECLS
// fenv was always available on x86.
#if __ANDROID_API__ >= 21 || defined(__i386__)
int feclearexcept(int __exceptions) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_MIPS(21) __INTRODUCED_IN_X86(9);
int fegetexceptflag(fexcept_t* __flag_ptr, int __exceptions) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_MIPS(21) __INTRODUCED_IN_X86(9);
int feraiseexcept(int __exceptions) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_MIPS(21) __INTRODUCED_IN_X86(9);
int fesetexceptflag(const fexcept_t* __flag_ptr, int __exceptions) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_MIPS(21) __INTRODUCED_IN_X86(9);
int fetestexcept(int __exceptions) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_MIPS(21) __INTRODUCED_IN_X86(9);
int feclearexcept(int __exceptions) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_X86(9);
int fegetexceptflag(fexcept_t* __flag_ptr, int __exceptions) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_X86(9);
int feraiseexcept(int __exceptions) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_X86(9);
int fesetexceptflag(const fexcept_t* __flag_ptr, int __exceptions) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_X86(9);
int fetestexcept(int __exceptions) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_X86(9);
int fegetround(void) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_MIPS(21) __INTRODUCED_IN_X86(9);
int fesetround(int __rounding_mode) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_MIPS(21) __INTRODUCED_IN_X86(9);
int fegetround(void) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_X86(9);
int fesetround(int __rounding_mode) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_X86(9);
int fegetenv(fenv_t* __env) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_MIPS(21) __INTRODUCED_IN_X86(9);
int feholdexcept(fenv_t* __env) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_MIPS(21) __INTRODUCED_IN_X86(9);
int fesetenv(const fenv_t* __env) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_MIPS(21) __INTRODUCED_IN_X86(9);
int feupdateenv(const fenv_t* __env) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_MIPS(21) __INTRODUCED_IN_X86(9);
int fegetenv(fenv_t* __env) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_X86(9);
int feholdexcept(fenv_t* __env) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_X86(9);
int fesetenv(const fenv_t* __env) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_X86(9);
int feupdateenv(const fenv_t* __env) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_X86(9);
int feenableexcept(int __exceptions) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_MIPS(21) __INTRODUCED_IN_X86(9);
int fedisableexcept(int __exceptions) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_MIPS(21) __INTRODUCED_IN_X86(9);
int fegetexcept(void) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_MIPS(21) __INTRODUCED_IN_X86(9);
int feenableexcept(int __exceptions) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_X86(9);
int fedisableexcept(int __exceptions) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_X86(9);
int fegetexcept(void) __INTRODUCED_IN_ARM(21) __INTRODUCED_IN_X86(9);
#else
/* Defined as inlines for pre-21 ARM and MIPS. */
/* Defined as inlines for pre-21 ARM. */
#endif
/*
@ -81,6 +79,4 @@ __END_DECLS
#if defined(__arm__)
#include <android/legacy_fenv_inlines_arm.h>
#elif defined(__mips__)
#include <android/legacy_fenv_inlines_mips.h>
#endif

View file

@ -27,7 +27,7 @@ LIBC {
atanl; # introduced=21
cabs; # introduced=23
cabsf; # introduced=23
cabsl; # introduced-arm=21 introduced-arm64=23 introduced-mips=21 introduced-mips64=23 introduced-x86=21 introduced-x86_64=23
cabsl; # introduced-arm=21 introduced-arm64=23 introduced-x86=21 introduced-x86_64=23
cacos; # introduced=23
cacosf; # introduced=23
cacosh; # introduced=23
@ -72,7 +72,7 @@ LIBC {
cosl; # introduced=21
cproj; # introduced=23
cprojf; # introduced=23
cprojl; # introduced-arm=21 introduced-arm64=23 introduced-mips=21 introduced-mips64=23 introduced-x86=21 introduced-x86_64=23
cprojl; # introduced-arm=21 introduced-arm64=23 introduced-x86=21 introduced-x86_64=23
creal; # introduced=23
crealf; # introduced=23
creall; # introduced=23
@ -82,7 +82,7 @@ LIBC {
csinhf; # introduced=23
csqrt; # introduced=23
csqrtf; # introduced=23
csqrtl; # introduced-arm=21 introduced-arm64=23 introduced-mips=21 introduced-mips64=23 introduced-x86=21 introduced-x86_64=23
csqrtl; # introduced-arm=21 introduced-arm64=23 introduced-x86=21 introduced-x86_64=23
ctan; # introduced=23
ctanf; # introduced=23
ctanh; # introduced=23
@ -110,20 +110,20 @@ LIBC {
fdim;
fdimf;
fdiml;
feclearexcept; # introduced-arm=21 introduced-arm64=21 introduced-mips=21 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
fedisableexcept; # introduced-arm=21 introduced-arm64=21 introduced-mips=21 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
feenableexcept; # introduced-arm=21 introduced-arm64=21 introduced-mips=21 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
fegetenv; # introduced-arm=21 introduced-arm64=21 introduced-mips=21 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
fegetexcept; # introduced-arm=21 introduced-arm64=21 introduced-mips=21 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
fegetexceptflag; # introduced-arm=21 introduced-arm64=21 introduced-mips=21 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
fegetround; # introduced-arm=21 introduced-arm64=21 introduced-mips=21 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
feholdexcept; # introduced-arm=21 introduced-arm64=21 introduced-mips=21 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
feraiseexcept; # introduced-arm=21 introduced-arm64=21 introduced-mips=21 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
fesetenv; # introduced-arm=21 introduced-arm64=21 introduced-mips=21 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
fesetexceptflag; # introduced-arm=21 introduced-arm64=21 introduced-mips=21 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
fesetround; # introduced-arm=21 introduced-arm64=21 introduced-mips=21 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
fetestexcept; # introduced-arm=21 introduced-arm64=21 introduced-mips=21 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
feupdateenv; # introduced-arm=21 introduced-arm64=21 introduced-mips=21 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
feclearexcept; # introduced-arm=21 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
fedisableexcept; # introduced-arm=21 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
feenableexcept; # introduced-arm=21 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
fegetenv; # introduced-arm=21 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
fegetexcept; # introduced-arm=21 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
fegetexceptflag; # introduced-arm=21 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
fegetround; # introduced-arm=21 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
feholdexcept; # introduced-arm=21 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
feraiseexcept; # introduced-arm=21 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
fesetenv; # introduced-arm=21 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
fesetexceptflag; # introduced-arm=21 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
fesetround; # introduced-arm=21 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
fetestexcept; # introduced-arm=21 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
feupdateenv; # introduced-arm=21 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
finite;
finitef;
floor;
@ -181,12 +181,12 @@ LIBC {
log1p;
log1pf;
log1pl; # introduced=21
log2; # introduced-arm=18 introduced-arm64=21 introduced-mips=18 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
log2f; # introduced-arm=18 introduced-arm64=21 introduced-mips=18 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
log2l; # introduced-arm=18 introduced-arm64=21 introduced-mips=18 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
log2; # introduced-arm=18 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
log2f; # introduced-arm=18 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
log2l; # introduced-arm=18 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
logb;
logbf;
logbl; # introduced-arm=18 introduced-arm64=21 introduced-mips=18 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
logbl; # introduced-arm=18 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
logf;
logl; # introduced=21
lrint;
@ -198,18 +198,18 @@ LIBC {
modf;
modff;
modfl; # introduced=21
nan; # introduced-arm=13 introduced-arm64=21 introduced-mips=13 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
nanf; # introduced-arm=13 introduced-arm64=21 introduced-mips=13 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
nanl; # introduced-arm=13 introduced-arm64=21 introduced-mips=13 introduced-mips64=21 introduced-x86=13 introduced-x86_64=21
nan; # introduced-arm=13 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
nanf; # introduced-arm=13 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
nanl; # introduced-arm=13 introduced-arm64=21 introduced-x86=13 introduced-x86_64=21
nearbyint;
nearbyintf;
nearbyintl; # introduced=21
nextafter;
nextafterf;
nextafterl; # introduced=21
nexttoward; # introduced-arm=18 introduced-arm64=21 introduced-mips=18 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
nexttoward; # introduced-arm=18 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
nexttowardf;
nexttowardl; # introduced-arm=18 introduced-arm64=21 introduced-mips=18 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
nexttowardl; # introduced-arm=18 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
pow;
powf;
powl; # introduced=21
@ -227,9 +227,9 @@ LIBC {
roundl;
scalb;
scalbf;
scalbln; # introduced-arm=9 introduced-arm64=21 introduced-mips=9 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
scalblnf; # introduced-arm=9 introduced-arm64=21 introduced-mips=9 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
scalblnl; # introduced-arm=9 introduced-arm64=21 introduced-mips=9 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
scalbln; # introduced-arm=9 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
scalblnf; # introduced-arm=9 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
scalblnl; # introduced-arm=9 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
scalbn;
scalbnf;
scalbnl;
@ -256,7 +256,7 @@ LIBC {
tanhl; # introduced=21
tanl; # introduced=21
tgamma;
tgammaf; # introduced-arm=13 introduced-arm64=21 introduced-mips=13 introduced-mips64=21 introduced-x86=9 introduced-x86_64=21
tgammaf; # introduced-arm=13 introduced-arm64=21 introduced-x86=9 introduced-x86_64=21
tgammal; # introduced=21
trunc;
truncf;
@ -294,16 +294,16 @@ LIBC_O { # introduced=O
ctanl;
} LIBC;
LIBC_DEPRECATED { # arm mips platform-only
global: # arm mips
LIBC_DEPRECATED { # arm platform-only
global: # arm
__aeabi_d2lz; # arm
__aeabi_d2ulz; # arm
__aeabi_f2lz; # arm
__aeabi_f2ulz; # arm
__aeabi_l2d; # arm
__fixdfdi; # arm mips
__fixsfdi; # arm mips
__fixunsdfdi; # arm mips
__fixunssfdi; # arm mips
__fixdfdi; # arm
__fixsfdi; # arm
__fixunsdfdi; # arm
__fixunssfdi; # arm
__floatdidf; # arm
} LIBC_O; # arm mips
} LIBC_O; # arm

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@ -1,34 +0,0 @@
/*
* Copyright (C) 2018 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <fenv.h>
#define __BIONIC_FENV_INLINE /* Out of line. */
#include <bits/fenv_inlines_mips.h>
const fenv_t __fe_dfl_env = 0;