Merge "Update to v6.9 kernel headers." into main am: b9279b62c2 am: 02f33c7090

Original change: https://android-review.googlesource.com/c/platform/bionic/+/3111723

Change-Id: I2ced174692ff326e3c31c0472aaadf910c572d04
Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
This commit is contained in:
Christopher Ferris 2024-06-04 18:58:43 +00:00 committed by Automerger Merge Worker
commit 9ebb86ac26
64 changed files with 829 additions and 654 deletions

View file

@ -86,4 +86,19 @@
#define HWCAP2_SVE_B16B16 (1UL << 45) #define HWCAP2_SVE_B16B16 (1UL << 45)
#define HWCAP2_LRCPC3 (1UL << 46) #define HWCAP2_LRCPC3 (1UL << 46)
#define HWCAP2_LSE128 (1UL << 47) #define HWCAP2_LSE128 (1UL << 47)
#define HWCAP2_FPMR (1UL << 48)
#define HWCAP2_LUT (1UL << 49)
#define HWCAP2_FAMINMAX (1UL << 50)
#define HWCAP2_F8CVT (1UL << 51)
#define HWCAP2_F8FMA (1UL << 52)
#define HWCAP2_F8DP4 (1UL << 53)
#define HWCAP2_F8DP2 (1UL << 54)
#define HWCAP2_F8E4M3 (1UL << 55)
#define HWCAP2_F8E5M2 (1UL << 56)
#define HWCAP2_SME_LUTV2 (1UL << 57)
#define HWCAP2_SME_F8F16 (1UL << 58)
#define HWCAP2_SME_F8F32 (1UL << 59)
#define HWCAP2_SME_SF8FMA (1UL << 60)
#define HWCAP2_SME_SF8DP4 (1UL << 61)
#define HWCAP2_SME_SF8DP2 (1UL << 62)
#endif #endif

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@ -18,9 +18,7 @@
#include <linux/types.h> #include <linux/types.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
#include <asm/sve_context.h> #include <asm/sve_context.h>
#define __KVM_HAVE_GUEST_DEBUG
#define __KVM_HAVE_IRQ_LINE #define __KVM_HAVE_IRQ_LINE
#define __KVM_HAVE_READONLY_MEM
#define __KVM_HAVE_VCPU_EVENTS #define __KVM_HAVE_VCPU_EVENTS
#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1
#define KVM_DIRTY_LOG_PAGE_OFFSET 64 #define KVM_DIRTY_LOG_PAGE_OFFSET 64
@ -40,9 +38,9 @@ struct kvm_regs {
#define KVM_ARM_TARGET_GENERIC_V8 5 #define KVM_ARM_TARGET_GENERIC_V8 5
#define KVM_ARM_NUM_TARGETS 6 #define KVM_ARM_NUM_TARGETS 6
#define KVM_ARM_DEVICE_TYPE_SHIFT 0 #define KVM_ARM_DEVICE_TYPE_SHIFT 0
#define KVM_ARM_DEVICE_TYPE_MASK GENMASK(KVM_ARM_DEVICE_TYPE_SHIFT + 15, KVM_ARM_DEVICE_TYPE_SHIFT) #define KVM_ARM_DEVICE_TYPE_MASK __GENMASK(KVM_ARM_DEVICE_TYPE_SHIFT + 15, KVM_ARM_DEVICE_TYPE_SHIFT)
#define KVM_ARM_DEVICE_ID_SHIFT 16 #define KVM_ARM_DEVICE_ID_SHIFT 16
#define KVM_ARM_DEVICE_ID_MASK GENMASK(KVM_ARM_DEVICE_ID_SHIFT + 15, KVM_ARM_DEVICE_ID_SHIFT) #define KVM_ARM_DEVICE_ID_MASK __GENMASK(KVM_ARM_DEVICE_ID_SHIFT + 15, KVM_ARM_DEVICE_ID_SHIFT)
#define KVM_ARM_DEVICE_VGIC_V2 0 #define KVM_ARM_DEVICE_VGIC_V2 0
#define KVM_VGIC_V2_ADDR_TYPE_DIST 0 #define KVM_VGIC_V2_ADDR_TYPE_DIST 0
#define KVM_VGIC_V2_ADDR_TYPE_CPU 1 #define KVM_VGIC_V2_ADDR_TYPE_CPU 1
@ -89,6 +87,9 @@ struct kvm_debug_exit_arch {
struct kvm_sync_regs { struct kvm_sync_regs {
__u64 device_irq_level; __u64 device_irq_level;
}; };
#define KVM_ARM_DEV_EL1_VTIMER (1 << 0)
#define KVM_ARM_DEV_EL1_PTIMER (1 << 1)
#define KVM_ARM_DEV_PMU (1 << 2)
struct kvm_pmu_event_filter { struct kvm_pmu_event_filter {
__u16 base_event; __u16 base_event;
__u16 nevents; __u16 nevents;

View file

@ -52,6 +52,11 @@ struct tpidr2_context {
struct _aarch64_ctx head; struct _aarch64_ctx head;
__u64 tpidr2; __u64 tpidr2;
}; };
#define FPMR_MAGIC 0x46504d52
struct fpmr_context {
struct _aarch64_ctx head;
__u64 fpmr;
};
#define ZA_MAGIC 0x54366345 #define ZA_MAGIC 0x54366345
struct za_context { struct za_context {
struct _aarch64_ctx head; struct _aarch64_ctx head;

View file

@ -13,4 +13,7 @@
#define __BITS_PER_LONG 32 #define __BITS_PER_LONG 32
#endif #endif
#endif #endif
#ifndef __BITS_PER_LONG_LONG
#define __BITS_PER_LONG_LONG 64
#endif
#endif #endif

View file

@ -15,6 +15,6 @@
#define AT_L2_CACHEGEOMETRY 45 #define AT_L2_CACHEGEOMETRY 45
#define AT_L3_CACHESIZE 46 #define AT_L3_CACHESIZE 46
#define AT_L3_CACHEGEOMETRY 47 #define AT_L3_CACHEGEOMETRY 47
#define AT_VECTOR_SIZE_ARCH 9 #define AT_VECTOR_SIZE_ARCH 10
#define AT_MINSIGSTKSZ 51 #define AT_MINSIGSTKSZ 51
#endif #endif

View file

@ -48,7 +48,7 @@ struct riscv_hwprobe {
#define RISCV_HWPROBE_EXT_ZFHMIN (1 << 28) #define RISCV_HWPROBE_EXT_ZFHMIN (1 << 28)
#define RISCV_HWPROBE_EXT_ZIHINTNTL (1 << 29) #define RISCV_HWPROBE_EXT_ZIHINTNTL (1 << 29)
#define RISCV_HWPROBE_EXT_ZVFH (1 << 30) #define RISCV_HWPROBE_EXT_ZVFH (1 << 30)
#define RISCV_HWPROBE_EXT_ZVFHMIN (1 << 31) #define RISCV_HWPROBE_EXT_ZVFHMIN (1ULL << 31)
#define RISCV_HWPROBE_EXT_ZFA (1ULL << 32) #define RISCV_HWPROBE_EXT_ZFA (1ULL << 32)
#define RISCV_HWPROBE_EXT_ZTSO (1ULL << 33) #define RISCV_HWPROBE_EXT_ZTSO (1ULL << 33)
#define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34) #define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34)

View file

@ -11,7 +11,6 @@
#include <asm/bitsperlong.h> #include <asm/bitsperlong.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
#define __KVM_HAVE_IRQ_LINE #define __KVM_HAVE_IRQ_LINE
#define __KVM_HAVE_READONLY_MEM
#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1
#define KVM_INTERRUPT_SET - 1U #define KVM_INTERRUPT_SET - 1U
#define KVM_INTERRUPT_UNSET - 2U #define KVM_INTERRUPT_UNSET - 2U
@ -126,6 +125,8 @@ enum KVM_RISCV_ISA_EXT_ID {
KVM_RISCV_ISA_EXT_ZVFH, KVM_RISCV_ISA_EXT_ZVFH,
KVM_RISCV_ISA_EXT_ZVFHMIN, KVM_RISCV_ISA_EXT_ZVFHMIN,
KVM_RISCV_ISA_EXT_ZFA, KVM_RISCV_ISA_EXT_ZFA,
KVM_RISCV_ISA_EXT_ZTSO,
KVM_RISCV_ISA_EXT_ZACAS,
KVM_RISCV_ISA_EXT_MAX, KVM_RISCV_ISA_EXT_MAX,
}; };
enum KVM_RISCV_SBI_EXT_ID { enum KVM_RISCV_SBI_EXT_ID {

View file

@ -6,19 +6,7 @@
*/ */
#ifndef _ASM_X86_BOOTPARAM_H #ifndef _ASM_X86_BOOTPARAM_H
#define _ASM_X86_BOOTPARAM_H #define _ASM_X86_BOOTPARAM_H
#define SETUP_NONE 0 #include <asm/setup_data.h>
#define SETUP_E820_EXT 1
#define SETUP_DTB 2
#define SETUP_PCI 3
#define SETUP_EFI 4
#define SETUP_APPLE_PROPERTIES 5
#define SETUP_JAILHOUSE 6
#define SETUP_CC_BLOB 7
#define SETUP_IMA 8
#define SETUP_RNG_SEED 9
#define SETUP_ENUM_MAX SETUP_RNG_SEED
#define SETUP_INDIRECT (1 << 31)
#define SETUP_TYPE_MAX (SETUP_ENUM_MAX | SETUP_INDIRECT)
#define RAMDISK_IMAGE_START_MASK 0x07FF #define RAMDISK_IMAGE_START_MASK 0x07FF
#define RAMDISK_PROMPT_FLAG 0x8000 #define RAMDISK_PROMPT_FLAG 0x8000
#define RAMDISK_LOAD_FLAG 0x4000 #define RAMDISK_LOAD_FLAG 0x4000
@ -34,6 +22,7 @@
#define XLF_EFI_KEXEC (1 << 4) #define XLF_EFI_KEXEC (1 << 4)
#define XLF_5LEVEL (1 << 5) #define XLF_5LEVEL (1 << 5)
#define XLF_5LEVEL_ENABLED (1 << 6) #define XLF_5LEVEL_ENABLED (1 << 6)
#define XLF_MEM_ENCRYPTION (1 << 7)
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#include <linux/types.h> #include <linux/types.h>
#include <linux/screen_info.h> #include <linux/screen_info.h>
@ -41,18 +30,6 @@
#include <linux/edd.h> #include <linux/edd.h>
#include <asm/ist.h> #include <asm/ist.h>
#include <video/edid.h> #include <video/edid.h>
struct setup_data {
__u64 next;
__u32 type;
__u32 len;
__u8 data[];
};
struct setup_indirect {
__u32 type;
__u32 reserved;
__u64 len;
__u64 addr;
};
struct setup_header { struct setup_header {
__u8 setup_sects; __u8 setup_sects;
__u16 root_flags; __u16 root_flags;
@ -115,34 +92,7 @@ struct efi_info {
__u32 efi_memmap_hi; __u32 efi_memmap_hi;
}; };
#define E820_MAX_ENTRIES_ZEROPAGE 128 #define E820_MAX_ENTRIES_ZEROPAGE 128
struct boot_e820_entry {
__u64 addr;
__u64 size;
__u32 type;
} __attribute__((packed));
#define JAILHOUSE_SETUP_REQUIRED_VERSION 1 #define JAILHOUSE_SETUP_REQUIRED_VERSION 1
struct jailhouse_setup_data {
struct {
__u16 version;
__u16 compatible_version;
} __attribute__((packed)) hdr;
struct {
__u16 pm_timer_address;
__u16 num_cpus;
__u64 pci_mmconfig_base;
__u32 tsc_khz;
__u32 apic_khz;
__u8 standard_ioapic;
__u8 cpu_ids[255];
} __attribute__((packed)) v1;
struct {
__u32 flags;
} __attribute__((packed)) v2;
} __attribute__((packed));
struct ima_setup_data {
__u64 addr;
__u64 size;
} __attribute__((packed));
struct boot_params { struct boot_params {
struct screen_info screen_info; struct screen_info screen_info;
struct apm_bios_info apm_bios_info; struct apm_bios_info apm_bios_info;

View file

@ -6,6 +6,8 @@
*/ */
#ifndef _ASM_X86_KVM_H #ifndef _ASM_X86_KVM_H
#define _ASM_X86_KVM_H #define _ASM_X86_KVM_H
#include <linux/const.h>
#include <linux/bits.h>
#include <linux/types.h> #include <linux/types.h>
#include <linux/ioctl.h> #include <linux/ioctl.h>
#include <linux/stddef.h> #include <linux/stddef.h>
@ -35,7 +37,6 @@
#define __KVM_HAVE_IRQ_LINE #define __KVM_HAVE_IRQ_LINE
#define __KVM_HAVE_MSI #define __KVM_HAVE_MSI
#define __KVM_HAVE_USER_NMI #define __KVM_HAVE_USER_NMI
#define __KVM_HAVE_GUEST_DEBUG
#define __KVM_HAVE_MSIX #define __KVM_HAVE_MSIX
#define __KVM_HAVE_MCE #define __KVM_HAVE_MCE
#define __KVM_HAVE_PIT_STATE2 #define __KVM_HAVE_PIT_STATE2
@ -44,7 +45,6 @@
#define __KVM_HAVE_DEBUGREGS #define __KVM_HAVE_DEBUGREGS
#define __KVM_HAVE_XSAVE #define __KVM_HAVE_XSAVE
#define __KVM_HAVE_XCRS #define __KVM_HAVE_XCRS
#define __KVM_HAVE_READONLY_MEM
#define KVM_NR_INTERRUPTS 256 #define KVM_NR_INTERRUPTS 256
struct kvm_pic_state { struct kvm_pic_state {
__u8 last_irr; __u8 last_irr;
@ -398,17 +398,260 @@ struct kvm_pmu_event_filter {
}; };
#define KVM_PMU_EVENT_ALLOW 0 #define KVM_PMU_EVENT_ALLOW 0
#define KVM_PMU_EVENT_DENY 1 #define KVM_PMU_EVENT_DENY 1
#define KVM_PMU_EVENT_FLAG_MASKED_EVENTS BIT(0) #define KVM_PMU_EVENT_FLAG_MASKED_EVENTS _BITUL(0)
#define KVM_PMU_EVENT_FLAGS_VALID_MASK (KVM_PMU_EVENT_FLAG_MASKED_EVENTS) #define KVM_PMU_EVENT_FLAGS_VALID_MASK (KVM_PMU_EVENT_FLAG_MASKED_EVENTS)
struct kvm_x86_mce {
__u64 status;
__u64 addr;
__u64 misc;
__u64 mcg_status;
__u8 bank;
__u8 pad1[7];
__u64 pad2[3];
};
#define KVM_XEN_HVM_CONFIG_HYPERCALL_MSR (1 << 0)
#define KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL (1 << 1)
#define KVM_XEN_HVM_CONFIG_SHARED_INFO (1 << 2)
#define KVM_XEN_HVM_CONFIG_RUNSTATE (1 << 3)
#define KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL (1 << 4)
#define KVM_XEN_HVM_CONFIG_EVTCHN_SEND (1 << 5)
#define KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG (1 << 6)
#define KVM_XEN_HVM_CONFIG_PVCLOCK_TSC_UNSTABLE (1 << 7)
#define KVM_XEN_HVM_CONFIG_SHARED_INFO_HVA (1 << 8)
struct kvm_xen_hvm_config {
__u32 flags;
__u32 msr;
__u64 blob_addr_32;
__u64 blob_addr_64;
__u8 blob_size_32;
__u8 blob_size_64;
__u8 pad2[30];
};
struct kvm_xen_hvm_attr {
__u16 type;
__u16 pad[3];
union {
__u8 long_mode;
__u8 vector;
__u8 runstate_update_flag;
union {
__u64 gfn;
#define KVM_XEN_INVALID_GFN ((__u64) - 1)
__u64 hva;
} shared_info;
struct {
__u32 send_port;
__u32 type;
__u32 flags;
#define KVM_XEN_EVTCHN_DEASSIGN (1 << 0)
#define KVM_XEN_EVTCHN_UPDATE (1 << 1)
#define KVM_XEN_EVTCHN_RESET (1 << 2)
union {
struct {
__u32 port;
__u32 vcpu;
__u32 priority;
} port;
struct {
__u32 port;
__s32 fd;
} eventfd;
__u32 padding[4];
} deliver;
} evtchn;
__u32 xen_version;
__u64 pad[8];
} u;
};
#define KVM_XEN_ATTR_TYPE_LONG_MODE 0x0
#define KVM_XEN_ATTR_TYPE_SHARED_INFO 0x1
#define KVM_XEN_ATTR_TYPE_UPCALL_VECTOR 0x2
#define KVM_XEN_ATTR_TYPE_EVTCHN 0x3
#define KVM_XEN_ATTR_TYPE_XEN_VERSION 0x4
#define KVM_XEN_ATTR_TYPE_RUNSTATE_UPDATE_FLAG 0x5
#define KVM_XEN_ATTR_TYPE_SHARED_INFO_HVA 0x6
struct kvm_xen_vcpu_attr {
__u16 type;
__u16 pad[3];
union {
__u64 gpa;
#define KVM_XEN_INVALID_GPA ((__u64) - 1)
__u64 hva;
__u64 pad[8];
struct {
__u64 state;
__u64 state_entry_time;
__u64 time_running;
__u64 time_runnable;
__u64 time_blocked;
__u64 time_offline;
} runstate;
__u32 vcpu_id;
struct {
__u32 port;
__u32 priority;
__u64 expires_ns;
} timer;
__u8 vector;
} u;
};
#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_INFO 0x0
#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_TIME_INFO 0x1
#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADDR 0x2
#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_CURRENT 0x3
#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_DATA 0x4
#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADJUST 0x5
#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_ID 0x6
#define KVM_XEN_VCPU_ATTR_TYPE_TIMER 0x7
#define KVM_XEN_VCPU_ATTR_TYPE_UPCALL_VECTOR 0x8
#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_INFO_HVA 0x9
enum sev_cmd_id {
KVM_SEV_INIT = 0,
KVM_SEV_ES_INIT,
KVM_SEV_LAUNCH_START,
KVM_SEV_LAUNCH_UPDATE_DATA,
KVM_SEV_LAUNCH_UPDATE_VMSA,
KVM_SEV_LAUNCH_SECRET,
KVM_SEV_LAUNCH_MEASURE,
KVM_SEV_LAUNCH_FINISH,
KVM_SEV_SEND_START,
KVM_SEV_SEND_UPDATE_DATA,
KVM_SEV_SEND_UPDATE_VMSA,
KVM_SEV_SEND_FINISH,
KVM_SEV_RECEIVE_START,
KVM_SEV_RECEIVE_UPDATE_DATA,
KVM_SEV_RECEIVE_UPDATE_VMSA,
KVM_SEV_RECEIVE_FINISH,
KVM_SEV_GUEST_STATUS,
KVM_SEV_DBG_DECRYPT,
KVM_SEV_DBG_ENCRYPT,
KVM_SEV_CERT_EXPORT,
KVM_SEV_GET_ATTESTATION_REPORT,
KVM_SEV_SEND_CANCEL,
KVM_SEV_NR_MAX,
};
struct kvm_sev_cmd {
__u32 id;
__u32 pad0;
__u64 data;
__u32 error;
__u32 sev_fd;
};
struct kvm_sev_launch_start {
__u32 handle;
__u32 policy;
__u64 dh_uaddr;
__u32 dh_len;
__u32 pad0;
__u64 session_uaddr;
__u32 session_len;
__u32 pad1;
};
struct kvm_sev_launch_update_data {
__u64 uaddr;
__u32 len;
__u32 pad0;
};
struct kvm_sev_launch_secret {
__u64 hdr_uaddr;
__u32 hdr_len;
__u32 pad0;
__u64 guest_uaddr;
__u32 guest_len;
__u32 pad1;
__u64 trans_uaddr;
__u32 trans_len;
__u32 pad2;
};
struct kvm_sev_launch_measure {
__u64 uaddr;
__u32 len;
__u32 pad0;
};
struct kvm_sev_guest_status {
__u32 handle;
__u32 policy;
__u32 state;
};
struct kvm_sev_dbg {
__u64 src_uaddr;
__u64 dst_uaddr;
__u32 len;
__u32 pad0;
};
struct kvm_sev_attestation_report {
__u8 mnonce[16];
__u64 uaddr;
__u32 len;
__u32 pad0;
};
struct kvm_sev_send_start {
__u32 policy;
__u32 pad0;
__u64 pdh_cert_uaddr;
__u32 pdh_cert_len;
__u32 pad1;
__u64 plat_certs_uaddr;
__u32 plat_certs_len;
__u32 pad2;
__u64 amd_certs_uaddr;
__u32 amd_certs_len;
__u32 pad3;
__u64 session_uaddr;
__u32 session_len;
__u32 pad4;
};
struct kvm_sev_send_update_data {
__u64 hdr_uaddr;
__u32 hdr_len;
__u32 pad0;
__u64 guest_uaddr;
__u32 guest_len;
__u32 pad1;
__u64 trans_uaddr;
__u32 trans_len;
__u32 pad2;
};
struct kvm_sev_receive_start {
__u32 handle;
__u32 policy;
__u64 pdh_uaddr;
__u32 pdh_len;
__u32 pad0;
__u64 session_uaddr;
__u32 session_len;
__u32 pad1;
};
struct kvm_sev_receive_update_data {
__u64 hdr_uaddr;
__u32 hdr_len;
__u32 pad0;
__u64 guest_uaddr;
__u32 guest_len;
__u32 pad1;
__u64 trans_uaddr;
__u32 trans_len;
__u32 pad2;
};
#define KVM_X2APIC_API_USE_32BIT_IDS (1ULL << 0)
#define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK (1ULL << 1)
struct kvm_hyperv_eventfd {
__u32 conn_id;
__s32 fd;
__u32 flags;
__u32 padding[3];
};
#define KVM_HYPERV_CONN_ID_MASK 0x00ffffff
#define KVM_HYPERV_EVENTFD_DEASSIGN (1 << 0)
#define KVM_PMU_ENCODE_MASKED_ENTRY(event_select,mask,match,exclude) (((event_select) & 0xFFULL) | (((event_select) & 0XF00ULL) << 24) | (((mask) & 0xFFULL) << 56) | (((match) & 0xFFULL) << 8) | ((__u64) (! ! (exclude)) << 55)) #define KVM_PMU_ENCODE_MASKED_ENTRY(event_select,mask,match,exclude) (((event_select) & 0xFFULL) | (((event_select) & 0XF00ULL) << 24) | (((mask) & 0xFFULL) << 56) | (((match) & 0xFFULL) << 8) | ((__u64) (! ! (exclude)) << 55))
#define KVM_PMU_MASKED_ENTRY_EVENT_SELECT (GENMASK_ULL(7, 0) | GENMASK_ULL(35, 32)) #define KVM_PMU_MASKED_ENTRY_EVENT_SELECT (__GENMASK_ULL(7, 0) | __GENMASK_ULL(35, 32))
#define KVM_PMU_MASKED_ENTRY_UMASK_MASK (GENMASK_ULL(63, 56)) #define KVM_PMU_MASKED_ENTRY_UMASK_MASK (__GENMASK_ULL(63, 56))
#define KVM_PMU_MASKED_ENTRY_UMASK_MATCH (GENMASK_ULL(15, 8)) #define KVM_PMU_MASKED_ENTRY_UMASK_MATCH (__GENMASK_ULL(15, 8))
#define KVM_PMU_MASKED_ENTRY_EXCLUDE (BIT_ULL(55)) #define KVM_PMU_MASKED_ENTRY_EXCLUDE (_BITULL(55))
#define KVM_PMU_MASKED_ENTRY_UMASK_MASK_SHIFT (56) #define KVM_PMU_MASKED_ENTRY_UMASK_MASK_SHIFT (56)
#define KVM_VCPU_TSC_CTRL 0 #define KVM_VCPU_TSC_CTRL 0
#define KVM_VCPU_TSC_OFFSET 0 #define KVM_VCPU_TSC_OFFSET 0
#define KVM_EXIT_HYPERCALL_LONG_MODE BIT(0) #define KVM_EXIT_HYPERCALL_LONG_MODE _BITULL(0)
#define KVM_X86_DEFAULT_VM 0 #define KVM_X86_DEFAULT_VM 0
#define KVM_X86_SW_PROTECTED_VM 1 #define KVM_X86_SW_PROTECTED_VM 1
#endif #endif

View file

@ -67,7 +67,7 @@ struct kvm_clock_pairing {
#define KVM_ASYNC_PF_SEND_ALWAYS (1 << 1) #define KVM_ASYNC_PF_SEND_ALWAYS (1 << 1)
#define KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT (1 << 2) #define KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT (1 << 2)
#define KVM_ASYNC_PF_DELIVERY_AS_INT (1 << 3) #define KVM_ASYNC_PF_DELIVERY_AS_INT (1 << 3)
#define KVM_ASYNC_PF_VEC_MASK GENMASK(7, 0) #define KVM_ASYNC_PF_VEC_MASK __GENMASK(7, 0)
#define KVM_MIGRATION_READY (1 << 0) #define KVM_MIGRATION_READY (1 << 0)
#define KVM_MAP_GPA_RANGE_PAGE_SZ_4K 0 #define KVM_MAP_GPA_RANGE_PAGE_SZ_4K 0
#define KVM_MAP_GPA_RANGE_PAGE_SZ_2M (1 << 0) #define KVM_MAP_GPA_RANGE_PAGE_SZ_2M (1 << 0)
@ -100,7 +100,6 @@ struct kvm_vcpu_pv_apf_data {
__u32 flags; __u32 flags;
__u32 token; __u32 token;
__u8 pad[56]; __u8 pad[56];
__u32 enabled;
}; };
#define KVM_PV_EOI_BIT 0 #define KVM_PV_EOI_BIT 0
#define KVM_PV_EOI_MASK (0x1 << KVM_PV_EOI_BIT) #define KVM_PV_EOI_MASK (0x1 << KVM_PV_EOI_BIT)

View file

@ -123,6 +123,12 @@
#define X86_CR4_CET _BITUL(X86_CR4_CET_BIT) #define X86_CR4_CET _BITUL(X86_CR4_CET_BIT)
#define X86_CR4_LAM_SUP_BIT 28 #define X86_CR4_LAM_SUP_BIT 28
#define X86_CR4_LAM_SUP _BITUL(X86_CR4_LAM_SUP_BIT) #define X86_CR4_LAM_SUP _BITUL(X86_CR4_LAM_SUP_BIT)
#ifdef __x86_64__
#define X86_CR4_FRED_BIT 32
#define X86_CR4_FRED _BITUL(X86_CR4_FRED_BIT)
#else
#define X86_CR4_FRED (0)
#endif
#define X86_CR8_TPR _AC(0x0000000f, UL) #define X86_CR8_TPR _AC(0x0000000f, UL)
#define CX86_PCR0 0x20 #define CX86_PCR0 0x20
#define CX86_GCR 0xb8 #define CX86_GCR 0xb8

View file

@ -0,0 +1,64 @@
/*
* This file is auto-generated. Modifications will be lost.
*
* See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
* for more information.
*/
#ifndef _UAPI_ASM_X86_SETUP_DATA_H
#define _UAPI_ASM_X86_SETUP_DATA_H
#define SETUP_NONE 0
#define SETUP_E820_EXT 1
#define SETUP_DTB 2
#define SETUP_PCI 3
#define SETUP_EFI 4
#define SETUP_APPLE_PROPERTIES 5
#define SETUP_JAILHOUSE 6
#define SETUP_CC_BLOB 7
#define SETUP_IMA 8
#define SETUP_RNG_SEED 9
#define SETUP_ENUM_MAX SETUP_RNG_SEED
#define SETUP_INDIRECT (1 << 31)
#define SETUP_TYPE_MAX (SETUP_ENUM_MAX | SETUP_INDIRECT)
#ifndef __ASSEMBLY__
#include <linux/types.h>
struct setup_data {
__u64 next;
__u32 type;
__u32 len;
__u8 data[];
};
struct setup_indirect {
__u32 type;
__u32 reserved;
__u64 len;
__u64 addr;
};
struct boot_e820_entry {
__u64 addr;
__u64 size;
__u32 type;
} __attribute__((packed));
struct jailhouse_setup_data {
struct {
__u16 version;
__u16 compatible_version;
} __attribute__((packed)) hdr;
struct {
__u16 pm_timer_address;
__u16 num_cpus;
__u64 pci_mmconfig_base;
__u32 tsc_khz;
__u32 apic_khz;
__u8 standard_ioapic;
__u8 cpu_ids[255];
} __attribute__((packed)) v1;
struct {
__u32 flags;
} __attribute__((packed)) v2;
} __attribute__((packed));
struct ima_setup_data {
__u64 addr;
__u64 size;
} __attribute__((packed));
#endif
#endif

View file

@ -490,6 +490,7 @@ struct drm_amdgpu_cs_chunk_cp_gfx_shadow {
#define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_MCLK 0x9 #define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_MCLK 0x9
#define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_SCLK 0xa #define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_SCLK 0xa
#define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_MCLK 0xb #define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_MCLK 0xb
#define AMDGPU_INFO_SENSOR_GPU_INPUT_POWER 0xc
#define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS 0x1E #define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS 0x1E
#define AMDGPU_INFO_VRAM_LOST_COUNTER 0x1F #define AMDGPU_INFO_VRAM_LOST_COUNTER 0x1F
#define AMDGPU_INFO_RAS_ENABLED_FEATURES 0x20 #define AMDGPU_INFO_RAS_ENABLED_FEATURES 0x20

View file

@ -901,6 +901,7 @@ struct drm_i915_query_item {
#define DRM_I915_QUERY_MEMORY_REGIONS 4 #define DRM_I915_QUERY_MEMORY_REGIONS 4
#define DRM_I915_QUERY_HWCONFIG_BLOB 5 #define DRM_I915_QUERY_HWCONFIG_BLOB 5
#define DRM_I915_QUERY_GEOMETRY_SUBSLICES 6 #define DRM_I915_QUERY_GEOMETRY_SUBSLICES 6
#define DRM_I915_QUERY_GUC_SUBMISSION_VERSION 7
__s32 length; __s32 length;
__u32 flags; __u32 flags;
#define DRM_I915_QUERY_PERF_CONFIG_LIST 1 #define DRM_I915_QUERY_PERF_CONFIG_LIST 1
@ -976,6 +977,12 @@ struct drm_i915_query_memory_regions {
__u32 rsvd[3]; __u32 rsvd[3];
struct drm_i915_memory_region_info regions[]; struct drm_i915_memory_region_info regions[];
}; };
struct drm_i915_query_guc_submission_version {
__u32 branch;
__u32 major;
__u32 minor;
__u32 patch;
};
struct drm_i915_gem_create_ext { struct drm_i915_gem_create_ext {
__u64 size; __u64 size;
__u32 handle; __u32 handle;

View file

@ -129,6 +129,17 @@ struct drm_xe_query_engine_cycles {
__u64 cpu_timestamp; __u64 cpu_timestamp;
__u64 cpu_delta; __u64 cpu_delta;
}; };
struct drm_xe_query_uc_fw_version {
#define XE_QUERY_UC_TYPE_GUC_SUBMISSION 0
__u16 uc_type;
__u16 pad;
__u32 branch_ver;
__u32 major_ver;
__u32 minor_ver;
__u32 patch_ver;
__u32 pad2;
__u64 reserved;
};
struct drm_xe_device_query { struct drm_xe_device_query {
__u64 extensions; __u64 extensions;
#define DRM_XE_DEVICE_QUERY_ENGINES 0 #define DRM_XE_DEVICE_QUERY_ENGINES 0
@ -138,6 +149,7 @@ struct drm_xe_device_query {
#define DRM_XE_DEVICE_QUERY_HWCONFIG 4 #define DRM_XE_DEVICE_QUERY_HWCONFIG 4
#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5 #define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
#define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6 #define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6
#define DRM_XE_DEVICE_QUERY_UC_FW_VERSION 7
__u32 query; __u32 query;
__u32 size; __u32 size;
__u64 data; __u64 data;

View file

@ -31,6 +31,8 @@
#define AT_HWCAP2 26 #define AT_HWCAP2 26
#define AT_RSEQ_FEATURE_SIZE 27 #define AT_RSEQ_FEATURE_SIZE 27
#define AT_RSEQ_ALIGN 28 #define AT_RSEQ_ALIGN 28
#define AT_HWCAP3 29
#define AT_HWCAP4 30
#define AT_EXECFN 31 #define AT_EXECFN 31
#ifndef AT_MINSIGSTKSZ #ifndef AT_MINSIGSTKSZ
#define AT_MINSIGSTKSZ 51 #define AT_MINSIGSTKSZ 51

View file

@ -0,0 +1,11 @@
/*
* This file is auto-generated. Modifications will be lost.
*
* See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
* for more information.
*/
#ifndef _UAPI_LINUX_BITS_H
#define _UAPI_LINUX_BITS_H
#define __GENMASK(h,l) (((~_UL(0)) - (_UL(1) << (l)) + 1) & (~_UL(0) >> (__BITS_PER_LONG - 1 - (h))))
#define __GENMASK_ULL(h,l) (((~_ULL(0)) - (_ULL(1) << (l)) + 1) & (~_ULL(0) >> (__BITS_PER_LONG_LONG - 1 - (h))))
#endif

File diff suppressed because one or more lines are too long

View file

@ -45,6 +45,7 @@ struct btrfs_qgroup_limit {
__u64 rsv_excl; __u64 rsv_excl;
}; };
#define BTRFS_QGROUP_INHERIT_SET_LIMITS (1ULL << 0) #define BTRFS_QGROUP_INHERIT_SET_LIMITS (1ULL << 0)
#define BTRFS_QGROUP_INHERIT_FLAGS_SUPP (BTRFS_QGROUP_INHERIT_SET_LIMITS)
struct btrfs_qgroup_inherit { struct btrfs_qgroup_inherit {
__u64 flags; __u64 flags;
__u64 num_qgroups; __u64 num_qgroups;

View file

@ -55,6 +55,9 @@ struct canfd_frame {
}; };
#define CANXL_XLF 0x80 #define CANXL_XLF 0x80
#define CANXL_SEC 0x01 #define CANXL_SEC 0x01
#define CANXL_VCID_OFFSET 16
#define CANXL_VCID_VAL_MASK 0xFFUL
#define CANXL_VCID_MASK (CANXL_VCID_VAL_MASK << CANXL_VCID_OFFSET)
struct canxl_frame { struct canxl_frame {
canid_t prio; canid_t prio;
__u8 flags; __u8 flags;

View file

@ -45,6 +45,7 @@ struct can_isotp_ll_options {
#define CAN_ISOTP_WAIT_TX_DONE 0x0400 #define CAN_ISOTP_WAIT_TX_DONE 0x0400
#define CAN_ISOTP_SF_BROADCAST 0x0800 #define CAN_ISOTP_SF_BROADCAST 0x0800
#define CAN_ISOTP_CF_BROADCAST 0x1000 #define CAN_ISOTP_CF_BROADCAST 0x1000
#define CAN_ISOTP_DYN_FC_PARMS 0x2000
#define CAN_ISOTP_DEFAULT_FLAGS 0 #define CAN_ISOTP_DEFAULT_FLAGS 0
#define CAN_ISOTP_DEFAULT_EXT_ADDRESS 0x00 #define CAN_ISOTP_DEFAULT_EXT_ADDRESS 0x00
#define CAN_ISOTP_DEFAULT_PAD_CONTENT 0xCC #define CAN_ISOTP_DEFAULT_PAD_CONTENT 0xCC

View file

@ -20,5 +20,15 @@ enum {
CAN_RAW_FD_FRAMES, CAN_RAW_FD_FRAMES,
CAN_RAW_JOIN_FILTERS, CAN_RAW_JOIN_FILTERS,
CAN_RAW_XL_FRAMES, CAN_RAW_XL_FRAMES,
CAN_RAW_XL_VCID_OPTS,
}; };
struct can_raw_vcid_options {
__u8 flags;
__u8 tx_vcid;
__u8 rx_vcid;
__u8 rx_vcid_mask;
};
#define CAN_RAW_XL_VCID_TX_SET 0x01
#define CAN_RAW_XL_VCID_TX_PASS 0x02
#define CAN_RAW_XL_VCID_RX_FILTER 0x04
#endif #endif

View file

@ -22,6 +22,14 @@ enum dpll_lock_status {
__DPLL_LOCK_STATUS_MAX, __DPLL_LOCK_STATUS_MAX,
DPLL_LOCK_STATUS_MAX = (__DPLL_LOCK_STATUS_MAX - 1) DPLL_LOCK_STATUS_MAX = (__DPLL_LOCK_STATUS_MAX - 1)
}; };
enum dpll_lock_status_error {
DPLL_LOCK_STATUS_ERROR_NONE = 1,
DPLL_LOCK_STATUS_ERROR_UNDEFINED,
DPLL_LOCK_STATUS_ERROR_MEDIA_DOWN,
DPLL_LOCK_STATUS_ERROR_FRACTIONAL_FREQUENCY_OFFSET_TOO_HIGH,
__DPLL_LOCK_STATUS_ERROR_MAX,
DPLL_LOCK_STATUS_ERROR_MAX = (__DPLL_LOCK_STATUS_ERROR_MAX - 1)
};
#define DPLL_TEMP_DIVIDER 1000 #define DPLL_TEMP_DIVIDER 1000
enum dpll_type { enum dpll_type {
DPLL_TYPE_PPS = 1, DPLL_TYPE_PPS = 1,
@ -71,6 +79,7 @@ enum dpll_a {
DPLL_A_LOCK_STATUS, DPLL_A_LOCK_STATUS,
DPLL_A_TEMP, DPLL_A_TEMP,
DPLL_A_TYPE, DPLL_A_TYPE,
DPLL_A_LOCK_STATUS_ERROR,
__DPLL_A_MAX, __DPLL_A_MAX,
DPLL_A_MAX = (__DPLL_A_MAX - 1) DPLL_A_MAX = (__DPLL_A_MAX - 1)
}; };

View file

@ -358,6 +358,7 @@ typedef struct elf64_shdr {
#define NT_ARM_SSVE 0x40b #define NT_ARM_SSVE 0x40b
#define NT_ARM_ZA 0x40c #define NT_ARM_ZA 0x40c
#define NT_ARM_ZT 0x40d #define NT_ARM_ZT 0x40d
#define NT_ARM_FPMR 0x40e
#define NT_ARC_V2 0x600 #define NT_ARC_V2 0x600
#define NT_VMCOREDD 0x700 #define NT_VMCOREDD 0x700
#define NT_MIPS_DSP 0x800 #define NT_MIPS_DSP 0x800

View file

@ -878,6 +878,18 @@ enum ethtool_link_mode_bit_indices {
#define IPV4_FLOW 0x10 #define IPV4_FLOW 0x10
#define IPV6_FLOW 0x11 #define IPV6_FLOW 0x11
#define ETHER_FLOW 0x12 #define ETHER_FLOW 0x12
#define GTPU_V4_FLOW 0x13
#define GTPU_V6_FLOW 0x14
#define GTPC_V4_FLOW 0x15
#define GTPC_V6_FLOW 0x16
#define GTPC_TEID_V4_FLOW 0x17
#define GTPC_TEID_V6_FLOW 0x18
#define GTPU_EH_V4_FLOW 0x19
#define GTPU_EH_V6_FLOW 0x1a
#define GTPU_UL_V4_FLOW 0x1b
#define GTPU_UL_V6_FLOW 0x1c
#define GTPU_DL_V4_FLOW 0x1d
#define GTPU_DL_V6_FLOW 0x1e
#define FLOW_EXT 0x80000000 #define FLOW_EXT 0x80000000
#define FLOW_MAC_EXT 0x40000000 #define FLOW_MAC_EXT 0x40000000
#define FLOW_RSS 0x20000000 #define FLOW_RSS 0x20000000
@ -888,6 +900,7 @@ enum ethtool_link_mode_bit_indices {
#define RXH_IP_DST (1 << 5) #define RXH_IP_DST (1 << 5)
#define RXH_L4_B_0_1 (1 << 6) #define RXH_L4_B_0_1 (1 << 6)
#define RXH_L4_B_2_3 (1 << 7) #define RXH_L4_B_2_3 (1 << 7)
#define RXH_GTP_TEID (1 << 8)
#define RXH_DISCARD (1 << 31) #define RXH_DISCARD (1 << 31)
#define RX_CLS_FLOW_DISC 0xffffffffffffffffULL #define RX_CLS_FLOW_DISC 0xffffffffffffffffULL
#define RX_CLS_FLOW_WAKE 0xfffffffffffffffeULL #define RX_CLS_FLOW_WAKE 0xfffffffffffffffeULL

View file

@ -35,4 +35,13 @@
#else #else
#define EPOLL_PACKED #define EPOLL_PACKED
#endif #endif
struct epoll_params {
__u32 busy_poll_usecs;
__u16 busy_poll_budget;
__u8 prefer_busy_poll;
__u8 __pad;
};
#define EPOLL_IOC_TYPE 0x8A
#define EPIOCSPARAMS _IOW(EPOLL_IOC_TYPE, 0x01, struct epoll_params)
#define EPIOCGPARAMS _IOR(EPOLL_IOC_TYPE, 0x02, struct epoll_params)
#endif #endif

View file

@ -8,6 +8,7 @@
#define _UAPI_LINUX_FB_H #define _UAPI_LINUX_FB_H
#include <linux/types.h> #include <linux/types.h>
#include <linux/i2c.h> #include <linux/i2c.h>
#include <linux/vesa.h>
#define FB_MAX 32 #define FB_MAX 32
#define FBIOGET_VSCREENINFO 0x4600 #define FBIOGET_VSCREENINFO 0x4600
#define FBIOPUT_VSCREENINFO 0x4601 #define FBIOPUT_VSCREENINFO 0x4601
@ -235,10 +236,6 @@ struct fb_con2fbmap {
__u32 console; __u32 console;
__u32 framebuffer; __u32 framebuffer;
}; };
#define VESA_NO_BLANKING 0
#define VESA_VSYNC_SUSPEND 1
#define VESA_HSYNC_SUSPEND 2
#define VESA_POWERDOWN 3
enum { enum {
FB_BLANK_UNBLANK = VESA_NO_BLANKING, FB_BLANK_UNBLANK = VESA_NO_BLANKING,
FB_BLANK_NORMAL = VESA_NO_BLANKING + 1, FB_BLANK_NORMAL = VESA_NO_BLANKING + 1,

View file

@ -36,6 +36,14 @@ struct fstrim_range {
__u64 len; __u64 len;
__u64 minlen; __u64 minlen;
}; };
struct fsuuid2 {
__u8 len;
__u8 uuid[16];
};
struct fs_sysfs_path {
__u8 len;
__u8 name[128];
};
#define FILE_DEDUPE_RANGE_SAME 0 #define FILE_DEDUPE_RANGE_SAME 0
#define FILE_DEDUPE_RANGE_DIFFERS 1 #define FILE_DEDUPE_RANGE_DIFFERS 1
struct file_dedupe_range_info { struct file_dedupe_range_info {
@ -141,6 +149,8 @@ struct fsxattr {
#define FS_IOC_FSSETXATTR _IOW('X', 32, struct fsxattr) #define FS_IOC_FSSETXATTR _IOW('X', 32, struct fsxattr)
#define FS_IOC_GETFSLABEL _IOR(0x94, 49, char[FSLABEL_MAX]) #define FS_IOC_GETFSLABEL _IOR(0x94, 49, char[FSLABEL_MAX])
#define FS_IOC_SETFSLABEL _IOW(0x94, 50, char[FSLABEL_MAX]) #define FS_IOC_SETFSLABEL _IOW(0x94, 50, char[FSLABEL_MAX])
#define FS_IOC_GETFSUUID _IOR(0x15, 0, struct fsuuid2)
#define FS_IOC_GETFSSYSFSPATH _IOR(0x15, 1, struct fs_sysfs_path)
#define FS_SECRM_FL 0x00000001 #define FS_SECRM_FL 0x00000001
#define FS_UNRM_FL 0x00000002 #define FS_UNRM_FL 0x00000002
#define FS_COMPR_FL 0x00000004 #define FS_COMPR_FL 0x00000004
@ -183,7 +193,8 @@ typedef int __bitwise __kernel_rwf_t;
#define RWF_SYNC (( __kernel_rwf_t) 0x00000004) #define RWF_SYNC (( __kernel_rwf_t) 0x00000004)
#define RWF_NOWAIT (( __kernel_rwf_t) 0x00000008) #define RWF_NOWAIT (( __kernel_rwf_t) 0x00000008)
#define RWF_APPEND (( __kernel_rwf_t) 0x00000010) #define RWF_APPEND (( __kernel_rwf_t) 0x00000010)
#define RWF_SUPPORTED (RWF_HIPRI | RWF_DSYNC | RWF_SYNC | RWF_NOWAIT | RWF_APPEND) #define RWF_NOAPPEND (( __kernel_rwf_t) 0x00000020)
#define RWF_SUPPORTED (RWF_HIPRI | RWF_DSYNC | RWF_SYNC | RWF_NOWAIT | RWF_APPEND | RWF_NOAPPEND)
#define PAGEMAP_SCAN _IOWR('f', 16, struct pm_scan_arg) #define PAGEMAP_SCAN _IOWR('f', 16, struct pm_scan_arg)
#define PAGE_IS_WPALLOWED (1 << 0) #define PAGE_IS_WPALLOWED (1 << 0)
#define PAGE_IS_WRITTEN (1 << 1) #define PAGE_IS_WRITTEN (1 << 1)

View file

@ -8,7 +8,7 @@
#define _LINUX_FUSE_H #define _LINUX_FUSE_H
#include <stdint.h> #include <stdint.h>
#define FUSE_KERNEL_VERSION 7 #define FUSE_KERNEL_VERSION 7
#define FUSE_KERNEL_MINOR_VERSION 39 #define FUSE_KERNEL_MINOR_VERSION 40
#define FUSE_ROOT_ID 1 #define FUSE_ROOT_ID 1
struct fuse_attr { struct fuse_attr {
uint64_t ino; uint64_t ino;
@ -93,6 +93,7 @@ struct fuse_file_lock {
#define FOPEN_STREAM (1 << 4) #define FOPEN_STREAM (1 << 4)
#define FOPEN_NOFLUSH (1 << 5) #define FOPEN_NOFLUSH (1 << 5)
#define FOPEN_PARALLEL_DIRECT_WRITES (1 << 6) #define FOPEN_PARALLEL_DIRECT_WRITES (1 << 6)
#define FOPEN_PASSTHROUGH (1 << 7)
#define FUSE_ASYNC_READ (1 << 0) #define FUSE_ASYNC_READ (1 << 0)
#define FUSE_POSIX_LOCKS (1 << 1) #define FUSE_POSIX_LOCKS (1 << 1)
#define FUSE_FILE_OPS (1 << 2) #define FUSE_FILE_OPS (1 << 2)
@ -130,12 +131,10 @@ struct fuse_file_lock {
#define FUSE_CREATE_SUPP_GROUP (1ULL << 34) #define FUSE_CREATE_SUPP_GROUP (1ULL << 34)
#define FUSE_HAS_EXPIRE_ONLY (1ULL << 35) #define FUSE_HAS_EXPIRE_ONLY (1ULL << 35)
#define FUSE_DIRECT_IO_ALLOW_MMAP (1ULL << 36) #define FUSE_DIRECT_IO_ALLOW_MMAP (1ULL << 36)
#define FUSE_PASSTHROUGH (1ULL << 37)
#define FUSE_NO_EXPORT_SUPPORT (1ULL << 38)
#define FUSE_HAS_RESEND (1ULL << 39)
#define FUSE_DIRECT_IO_RELAX FUSE_DIRECT_IO_ALLOW_MMAP #define FUSE_DIRECT_IO_RELAX FUSE_DIRECT_IO_ALLOW_MMAP
#if FUSE_KERNEL_VERSION > 7 || FUSE_KERNEL_VERSION == 7 && FUSE_KERNEL_MINOR_VERSION >= 36
#define FUSE_PASSTHROUGH (1ULL << 63)
#else
#define FUSE_PASSTHROUGH (1 << 31)
#endif
#define CUSE_UNRESTRICTED_IOCTL (1 << 0) #define CUSE_UNRESTRICTED_IOCTL (1 << 0)
#define FUSE_RELEASE_FLUSH (1 << 0) #define FUSE_RELEASE_FLUSH (1 << 0)
#define FUSE_RELEASE_FLOCK_UNLOCK (1 << 1) #define FUSE_RELEASE_FLOCK_UNLOCK (1 << 1)
@ -215,7 +214,6 @@ enum fuse_opcode {
FUSE_SYNCFS = 50, FUSE_SYNCFS = 50,
FUSE_TMPFILE = 51, FUSE_TMPFILE = 51,
FUSE_STATX = 52, FUSE_STATX = 52,
FUSE_CANONICAL_PATH = 2016,
CUSE_INIT = 4096, CUSE_INIT = 4096,
CUSE_INIT_BSWAP_RESERVED = 1048576, CUSE_INIT_BSWAP_RESERVED = 1048576,
FUSE_INIT_BSWAP_RESERVED = 436207616, FUSE_INIT_BSWAP_RESERVED = 436207616,
@ -227,6 +225,7 @@ enum fuse_notify_code {
FUSE_NOTIFY_STORE = 4, FUSE_NOTIFY_STORE = 4,
FUSE_NOTIFY_RETRIEVE = 5, FUSE_NOTIFY_RETRIEVE = 5,
FUSE_NOTIFY_DELETE = 6, FUSE_NOTIFY_DELETE = 6,
FUSE_NOTIFY_RESEND = 7,
FUSE_NOTIFY_CODE_MAX, FUSE_NOTIFY_CODE_MAX,
}; };
#define FUSE_MIN_READ_BUFFER 8192 #define FUSE_MIN_READ_BUFFER 8192
@ -330,7 +329,7 @@ struct fuse_create_in {
struct fuse_open_out { struct fuse_open_out {
uint64_t fh; uint64_t fh;
uint32_t open_flags; uint32_t open_flags;
uint32_t passthrough_fh; int32_t backing_id;
}; };
struct fuse_release_in { struct fuse_release_in {
uint64_t fh; uint64_t fh;
@ -427,7 +426,8 @@ struct fuse_init_out {
uint16_t max_pages; uint16_t max_pages;
uint16_t map_alignment; uint16_t map_alignment;
uint32_t flags2; uint32_t flags2;
uint32_t unused[7]; uint32_t max_stack_depth;
uint32_t unused[6];
}; };
#define CUSE_INIT_INFO_MAX 4096 #define CUSE_INIT_INFO_MAX 4096
struct cuse_init_in { struct cuse_init_in {
@ -496,6 +496,7 @@ struct fuse_fallocate_in {
uint32_t mode; uint32_t mode;
uint32_t padding; uint32_t padding;
}; };
#define FUSE_UNIQUE_RESEND (1ULL << 63)
struct fuse_in_header { struct fuse_in_header {
uint32_t len; uint32_t len;
uint32_t opcode; uint32_t opcode;
@ -566,9 +567,15 @@ struct fuse_notify_retrieve_in {
uint64_t dummy3; uint64_t dummy3;
uint64_t dummy4; uint64_t dummy4;
}; };
struct fuse_backing_map {
int32_t fd;
uint32_t flags;
uint64_t padding;
};
#define FUSE_DEV_IOC_MAGIC 229 #define FUSE_DEV_IOC_MAGIC 229
#define FUSE_DEV_IOC_CLONE _IOR(FUSE_DEV_IOC_MAGIC, 0, uint32_t) #define FUSE_DEV_IOC_CLONE _IOR(FUSE_DEV_IOC_MAGIC, 0, uint32_t)
#define FUSE_DEV_IOC_PASSTHROUGH_OPEN _IOW(FUSE_DEV_IOC_MAGIC, 126, uint32_t) #define FUSE_DEV_IOC_BACKING_OPEN _IOW(FUSE_DEV_IOC_MAGIC, 1, struct fuse_backing_map)
#define FUSE_DEV_IOC_BACKING_CLOSE _IOW(FUSE_DEV_IOC_MAGIC, 2, uint32_t)
struct fuse_lseek_in { struct fuse_lseek_in {
uint64_t fh; uint64_t fh;
uint64_t offset; uint64_t offset;

View file

@ -646,6 +646,7 @@ enum {
IFLA_BOND_AD_LACP_ACTIVE, IFLA_BOND_AD_LACP_ACTIVE,
IFLA_BOND_MISSED_MAX, IFLA_BOND_MISSED_MAX,
IFLA_BOND_NS_IP6_TARGET, IFLA_BOND_NS_IP6_TARGET,
IFLA_BOND_COUPLED_CONTROL,
__IFLA_BOND_MAX, __IFLA_BOND_MAX,
}; };
#define IFLA_BOND_MAX (__IFLA_BOND_MAX - 1) #define IFLA_BOND_MAX (__IFLA_BOND_MAX - 1)

View file

@ -528,6 +528,7 @@
#define BTN_DPAD_RIGHT 0x223 #define BTN_DPAD_RIGHT 0x223
#define KEY_ALS_TOGGLE 0x230 #define KEY_ALS_TOGGLE 0x230
#define KEY_ROTATE_LOCK_TOGGLE 0x231 #define KEY_ROTATE_LOCK_TOGGLE 0x231
#define KEY_REFRESH_RATE_TOGGLE 0x232
#define KEY_BUTTONCONFIG 0x240 #define KEY_BUTTONCONFIG 0x240
#define KEY_TASKMANAGER 0x241 #define KEY_TASKMANAGER 0x241
#define KEY_JOURNAL 0x242 #define KEY_JOURNAL 0x242

View file

@ -174,6 +174,7 @@ enum io_uring_op {
IORING_OP_FUTEX_WAKE, IORING_OP_FUTEX_WAKE,
IORING_OP_FUTEX_WAITV, IORING_OP_FUTEX_WAITV,
IORING_OP_FIXED_FD_INSTALL, IORING_OP_FIXED_FD_INSTALL,
IORING_OP_FTRUNCATE,
IORING_OP_LAST, IORING_OP_LAST,
}; };
#define IORING_URING_CMD_FIXED (1U << 0) #define IORING_URING_CMD_FIXED (1U << 0)
@ -316,6 +317,8 @@ enum {
IORING_REGISTER_SYNC_CANCEL = 24, IORING_REGISTER_SYNC_CANCEL = 24,
IORING_REGISTER_FILE_ALLOC_RANGE = 25, IORING_REGISTER_FILE_ALLOC_RANGE = 25,
IORING_REGISTER_PBUF_STATUS = 26, IORING_REGISTER_PBUF_STATUS = 26,
IORING_REGISTER_NAPI = 27,
IORING_UNREGISTER_NAPI = 28,
IORING_REGISTER_LAST, IORING_REGISTER_LAST,
IORING_REGISTER_USE_REGISTERED_RING = 1U << 31 IORING_REGISTER_USE_REGISTERED_RING = 1U << 31
}; };
@ -406,6 +409,12 @@ struct io_uring_buf_status {
__u32 head; __u32 head;
__u32 resv[8]; __u32 resv[8];
}; };
struct io_uring_napi {
__u32 busy_poll_to;
__u8 prefer_busy_poll;
__u8 pad[3];
__u64 resv;
};
enum { enum {
IORING_RESTRICTION_REGISTER_OP = 0, IORING_RESTRICTION_REGISTER_OP = 0,
IORING_RESTRICTION_SQE_OP = 1, IORING_RESTRICTION_SQE_OP = 1,

View file

@ -33,4 +33,18 @@ enum {
__IOAM6_CMD_MAX, __IOAM6_CMD_MAX,
}; };
#define IOAM6_CMD_MAX (__IOAM6_CMD_MAX - 1) #define IOAM6_CMD_MAX (__IOAM6_CMD_MAX - 1)
#define IOAM6_GENL_EV_GRP_NAME "ioam6_events"
enum ioam6_event_type {
IOAM6_EVENT_UNSPEC,
IOAM6_EVENT_TRACE,
};
enum ioam6_event_attr {
IOAM6_EVENT_ATTR_UNSPEC,
IOAM6_EVENT_ATTR_TRACE_NAMESPACE,
IOAM6_EVENT_ATTR_TRACE_NODELEN,
IOAM6_EVENT_ATTR_TRACE_TYPE,
IOAM6_EVENT_ATTR_TRACE_DATA,
__IOAM6_EVENT_ATTR_MAX
};
#define IOAM6_EVENT_ATTR_MAX (__IOAM6_EVENT_ATTR_MAX - 1)
#endif #endif

View file

@ -9,7 +9,7 @@
#include <drm/drm.h> #include <drm/drm.h>
#include <linux/ioctl.h> #include <linux/ioctl.h>
#define KFD_IOCTL_MAJOR_VERSION 1 #define KFD_IOCTL_MAJOR_VERSION 1
#define KFD_IOCTL_MINOR_VERSION 14 #define KFD_IOCTL_MINOR_VERSION 15
struct kfd_ioctl_get_version_args { struct kfd_ioctl_get_version_args {
__u32 major_version; __u32 major_version;
__u32 minor_version; __u32 minor_version;
@ -497,9 +497,12 @@ enum kfd_dbg_trap_exception_code {
#define KFD_EC_MASK_QUEUE (KFD_EC_MASK(EC_QUEUE_WAVE_ABORT) | KFD_EC_MASK(EC_QUEUE_WAVE_TRAP) | KFD_EC_MASK(EC_QUEUE_WAVE_MATH_ERROR) | KFD_EC_MASK(EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION) | KFD_EC_MASK(EC_QUEUE_WAVE_MEMORY_VIOLATION) | KFD_EC_MASK(EC_QUEUE_WAVE_APERTURE_VIOLATION) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_DIM_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_CODE_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_RESERVED) | KFD_EC_MASK(EC_QUEUE_PACKET_UNSUPPORTED) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_VENDOR_UNSUPPORTED) | KFD_EC_MASK(EC_QUEUE_PREEMPTION_ERROR) | KFD_EC_MASK(EC_QUEUE_NEW)) #define KFD_EC_MASK_QUEUE (KFD_EC_MASK(EC_QUEUE_WAVE_ABORT) | KFD_EC_MASK(EC_QUEUE_WAVE_TRAP) | KFD_EC_MASK(EC_QUEUE_WAVE_MATH_ERROR) | KFD_EC_MASK(EC_QUEUE_WAVE_ILLEGAL_INSTRUCTION) | KFD_EC_MASK(EC_QUEUE_WAVE_MEMORY_VIOLATION) | KFD_EC_MASK(EC_QUEUE_WAVE_APERTURE_VIOLATION) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_DIM_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_CODE_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_RESERVED) | KFD_EC_MASK(EC_QUEUE_PACKET_UNSUPPORTED) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_VENDOR_UNSUPPORTED) | KFD_EC_MASK(EC_QUEUE_PREEMPTION_ERROR) | KFD_EC_MASK(EC_QUEUE_NEW))
#define KFD_EC_MASK_DEVICE (KFD_EC_MASK(EC_DEVICE_QUEUE_DELETE) | KFD_EC_MASK(EC_DEVICE_RAS_ERROR) | KFD_EC_MASK(EC_DEVICE_FATAL_HALT) | KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION) | KFD_EC_MASK(EC_DEVICE_NEW)) #define KFD_EC_MASK_DEVICE (KFD_EC_MASK(EC_DEVICE_QUEUE_DELETE) | KFD_EC_MASK(EC_DEVICE_RAS_ERROR) | KFD_EC_MASK(EC_DEVICE_FATAL_HALT) | KFD_EC_MASK(EC_DEVICE_MEMORY_VIOLATION) | KFD_EC_MASK(EC_DEVICE_NEW))
#define KFD_EC_MASK_PROCESS (KFD_EC_MASK(EC_PROCESS_RUNTIME) | KFD_EC_MASK(EC_PROCESS_DEVICE_REMOVE)) #define KFD_EC_MASK_PROCESS (KFD_EC_MASK(EC_PROCESS_RUNTIME) | KFD_EC_MASK(EC_PROCESS_DEVICE_REMOVE))
#define KFD_DBG_EC_TYPE_IS_QUEUE(ecode) (! ! (KFD_EC_MASK(ecode) & KFD_EC_MASK_QUEUE)) #define KFD_EC_MASK_PACKET (KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_DIM_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_GROUP_SEGMENT_SIZE_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_CODE_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_RESERVED) | KFD_EC_MASK(EC_QUEUE_PACKET_UNSUPPORTED) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_WORK_GROUP_SIZE_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_DISPATCH_REGISTER_INVALID) | KFD_EC_MASK(EC_QUEUE_PACKET_VENDOR_UNSUPPORTED))
#define KFD_DBG_EC_TYPE_IS_DEVICE(ecode) (! ! (KFD_EC_MASK(ecode) & KFD_EC_MASK_DEVICE)) #define KFD_DBG_EC_IS_VALID(ecode) (ecode > EC_NONE && ecode < EC_MAX)
#define KFD_DBG_EC_TYPE_IS_PROCESS(ecode) (! ! (KFD_EC_MASK(ecode) & KFD_EC_MASK_PROCESS)) #define KFD_DBG_EC_TYPE_IS_QUEUE(ecode) (KFD_DBG_EC_IS_VALID(ecode) && ! ! (KFD_EC_MASK(ecode) & KFD_EC_MASK_QUEUE))
#define KFD_DBG_EC_TYPE_IS_DEVICE(ecode) (KFD_DBG_EC_IS_VALID(ecode) && ! ! (KFD_EC_MASK(ecode) & KFD_EC_MASK_DEVICE))
#define KFD_DBG_EC_TYPE_IS_PROCESS(ecode) (KFD_DBG_EC_IS_VALID(ecode) && ! ! (KFD_EC_MASK(ecode) & KFD_EC_MASK_PROCESS))
#define KFD_DBG_EC_TYPE_IS_PACKET(ecode) (KFD_DBG_EC_IS_VALID(ecode) && ! ! (KFD_EC_MASK(ecode) & KFD_EC_MASK_PACKET))
enum kfd_dbg_runtime_state { enum kfd_dbg_runtime_state {
DEBUG_RUNTIME_STATE_DISABLED = 0, DEBUG_RUNTIME_STATE_DISABLED = 0,
DEBUG_RUNTIME_STATE_ENABLED = 1, DEBUG_RUNTIME_STATE_ENABLED = 1,

View file

@ -12,6 +12,7 @@
#include <linux/ioctl.h> #include <linux/ioctl.h>
#include <asm/kvm.h> #include <asm/kvm.h>
#define KVM_API_VERSION 12 #define KVM_API_VERSION 12
#define __KVM_HAVE_GUEST_DEBUG
struct kvm_userspace_memory_region { struct kvm_userspace_memory_region {
__u32 slot; __u32 slot;
__u32 flags; __u32 flags;
@ -58,24 +59,6 @@ struct kvm_pit_config {
__u32 pad[15]; __u32 pad[15];
}; };
#define KVM_PIT_SPEAKER_DUMMY 1 #define KVM_PIT_SPEAKER_DUMMY 1
struct kvm_s390_skeys {
__u64 start_gfn;
__u64 count;
__u64 skeydata_addr;
__u32 flags;
__u32 reserved[9];
};
#define KVM_S390_CMMA_PEEK (1 << 0)
struct kvm_s390_cmma_log {
__u64 start_gfn;
__u32 count;
__u32 flags;
union {
__u64 remaining;
__u64 mask;
};
__u64 values;
};
struct kvm_hyperv_exit { struct kvm_hyperv_exit {
#define KVM_EXIT_HYPERV_SYNIC 1 #define KVM_EXIT_HYPERV_SYNIC 1
#define KVM_EXIT_HYPERV_HCALL 2 #define KVM_EXIT_HYPERV_HCALL 2
@ -235,11 +218,6 @@ struct kvm_run {
__u16 ipa; __u16 ipa;
__u32 ipb; __u32 ipb;
} s390_sieic; } s390_sieic;
#define KVM_S390_RESET_POR 1
#define KVM_S390_RESET_CLEAR 2
#define KVM_S390_RESET_SUBSYSTEM 4
#define KVM_S390_RESET_CPU_INIT 8
#define KVM_S390_RESET_IPL 16
__u64 s390_reset_flags; __u64 s390_reset_flags;
struct { struct {
__u64 trans_exc_code; __u64 trans_exc_code;
@ -389,35 +367,6 @@ struct kvm_translation {
__u8 usermode; __u8 usermode;
__u8 pad[5]; __u8 pad[5];
}; };
struct kvm_s390_mem_op {
__u64 gaddr;
__u64 flags;
__u32 size;
__u32 op;
__u64 buf;
union {
struct {
__u8 ar;
__u8 key;
__u8 pad1[6];
__u64 old_addr;
};
__u32 sida_offset;
__u8 reserved[32];
};
};
#define KVM_S390_MEMOP_LOGICAL_READ 0
#define KVM_S390_MEMOP_LOGICAL_WRITE 1
#define KVM_S390_MEMOP_SIDA_READ 2
#define KVM_S390_MEMOP_SIDA_WRITE 3
#define KVM_S390_MEMOP_ABSOLUTE_READ 4
#define KVM_S390_MEMOP_ABSOLUTE_WRITE 5
#define KVM_S390_MEMOP_ABSOLUTE_CMPXCHG 6
#define KVM_S390_MEMOP_F_CHECK_ONLY (1ULL << 0)
#define KVM_S390_MEMOP_F_INJECT_EXCEPTION (1ULL << 1)
#define KVM_S390_MEMOP_F_SKEY_PROTECTION (1ULL << 2)
#define KVM_S390_MEMOP_EXTENSION_CAP_BASE (1 << 0)
#define KVM_S390_MEMOP_EXTENSION_CAP_CMPXCHG (1 << 1)
struct kvm_interrupt { struct kvm_interrupt {
__u32 irq; __u32 irq;
}; };
@ -464,104 +413,6 @@ struct kvm_vapic_addr {
struct kvm_mp_state { struct kvm_mp_state {
__u32 mp_state; __u32 mp_state;
}; };
struct kvm_s390_psw {
__u64 mask;
__u64 addr;
};
#define KVM_S390_SIGP_STOP 0xfffe0000u
#define KVM_S390_PROGRAM_INT 0xfffe0001u
#define KVM_S390_SIGP_SET_PREFIX 0xfffe0002u
#define KVM_S390_RESTART 0xfffe0003u
#define KVM_S390_INT_PFAULT_INIT 0xfffe0004u
#define KVM_S390_INT_PFAULT_DONE 0xfffe0005u
#define KVM_S390_MCHK 0xfffe1000u
#define KVM_S390_INT_CLOCK_COMP 0xffff1004u
#define KVM_S390_INT_CPU_TIMER 0xffff1005u
#define KVM_S390_INT_VIRTIO 0xffff2603u
#define KVM_S390_INT_SERVICE 0xffff2401u
#define KVM_S390_INT_EMERGENCY 0xffff1201u
#define KVM_S390_INT_EXTERNAL_CALL 0xffff1202u
#define KVM_S390_INT_IO(ai,cssid,ssid,schid) (((schid)) | ((ssid) << 16) | ((cssid) << 18) | ((ai) << 26))
#define KVM_S390_INT_IO_MIN 0x00000000u
#define KVM_S390_INT_IO_MAX 0xfffdffffu
#define KVM_S390_INT_IO_AI_MASK 0x04000000u
struct kvm_s390_interrupt {
__u32 type;
__u32 parm;
__u64 parm64;
};
struct kvm_s390_io_info {
__u16 subchannel_id;
__u16 subchannel_nr;
__u32 io_int_parm;
__u32 io_int_word;
};
struct kvm_s390_ext_info {
__u32 ext_params;
__u32 pad;
__u64 ext_params2;
};
struct kvm_s390_pgm_info {
__u64 trans_exc_code;
__u64 mon_code;
__u64 per_address;
__u32 data_exc_code;
__u16 code;
__u16 mon_class_nr;
__u8 per_code;
__u8 per_atmid;
__u8 exc_access_id;
__u8 per_access_id;
__u8 op_access_id;
#define KVM_S390_PGM_FLAGS_ILC_VALID 0x01
#define KVM_S390_PGM_FLAGS_ILC_0 0x02
#define KVM_S390_PGM_FLAGS_ILC_1 0x04
#define KVM_S390_PGM_FLAGS_ILC_MASK 0x06
#define KVM_S390_PGM_FLAGS_NO_REWIND 0x08
__u8 flags;
__u8 pad[2];
};
struct kvm_s390_prefix_info {
__u32 address;
};
struct kvm_s390_extcall_info {
__u16 code;
};
struct kvm_s390_emerg_info {
__u16 code;
};
#define KVM_S390_STOP_FLAG_STORE_STATUS 0x01
struct kvm_s390_stop_info {
__u32 flags;
};
struct kvm_s390_mchk_info {
__u64 cr14;
__u64 mcic;
__u64 failing_storage_address;
__u32 ext_damage_code;
__u32 pad;
__u8 fixed_logout[16];
};
struct kvm_s390_irq {
__u64 type;
union {
struct kvm_s390_io_info io;
struct kvm_s390_ext_info ext;
struct kvm_s390_pgm_info pgm;
struct kvm_s390_emerg_info emerg;
struct kvm_s390_extcall_info extcall;
struct kvm_s390_prefix_info prefix;
struct kvm_s390_stop_info stop;
struct kvm_s390_mchk_info mchk;
char reserved[64];
} u;
};
struct kvm_s390_irq_state {
__u64 buf;
__u32 flags;
__u32 len;
__u32 reserved[4];
};
#define KVM_GUESTDBG_ENABLE 0x00000001 #define KVM_GUESTDBG_ENABLE 0x00000001
#define KVM_GUESTDBG_SINGLESTEP 0x00000002 #define KVM_GUESTDBG_SINGLESTEP 0x00000002
struct kvm_guest_debug { struct kvm_guest_debug {
@ -601,37 +452,6 @@ struct kvm_enable_cap {
__u64 args[4]; __u64 args[4];
__u8 pad[64]; __u8 pad[64];
}; };
#define KVM_PPC_PVINFO_FLAGS_EV_IDLE (1 << 0)
struct kvm_ppc_pvinfo {
__u32 flags;
__u32 hcall[4];
__u8 pad[108];
};
#define KVM_PPC_PAGE_SIZES_MAX_SZ 8
struct kvm_ppc_one_page_size {
__u32 page_shift;
__u32 pte_enc;
};
struct kvm_ppc_one_seg_page_size {
__u32 page_shift;
__u32 slb_enc;
struct kvm_ppc_one_page_size enc[KVM_PPC_PAGE_SIZES_MAX_SZ];
};
#define KVM_PPC_PAGE_SIZES_REAL 0x00000001
#define KVM_PPC_1T_SEGMENTS 0x00000002
#define KVM_PPC_NO_HASH 0x00000004
struct kvm_ppc_smmu_info {
__u64 flags;
__u32 slb_size;
__u16 data_keys;
__u16 instr_keys;
struct kvm_ppc_one_seg_page_size sps[KVM_PPC_PAGE_SIZES_MAX_SZ];
};
struct kvm_ppc_resize_hpt {
__u64 flags;
__u32 shift;
__u32 pad;
};
#define KVMIO 0xAE #define KVMIO 0xAE
#define KVM_VM_S390_UCONTROL 1 #define KVM_VM_S390_UCONTROL 1
#define KVM_VM_PPC_HV 1 #define KVM_VM_PPC_HV 1
@ -670,9 +490,7 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_IOMMU 18 #define KVM_CAP_IOMMU 18
#define KVM_CAP_DESTROY_MEMORY_REGION_WORKS 21 #define KVM_CAP_DESTROY_MEMORY_REGION_WORKS 21
#define KVM_CAP_USER_NMI 22 #define KVM_CAP_USER_NMI 22
#ifdef __KVM_HAVE_GUEST_DEBUG
#define KVM_CAP_SET_GUEST_DEBUG 23 #define KVM_CAP_SET_GUEST_DEBUG 23
#endif
#ifdef __KVM_HAVE_PIT #ifdef __KVM_HAVE_PIT
#define KVM_CAP_REINJECT_CONTROL 24 #define KVM_CAP_REINJECT_CONTROL 24
#endif #endif
@ -901,7 +719,6 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_MEMORY_ATTRIBUTES 233 #define KVM_CAP_MEMORY_ATTRIBUTES 233
#define KVM_CAP_GUEST_MEMFD 234 #define KVM_CAP_GUEST_MEMFD 234
#define KVM_CAP_VM_TYPES 235 #define KVM_CAP_VM_TYPES 235
#ifdef KVM_CAP_IRQ_ROUTING
struct kvm_irq_routing_irqchip { struct kvm_irq_routing_irqchip {
__u32 irqchip; __u32 irqchip;
__u32 pin; __u32 pin;
@ -956,37 +773,6 @@ struct kvm_irq_routing {
__u32 flags; __u32 flags;
struct kvm_irq_routing_entry entries[]; struct kvm_irq_routing_entry entries[];
}; };
#endif
#ifdef KVM_CAP_MCE
struct kvm_x86_mce {
__u64 status;
__u64 addr;
__u64 misc;
__u64 mcg_status;
__u8 bank;
__u8 pad1[7];
__u64 pad2[3];
};
#endif
#ifdef KVM_CAP_XEN_HVM
#define KVM_XEN_HVM_CONFIG_HYPERCALL_MSR (1 << 0)
#define KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL (1 << 1)
#define KVM_XEN_HVM_CONFIG_SHARED_INFO (1 << 2)
#define KVM_XEN_HVM_CONFIG_RUNSTATE (1 << 3)
#define KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL (1 << 4)
#define KVM_XEN_HVM_CONFIG_EVTCHN_SEND (1 << 5)
#define KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG (1 << 6)
#define KVM_XEN_HVM_CONFIG_PVCLOCK_TSC_UNSTABLE (1 << 7)
struct kvm_xen_hvm_config {
__u32 flags;
__u32 msr;
__u64 blob_addr_32;
__u64 blob_addr_64;
__u8 blob_size_32;
__u8 blob_size_64;
__u8 pad2[30];
};
#endif
#define KVM_IRQFD_FLAG_DEASSIGN (1 << 0) #define KVM_IRQFD_FLAG_DEASSIGN (1 << 0)
#define KVM_IRQFD_FLAG_RESAMPLE (1 << 1) #define KVM_IRQFD_FLAG_RESAMPLE (1 << 1)
struct kvm_irqfd { struct kvm_irqfd {
@ -1118,11 +904,6 @@ struct kvm_vfio_spapr_tce {
#define KVM_SET_TSS_ADDR _IO(KVMIO, 0x47) #define KVM_SET_TSS_ADDR _IO(KVMIO, 0x47)
#define KVM_SET_IDENTITY_MAP_ADDR _IOW(KVMIO, 0x48, __u64) #define KVM_SET_IDENTITY_MAP_ADDR _IOW(KVMIO, 0x48, __u64)
#define KVM_SET_USER_MEMORY_REGION2 _IOW(KVMIO, 0x49, struct kvm_userspace_memory_region2) #define KVM_SET_USER_MEMORY_REGION2 _IOW(KVMIO, 0x49, struct kvm_userspace_memory_region2)
struct kvm_s390_ucas_mapping {
__u64 user_addr;
__u64 vcpu_addr;
__u64 length;
};
#define KVM_S390_UCAS_MAP _IOW(KVMIO, 0x50, struct kvm_s390_ucas_mapping) #define KVM_S390_UCAS_MAP _IOW(KVMIO, 0x50, struct kvm_s390_ucas_mapping)
#define KVM_S390_UCAS_UNMAP _IOW(KVMIO, 0x51, struct kvm_s390_ucas_mapping) #define KVM_S390_UCAS_UNMAP _IOW(KVMIO, 0x51, struct kvm_s390_ucas_mapping)
#define KVM_S390_VCPU_FAULT _IOW(KVMIO, 0x52, unsigned long) #define KVM_S390_VCPU_FAULT _IOW(KVMIO, 0x52, unsigned long)
@ -1245,322 +1026,16 @@ struct kvm_enc_region {
#define KVM_ARM_VCPU_FINALIZE _IOW(KVMIO, 0xc2, int) #define KVM_ARM_VCPU_FINALIZE _IOW(KVMIO, 0xc2, int)
#define KVM_S390_NORMAL_RESET _IO(KVMIO, 0xc3) #define KVM_S390_NORMAL_RESET _IO(KVMIO, 0xc3)
#define KVM_S390_CLEAR_RESET _IO(KVMIO, 0xc4) #define KVM_S390_CLEAR_RESET _IO(KVMIO, 0xc4)
struct kvm_s390_pv_sec_parm {
__u64 origin;
__u64 length;
};
struct kvm_s390_pv_unp {
__u64 addr;
__u64 size;
__u64 tweak;
};
enum pv_cmd_dmp_id {
KVM_PV_DUMP_INIT,
KVM_PV_DUMP_CONFIG_STOR_STATE,
KVM_PV_DUMP_COMPLETE,
KVM_PV_DUMP_CPU,
};
struct kvm_s390_pv_dmp {
__u64 subcmd;
__u64 buff_addr;
__u64 buff_len;
__u64 gaddr;
__u64 reserved[4];
};
enum pv_cmd_info_id {
KVM_PV_INFO_VM,
KVM_PV_INFO_DUMP,
};
struct kvm_s390_pv_info_dump {
__u64 dump_cpu_buffer_len;
__u64 dump_config_mem_buffer_per_1m;
__u64 dump_config_finalize_len;
};
struct kvm_s390_pv_info_vm {
__u64 inst_calls_list[4];
__u64 max_cpus;
__u64 max_guests;
__u64 max_guest_addr;
__u64 feature_indication;
};
struct kvm_s390_pv_info_header {
__u32 id;
__u32 len_max;
__u32 len_written;
__u32 reserved;
};
struct kvm_s390_pv_info {
struct kvm_s390_pv_info_header header;
union {
struct kvm_s390_pv_info_dump dump;
struct kvm_s390_pv_info_vm vm;
};
};
enum pv_cmd_id {
KVM_PV_ENABLE,
KVM_PV_DISABLE,
KVM_PV_SET_SEC_PARMS,
KVM_PV_UNPACK,
KVM_PV_VERIFY,
KVM_PV_PREP_RESET,
KVM_PV_UNSHARE_ALL,
KVM_PV_INFO,
KVM_PV_DUMP,
KVM_PV_ASYNC_CLEANUP_PREPARE,
KVM_PV_ASYNC_CLEANUP_PERFORM,
};
struct kvm_pv_cmd {
__u32 cmd;
__u16 rc;
__u16 rrc;
__u64 data;
__u32 flags;
__u32 reserved[3];
};
#define KVM_S390_PV_COMMAND _IOWR(KVMIO, 0xc5, struct kvm_pv_cmd) #define KVM_S390_PV_COMMAND _IOWR(KVMIO, 0xc5, struct kvm_pv_cmd)
#define KVM_X86_SET_MSR_FILTER _IOW(KVMIO, 0xc6, struct kvm_msr_filter) #define KVM_X86_SET_MSR_FILTER _IOW(KVMIO, 0xc6, struct kvm_msr_filter)
#define KVM_RESET_DIRTY_RINGS _IO(KVMIO, 0xc7) #define KVM_RESET_DIRTY_RINGS _IO(KVMIO, 0xc7)
#define KVM_XEN_HVM_GET_ATTR _IOWR(KVMIO, 0xc8, struct kvm_xen_hvm_attr) #define KVM_XEN_HVM_GET_ATTR _IOWR(KVMIO, 0xc8, struct kvm_xen_hvm_attr)
#define KVM_XEN_HVM_SET_ATTR _IOW(KVMIO, 0xc9, struct kvm_xen_hvm_attr) #define KVM_XEN_HVM_SET_ATTR _IOW(KVMIO, 0xc9, struct kvm_xen_hvm_attr)
struct kvm_xen_hvm_attr {
__u16 type;
__u16 pad[3];
union {
__u8 long_mode;
__u8 vector;
__u8 runstate_update_flag;
struct {
__u64 gfn;
#define KVM_XEN_INVALID_GFN ((__u64) - 1)
} shared_info;
struct {
__u32 send_port;
__u32 type;
__u32 flags;
#define KVM_XEN_EVTCHN_DEASSIGN (1 << 0)
#define KVM_XEN_EVTCHN_UPDATE (1 << 1)
#define KVM_XEN_EVTCHN_RESET (1 << 2)
union {
struct {
__u32 port;
__u32 vcpu;
__u32 priority;
} port;
struct {
__u32 port;
__s32 fd;
} eventfd;
__u32 padding[4];
} deliver;
} evtchn;
__u32 xen_version;
__u64 pad[8];
} u;
};
#define KVM_XEN_ATTR_TYPE_LONG_MODE 0x0
#define KVM_XEN_ATTR_TYPE_SHARED_INFO 0x1
#define KVM_XEN_ATTR_TYPE_UPCALL_VECTOR 0x2
#define KVM_XEN_ATTR_TYPE_EVTCHN 0x3
#define KVM_XEN_ATTR_TYPE_XEN_VERSION 0x4
#define KVM_XEN_ATTR_TYPE_RUNSTATE_UPDATE_FLAG 0x5
#define KVM_XEN_VCPU_GET_ATTR _IOWR(KVMIO, 0xca, struct kvm_xen_vcpu_attr) #define KVM_XEN_VCPU_GET_ATTR _IOWR(KVMIO, 0xca, struct kvm_xen_vcpu_attr)
#define KVM_XEN_VCPU_SET_ATTR _IOW(KVMIO, 0xcb, struct kvm_xen_vcpu_attr) #define KVM_XEN_VCPU_SET_ATTR _IOW(KVMIO, 0xcb, struct kvm_xen_vcpu_attr)
#define KVM_XEN_HVM_EVTCHN_SEND _IOW(KVMIO, 0xd0, struct kvm_irq_routing_xen_evtchn) #define KVM_XEN_HVM_EVTCHN_SEND _IOW(KVMIO, 0xd0, struct kvm_irq_routing_xen_evtchn)
#define KVM_GET_SREGS2 _IOR(KVMIO, 0xcc, struct kvm_sregs2) #define KVM_GET_SREGS2 _IOR(KVMIO, 0xcc, struct kvm_sregs2)
#define KVM_SET_SREGS2 _IOW(KVMIO, 0xcd, struct kvm_sregs2) #define KVM_SET_SREGS2 _IOW(KVMIO, 0xcd, struct kvm_sregs2)
struct kvm_xen_vcpu_attr {
__u16 type;
__u16 pad[3];
union {
__u64 gpa;
#define KVM_XEN_INVALID_GPA ((__u64) - 1)
__u64 pad[8];
struct {
__u64 state;
__u64 state_entry_time;
__u64 time_running;
__u64 time_runnable;
__u64 time_blocked;
__u64 time_offline;
} runstate;
__u32 vcpu_id;
struct {
__u32 port;
__u32 priority;
__u64 expires_ns;
} timer;
__u8 vector;
} u;
};
#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_INFO 0x0
#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_TIME_INFO 0x1
#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADDR 0x2
#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_CURRENT 0x3
#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_DATA 0x4
#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADJUST 0x5
#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_ID 0x6
#define KVM_XEN_VCPU_ATTR_TYPE_TIMER 0x7
#define KVM_XEN_VCPU_ATTR_TYPE_UPCALL_VECTOR 0x8
enum sev_cmd_id {
KVM_SEV_INIT = 0,
KVM_SEV_ES_INIT,
KVM_SEV_LAUNCH_START,
KVM_SEV_LAUNCH_UPDATE_DATA,
KVM_SEV_LAUNCH_UPDATE_VMSA,
KVM_SEV_LAUNCH_SECRET,
KVM_SEV_LAUNCH_MEASURE,
KVM_SEV_LAUNCH_FINISH,
KVM_SEV_SEND_START,
KVM_SEV_SEND_UPDATE_DATA,
KVM_SEV_SEND_UPDATE_VMSA,
KVM_SEV_SEND_FINISH,
KVM_SEV_RECEIVE_START,
KVM_SEV_RECEIVE_UPDATE_DATA,
KVM_SEV_RECEIVE_UPDATE_VMSA,
KVM_SEV_RECEIVE_FINISH,
KVM_SEV_GUEST_STATUS,
KVM_SEV_DBG_DECRYPT,
KVM_SEV_DBG_ENCRYPT,
KVM_SEV_CERT_EXPORT,
KVM_SEV_GET_ATTESTATION_REPORT,
KVM_SEV_SEND_CANCEL,
KVM_SEV_NR_MAX,
};
struct kvm_sev_cmd {
__u32 id;
__u64 data;
__u32 error;
__u32 sev_fd;
};
struct kvm_sev_launch_start {
__u32 handle;
__u32 policy;
__u64 dh_uaddr;
__u32 dh_len;
__u64 session_uaddr;
__u32 session_len;
};
struct kvm_sev_launch_update_data {
__u64 uaddr;
__u32 len;
};
struct kvm_sev_launch_secret {
__u64 hdr_uaddr;
__u32 hdr_len;
__u64 guest_uaddr;
__u32 guest_len;
__u64 trans_uaddr;
__u32 trans_len;
};
struct kvm_sev_launch_measure {
__u64 uaddr;
__u32 len;
};
struct kvm_sev_guest_status {
__u32 handle;
__u32 policy;
__u32 state;
};
struct kvm_sev_dbg {
__u64 src_uaddr;
__u64 dst_uaddr;
__u32 len;
};
struct kvm_sev_attestation_report {
__u8 mnonce[16];
__u64 uaddr;
__u32 len;
};
struct kvm_sev_send_start {
__u32 policy;
__u64 pdh_cert_uaddr;
__u32 pdh_cert_len;
__u64 plat_certs_uaddr;
__u32 plat_certs_len;
__u64 amd_certs_uaddr;
__u32 amd_certs_len;
__u64 session_uaddr;
__u32 session_len;
};
struct kvm_sev_send_update_data {
__u64 hdr_uaddr;
__u32 hdr_len;
__u64 guest_uaddr;
__u32 guest_len;
__u64 trans_uaddr;
__u32 trans_len;
};
struct kvm_sev_receive_start {
__u32 handle;
__u32 policy;
__u64 pdh_uaddr;
__u32 pdh_len;
__u64 session_uaddr;
__u32 session_len;
};
struct kvm_sev_receive_update_data {
__u64 hdr_uaddr;
__u32 hdr_len;
__u64 guest_uaddr;
__u32 guest_len;
__u64 trans_uaddr;
__u32 trans_len;
};
#define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0)
#define KVM_DEV_ASSIGN_PCI_2_3 (1 << 1)
#define KVM_DEV_ASSIGN_MASK_INTX (1 << 2)
struct kvm_assigned_pci_dev {
__u32 assigned_dev_id;
__u32 busnr;
__u32 devfn;
__u32 flags;
__u32 segnr;
union {
__u32 reserved[11];
};
};
#define KVM_DEV_IRQ_HOST_INTX (1 << 0)
#define KVM_DEV_IRQ_HOST_MSI (1 << 1)
#define KVM_DEV_IRQ_HOST_MSIX (1 << 2)
#define KVM_DEV_IRQ_GUEST_INTX (1 << 8)
#define KVM_DEV_IRQ_GUEST_MSI (1 << 9)
#define KVM_DEV_IRQ_GUEST_MSIX (1 << 10)
#define KVM_DEV_IRQ_HOST_MASK 0x00ff
#define KVM_DEV_IRQ_GUEST_MASK 0xff00
struct kvm_assigned_irq {
__u32 assigned_dev_id;
__u32 host_irq;
__u32 guest_irq;
__u32 flags;
union {
__u32 reserved[12];
};
};
struct kvm_assigned_msix_nr {
__u32 assigned_dev_id;
__u16 entry_nr;
__u16 padding;
};
#define KVM_MAX_MSIX_PER_DEV 256
struct kvm_assigned_msix_entry {
__u32 assigned_dev_id;
__u32 gsi;
__u16 entry;
__u16 padding[3];
};
#define KVM_X2APIC_API_USE_32BIT_IDS (1ULL << 0)
#define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK (1ULL << 1)
#define KVM_ARM_DEV_EL1_VTIMER (1 << 0)
#define KVM_ARM_DEV_EL1_PTIMER (1 << 1)
#define KVM_ARM_DEV_PMU (1 << 2)
struct kvm_hyperv_eventfd {
__u32 conn_id;
__s32 fd;
__u32 flags;
__u32 padding[3];
};
#define KVM_HYPERV_CONN_ID_MASK 0x00ffffff
#define KVM_HYPERV_EVENTFD_DEASSIGN (1 << 0)
#define KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE (1 << 0) #define KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE (1 << 0)
#define KVM_DIRTY_LOG_INITIALLY_SET (1 << 1) #define KVM_DIRTY_LOG_INITIALLY_SET (1 << 1)
#ifndef KVM_DIRTY_LOG_PAGE_OFFSET #ifndef KVM_DIRTY_LOG_PAGE_OFFSET
@ -1620,26 +1095,6 @@ struct kvm_stats_desc {
#define KVM_X86_NOTIFY_VMEXIT_ENABLED (1ULL << 0) #define KVM_X86_NOTIFY_VMEXIT_ENABLED (1ULL << 0)
#define KVM_X86_NOTIFY_VMEXIT_USER (1ULL << 1) #define KVM_X86_NOTIFY_VMEXIT_USER (1ULL << 1)
#define KVM_S390_ZPCI_OP _IOW(KVMIO, 0xd1, struct kvm_s390_zpci_op) #define KVM_S390_ZPCI_OP _IOW(KVMIO, 0xd1, struct kvm_s390_zpci_op)
struct kvm_s390_zpci_op {
__u32 fh;
__u8 op;
__u8 pad[3];
union {
struct {
__u64 ibv;
__u64 sb;
__u32 flags;
__u32 noi;
__u8 isc;
__u8 sbo;
__u16 pad;
} reg_aen;
__u64 reserved[8];
} u;
};
#define KVM_S390_ZPCIOP_REG_AEN 0
#define KVM_S390_ZPCIOP_DEREG_AEN 1
#define KVM_S390_ZPCIOP_REGAEN_HOST (1 << 0)
#define KVM_SET_MEMORY_ATTRIBUTES _IOW(KVMIO, 0xd2, struct kvm_memory_attributes) #define KVM_SET_MEMORY_ATTRIBUTES _IOW(KVMIO, 0xd2, struct kvm_memory_attributes)
struct kvm_memory_attributes { struct kvm_memory_attributes {
__u64 address; __u64 address;

View file

@ -28,6 +28,8 @@ struct lsm_ctx {
#define LSM_ID_LOCKDOWN 108 #define LSM_ID_LOCKDOWN 108
#define LSM_ID_BPF 109 #define LSM_ID_BPF 109
#define LSM_ID_LANDLOCK 110 #define LSM_ID_LANDLOCK 110
#define LSM_ID_IMA 111
#define LSM_ID_EVM 112
#define LSM_ATTR_UNDEF 0 #define LSM_ATTR_UNDEF 0
#define LSM_ATTR_CURRENT 100 #define LSM_ATTR_CURRENT 100
#define LSM_ATTR_EXEC 101 #define LSM_ATTR_EXEC 101

View file

@ -90,4 +90,5 @@
#define DMA_BUF_MAGIC 0x444d4142 #define DMA_BUF_MAGIC 0x444d4142
#define DEVMEM_MAGIC 0x454d444d #define DEVMEM_MAGIC 0x454d444d
#define SECRETMEM_MAGIC 0x5345434d #define SECRETMEM_MAGIC 0x5345434d
#define PID_FS_MAGIC 0x50494446
#endif #endif

View file

@ -38,9 +38,18 @@ struct sockaddr_mctp_ext {
#define MCTP_OPT_ADDR_EXT 1 #define MCTP_OPT_ADDR_EXT 1
#define SIOCMCTPALLOCTAG (SIOCPROTOPRIVATE + 0) #define SIOCMCTPALLOCTAG (SIOCPROTOPRIVATE + 0)
#define SIOCMCTPDROPTAG (SIOCPROTOPRIVATE + 1) #define SIOCMCTPDROPTAG (SIOCPROTOPRIVATE + 1)
#define SIOCMCTPALLOCTAG2 (SIOCPROTOPRIVATE + 2)
#define SIOCMCTPDROPTAG2 (SIOCPROTOPRIVATE + 3)
struct mctp_ioc_tag_ctl { struct mctp_ioc_tag_ctl {
mctp_eid_t peer_addr; mctp_eid_t peer_addr;
__u8 tag; __u8 tag;
__u16 flags; __u16 flags;
}; };
struct mctp_ioc_tag_ctl2 {
unsigned int net;
mctp_eid_t peer_addr;
mctp_eid_t local_addr;
__u16 flags;
__u8 tag;
};
#endif #endif

View file

@ -110,6 +110,8 @@
#define MDIO_PMA_SPEED_1000 0x0010 #define MDIO_PMA_SPEED_1000 0x0010
#define MDIO_PMA_SPEED_100 0x0020 #define MDIO_PMA_SPEED_100 0x0020
#define MDIO_PMA_SPEED_10 0x0040 #define MDIO_PMA_SPEED_10 0x0040
#define MDIO_PMA_SPEED_2_5G 0x2000
#define MDIO_PMA_SPEED_5G 0x4000
#define MDIO_PCS_SPEED_10P2B 0x0002 #define MDIO_PCS_SPEED_10P2B 0x0002
#define MDIO_PCS_SPEED_2_5G 0x0040 #define MDIO_PCS_SPEED_2_5G 0x0040
#define MDIO_PCS_SPEED_5G 0x0080 #define MDIO_PCS_SPEED_5G 0x0080
@ -273,6 +275,8 @@
#define MDIO_AN_T1_ADV_L_ACK ADVERTISE_LPACK #define MDIO_AN_T1_ADV_L_ACK ADVERTISE_LPACK
#define MDIO_AN_T1_ADV_L_NEXT_PAGE_REQ ADVERTISE_NPAGE #define MDIO_AN_T1_ADV_L_NEXT_PAGE_REQ ADVERTISE_NPAGE
#define MDIO_AN_T1_ADV_M_B10L 0x4000 #define MDIO_AN_T1_ADV_M_B10L 0x4000
#define MDIO_AN_T1_ADV_M_1000BT1 0x0080
#define MDIO_AN_T1_ADV_M_100BT1 0x0020
#define MDIO_AN_T1_ADV_M_MST 0x0010 #define MDIO_AN_T1_ADV_M_MST 0x0010
#define MDIO_AN_T1_ADV_H_10L_TX_HI_REQ 0x1000 #define MDIO_AN_T1_ADV_H_10L_TX_HI_REQ 0x1000
#define MDIO_AN_T1_ADV_H_10L_TX_HI 0x2000 #define MDIO_AN_T1_ADV_H_10L_TX_HI 0x2000

View file

@ -14,6 +14,7 @@ enum {
MPOL_INTERLEAVE, MPOL_INTERLEAVE,
MPOL_LOCAL, MPOL_LOCAL,
MPOL_PREFERRED_MANY, MPOL_PREFERRED_MANY,
MPOL_WEIGHTED_INTERLEAVE,
MPOL_MAX, MPOL_MAX,
}; };
#define MPOL_F_STATIC_NODES (1 << 15) #define MPOL_F_STATIC_NODES (1 << 15)

View file

@ -31,6 +31,9 @@ enum netdev_queue_type {
NETDEV_QUEUE_TYPE_RX, NETDEV_QUEUE_TYPE_RX,
NETDEV_QUEUE_TYPE_TX, NETDEV_QUEUE_TYPE_TX,
}; };
enum netdev_qstats_scope {
NETDEV_QSTATS_SCOPE_QUEUE = 1,
};
enum { enum {
NETDEV_A_DEV_IFINDEX = 1, NETDEV_A_DEV_IFINDEX = 1,
NETDEV_A_DEV_PAD, NETDEV_A_DEV_PAD,
@ -83,6 +86,19 @@ enum {
__NETDEV_A_QUEUE_MAX, __NETDEV_A_QUEUE_MAX,
NETDEV_A_QUEUE_MAX = (__NETDEV_A_QUEUE_MAX - 1) NETDEV_A_QUEUE_MAX = (__NETDEV_A_QUEUE_MAX - 1)
}; };
enum {
NETDEV_A_QSTATS_IFINDEX = 1,
NETDEV_A_QSTATS_QUEUE_TYPE,
NETDEV_A_QSTATS_QUEUE_ID,
NETDEV_A_QSTATS_SCOPE,
NETDEV_A_QSTATS_RX_PACKETS = 8,
NETDEV_A_QSTATS_RX_BYTES,
NETDEV_A_QSTATS_TX_PACKETS,
NETDEV_A_QSTATS_TX_BYTES,
NETDEV_A_QSTATS_RX_ALLOC_FAIL,
__NETDEV_A_QSTATS_MAX,
NETDEV_A_QSTATS_MAX = (__NETDEV_A_QSTATS_MAX - 1)
};
enum { enum {
NETDEV_CMD_DEV_GET = 1, NETDEV_CMD_DEV_GET = 1,
NETDEV_CMD_DEV_ADD_NTF, NETDEV_CMD_DEV_ADD_NTF,
@ -95,6 +111,7 @@ enum {
NETDEV_CMD_PAGE_POOL_STATS_GET, NETDEV_CMD_PAGE_POOL_STATS_GET,
NETDEV_CMD_QUEUE_GET, NETDEV_CMD_QUEUE_GET,
NETDEV_CMD_NAPI_GET, NETDEV_CMD_NAPI_GET,
NETDEV_CMD_QSTATS_GET,
__NETDEV_CMD_MAX, __NETDEV_CMD_MAX,
NETDEV_CMD_MAX = (__NETDEV_CMD_MAX - 1) NETDEV_CMD_MAX = (__NETDEV_CMD_MAX - 1)
}; };

View file

@ -103,8 +103,9 @@ enum nft_hook_attributes {
enum nft_table_flags { enum nft_table_flags {
NFT_TABLE_F_DORMANT = 0x1, NFT_TABLE_F_DORMANT = 0x1,
NFT_TABLE_F_OWNER = 0x2, NFT_TABLE_F_OWNER = 0x2,
NFT_TABLE_F_PERSIST = 0x4,
}; };
#define NFT_TABLE_F_MASK (NFT_TABLE_F_DORMANT | NFT_TABLE_F_OWNER) #define NFT_TABLE_F_MASK (NFT_TABLE_F_DORMANT | NFT_TABLE_F_OWNER | NFT_TABLE_F_PERSIST)
enum nft_table_attributes { enum nft_table_attributes {
NFTA_TABLE_UNSPEC, NFTA_TABLE_UNSPEC,
NFTA_TABLE_NAME, NFTA_TABLE_NAME,

View file

@ -26,6 +26,8 @@ enum {
__NEXTHOP_GRP_TYPE_MAX, __NEXTHOP_GRP_TYPE_MAX,
}; };
#define NEXTHOP_GRP_TYPE_MAX (__NEXTHOP_GRP_TYPE_MAX - 1) #define NEXTHOP_GRP_TYPE_MAX (__NEXTHOP_GRP_TYPE_MAX - 1)
#define NHA_OP_FLAG_DUMP_STATS BIT(0)
#define NHA_OP_FLAG_DUMP_HW_STATS BIT(1)
enum { enum {
NHA_UNSPEC, NHA_UNSPEC,
NHA_ID, NHA_ID,
@ -41,6 +43,10 @@ enum {
NHA_FDB, NHA_FDB,
NHA_RES_GROUP, NHA_RES_GROUP,
NHA_RES_BUCKET, NHA_RES_BUCKET,
NHA_OP_FLAGS,
NHA_GROUP_STATS,
NHA_HW_STATS_ENABLE,
NHA_HW_STATS_USED,
__NHA_MAX, __NHA_MAX,
}; };
#define NHA_MAX (__NHA_MAX - 1) #define NHA_MAX (__NHA_MAX - 1)
@ -63,4 +69,18 @@ enum {
__NHA_RES_BUCKET_MAX, __NHA_RES_BUCKET_MAX,
}; };
#define NHA_RES_BUCKET_MAX (__NHA_RES_BUCKET_MAX - 1) #define NHA_RES_BUCKET_MAX (__NHA_RES_BUCKET_MAX - 1)
enum {
NHA_GROUP_STATS_UNSPEC,
NHA_GROUP_STATS_ENTRY,
__NHA_GROUP_STATS_MAX,
};
#define NHA_GROUP_STATS_MAX (__NHA_GROUP_STATS_MAX - 1)
enum {
NHA_GROUP_STATS_ENTRY_UNSPEC,
NHA_GROUP_STATS_ENTRY_ID,
NHA_GROUP_STATS_ENTRY_PACKETS,
NHA_GROUP_STATS_ENTRY_PACKETS_HW,
__NHA_GROUP_STATS_ENTRY_MAX,
};
#define NHA_GROUP_STATS_ENTRY_MAX (__NHA_GROUP_STATS_ENTRY_MAX - 1)
#endif #endif

View file

@ -527,6 +527,7 @@ enum nl80211_attrs {
NL80211_ATTR_BSS_DUMP_INCLUDE_USE_DATA, NL80211_ATTR_BSS_DUMP_INCLUDE_USE_DATA,
NL80211_ATTR_MLO_TTLM_DLINK, NL80211_ATTR_MLO_TTLM_DLINK,
NL80211_ATTR_MLO_TTLM_ULINK, NL80211_ATTR_MLO_TTLM_ULINK,
NL80211_ATTR_ASSOC_SPP_AMSDU,
__NL80211_ATTR_AFTER_LAST, __NL80211_ATTR_AFTER_LAST,
NUM_NL80211_ATTR = __NL80211_ATTR_AFTER_LAST, NUM_NL80211_ATTR = __NL80211_ATTR_AFTER_LAST,
NL80211_ATTR_MAX = __NL80211_ATTR_AFTER_LAST - 1 NL80211_ATTR_MAX = __NL80211_ATTR_AFTER_LAST - 1
@ -602,6 +603,7 @@ enum nl80211_sta_flags {
NL80211_STA_FLAG_AUTHENTICATED, NL80211_STA_FLAG_AUTHENTICATED,
NL80211_STA_FLAG_TDLS_PEER, NL80211_STA_FLAG_TDLS_PEER,
NL80211_STA_FLAG_ASSOCIATED, NL80211_STA_FLAG_ASSOCIATED,
NL80211_STA_FLAG_SPP_AMSDU,
__NL80211_STA_FLAG_AFTER_LAST, __NL80211_STA_FLAG_AFTER_LAST,
NL80211_STA_FLAG_MAX = __NL80211_STA_FLAG_AFTER_LAST - 1 NL80211_STA_FLAG_MAX = __NL80211_STA_FLAG_AFTER_LAST - 1
}; };
@ -873,8 +875,9 @@ enum nl80211_frequency_attr {
NL80211_FREQUENCY_ATTR_NO_EHT, NL80211_FREQUENCY_ATTR_NO_EHT,
NL80211_FREQUENCY_ATTR_PSD, NL80211_FREQUENCY_ATTR_PSD,
NL80211_FREQUENCY_ATTR_DFS_CONCURRENT, NL80211_FREQUENCY_ATTR_DFS_CONCURRENT,
NL80211_FREQUENCY_ATTR_NO_UHB_VLP_CLIENT, NL80211_FREQUENCY_ATTR_NO_6GHZ_VLP_CLIENT,
NL80211_FREQUENCY_ATTR_NO_UHB_AFC_CLIENT, NL80211_FREQUENCY_ATTR_NO_6GHZ_AFC_CLIENT,
NL80211_FREQUENCY_ATTR_CAN_MONITOR,
__NL80211_FREQUENCY_ATTR_AFTER_LAST, __NL80211_FREQUENCY_ATTR_AFTER_LAST,
NL80211_FREQUENCY_ATTR_MAX = __NL80211_FREQUENCY_ATTR_AFTER_LAST - 1 NL80211_FREQUENCY_ATTR_MAX = __NL80211_FREQUENCY_ATTR_AFTER_LAST - 1
}; };
@ -883,6 +886,8 @@ enum nl80211_frequency_attr {
#define NL80211_FREQUENCY_ATTR_NO_IBSS NL80211_FREQUENCY_ATTR_NO_IR #define NL80211_FREQUENCY_ATTR_NO_IBSS NL80211_FREQUENCY_ATTR_NO_IR
#define NL80211_FREQUENCY_ATTR_NO_IR NL80211_FREQUENCY_ATTR_NO_IR #define NL80211_FREQUENCY_ATTR_NO_IR NL80211_FREQUENCY_ATTR_NO_IR
#define NL80211_FREQUENCY_ATTR_GO_CONCURRENT NL80211_FREQUENCY_ATTR_IR_CONCURRENT #define NL80211_FREQUENCY_ATTR_GO_CONCURRENT NL80211_FREQUENCY_ATTR_IR_CONCURRENT
#define NL80211_FREQUENCY_ATTR_NO_UHB_VLP_CLIENT NL80211_FREQUENCY_ATTR_NO_6GHZ_VLP_CLIENT
#define NL80211_FREQUENCY_ATTR_NO_UHB_AFC_CLIENT NL80211_FREQUENCY_ATTR_NO_6GHZ_AFC_CLIENT
enum nl80211_bitrate_attr { enum nl80211_bitrate_attr {
__NL80211_BITRATE_ATTR_INVALID, __NL80211_BITRATE_ATTR_INVALID,
NL80211_BITRATE_ATTR_RATE, NL80211_BITRATE_ATTR_RATE,
@ -948,14 +953,16 @@ enum nl80211_reg_rule_flags {
NL80211_RRF_NO_EHT = 1 << 19, NL80211_RRF_NO_EHT = 1 << 19,
NL80211_RRF_PSD = 1 << 20, NL80211_RRF_PSD = 1 << 20,
NL80211_RRF_DFS_CONCURRENT = 1 << 21, NL80211_RRF_DFS_CONCURRENT = 1 << 21,
NL80211_RRF_NO_UHB_VLP_CLIENT = 1 << 22, NL80211_RRF_NO_6GHZ_VLP_CLIENT = 1 << 22,
NL80211_RRF_NO_UHB_AFC_CLIENT = 1 << 23, NL80211_RRF_NO_6GHZ_AFC_CLIENT = 1 << 23,
}; };
#define NL80211_RRF_PASSIVE_SCAN NL80211_RRF_NO_IR #define NL80211_RRF_PASSIVE_SCAN NL80211_RRF_NO_IR
#define NL80211_RRF_NO_IBSS NL80211_RRF_NO_IR #define NL80211_RRF_NO_IBSS NL80211_RRF_NO_IR
#define NL80211_RRF_NO_IR NL80211_RRF_NO_IR #define NL80211_RRF_NO_IR NL80211_RRF_NO_IR
#define NL80211_RRF_NO_HT40 (NL80211_RRF_NO_HT40MINUS | NL80211_RRF_NO_HT40PLUS) #define NL80211_RRF_NO_HT40 (NL80211_RRF_NO_HT40MINUS | NL80211_RRF_NO_HT40PLUS)
#define NL80211_RRF_GO_CONCURRENT NL80211_RRF_IR_CONCURRENT #define NL80211_RRF_GO_CONCURRENT NL80211_RRF_IR_CONCURRENT
#define NL80211_RRF_NO_UHB_VLP_CLIENT NL80211_RRF_NO_6GHZ_VLP_CLIENT
#define NL80211_RRF_NO_UHB_AFC_CLIENT NL80211_RRF_NO_6GHZ_AFC_CLIENT
#define NL80211_RRF_NO_IR_ALL (NL80211_RRF_NO_IR | __NL80211_RRF_NO_IBSS) #define NL80211_RRF_NO_IR_ALL (NL80211_RRF_NO_IR | __NL80211_RRF_NO_IBSS)
enum nl80211_dfs_regions { enum nl80211_dfs_regions {
NL80211_DFS_UNSET = 0, NL80211_DFS_UNSET = 0,
@ -1120,8 +1127,9 @@ enum nl80211_bss_use_for {
}; };
enum nl80211_bss_cannot_use_reasons { enum nl80211_bss_cannot_use_reasons {
NL80211_BSS_CANNOT_USE_NSTR_NONPRIMARY = 1 << 0, NL80211_BSS_CANNOT_USE_NSTR_NONPRIMARY = 1 << 0,
NL80211_BSS_CANNOT_USE_UHB_PWR_MISMATCH = 1 << 1, NL80211_BSS_CANNOT_USE_6GHZ_PWR_MISMATCH = 1 << 1,
}; };
#define NL80211_BSS_CANNOT_USE_UHB_PWR_MISMATCH NL80211_BSS_CANNOT_USE_6GHZ_PWR_MISMATCH
enum nl80211_bss { enum nl80211_bss {
__NL80211_BSS_INVALID, __NL80211_BSS_INVALID,
NL80211_BSS_BSSID, NL80211_BSS_BSSID,
@ -1338,6 +1346,7 @@ enum nl80211_wowlan_triggers {
NL80211_WOWLAN_TRIG_WAKEUP_TCP_NOMORETOKENS, NL80211_WOWLAN_TRIG_WAKEUP_TCP_NOMORETOKENS,
NL80211_WOWLAN_TRIG_NET_DETECT, NL80211_WOWLAN_TRIG_NET_DETECT,
NL80211_WOWLAN_TRIG_NET_DETECT_RESULTS, NL80211_WOWLAN_TRIG_NET_DETECT_RESULTS,
NL80211_WOWLAN_TRIG_UNPROTECTED_DEAUTH_DISASSOC,
NUM_NL80211_WOWLAN_TRIG, NUM_NL80211_WOWLAN_TRIG,
MAX_NL80211_WOWLAN_TRIG = NUM_NL80211_WOWLAN_TRIG - 1 MAX_NL80211_WOWLAN_TRIG = NUM_NL80211_WOWLAN_TRIG - 1
}; };
@ -1568,6 +1577,7 @@ enum nl80211_ext_feature_index {
NL80211_EXT_FEATURE_OWE_OFFLOAD, NL80211_EXT_FEATURE_OWE_OFFLOAD,
NL80211_EXT_FEATURE_OWE_OFFLOAD_AP, NL80211_EXT_FEATURE_OWE_OFFLOAD_AP,
NL80211_EXT_FEATURE_DFS_CONCURRENT, NL80211_EXT_FEATURE_DFS_CONCURRENT,
NL80211_EXT_FEATURE_SPP_AMSDU_SUPPORT,
NUM_NL80211_EXT_FEATURES, NUM_NL80211_EXT_FEATURES,
MAX_NL80211_EXT_FEATURES = NUM_NL80211_EXT_FEATURES - 1 MAX_NL80211_EXT_FEATURES = NUM_NL80211_EXT_FEATURES - 1
}; };

View file

@ -9,4 +9,8 @@
#include <linux/types.h> #include <linux/types.h>
#include <linux/fcntl.h> #include <linux/fcntl.h>
#define PIDFD_NONBLOCK O_NONBLOCK #define PIDFD_NONBLOCK O_NONBLOCK
#define PIDFD_THREAD O_EXCL
#define PIDFD_SIGNAL_THREAD (1UL << 0)
#define PIDFD_SIGNAL_THREAD_GROUP (1UL << 1)
#define PIDFD_SIGNAL_PROCESS_GROUP (1UL << 2)
#endif #endif

View file

@ -17,6 +17,9 @@ enum {
SEV_PEK_CERT_IMPORT, SEV_PEK_CERT_IMPORT,
SEV_GET_ID, SEV_GET_ID,
SEV_GET_ID2, SEV_GET_ID2,
SNP_PLATFORM_STATUS,
SNP_COMMIT,
SNP_SET_CONFIG,
SEV_MAX, SEV_MAX,
}; };
typedef enum { typedef enum {
@ -47,6 +50,12 @@ typedef enum {
SEV_RET_RESOURCE_LIMIT, SEV_RET_RESOURCE_LIMIT,
SEV_RET_SECURE_DATA_INVALID, SEV_RET_SECURE_DATA_INVALID,
SEV_RET_INVALID_KEY = 0x27, SEV_RET_INVALID_KEY = 0x27,
SEV_RET_INVALID_PAGE_SIZE,
SEV_RET_INVALID_PAGE_STATE,
SEV_RET_INVALID_MDATA_ENTRY,
SEV_RET_INVALID_PAGE_OWNER,
SEV_RET_INVALID_PAGE_AEAD_OFLOW,
SEV_RET_RMP_INIT_REQUIRED,
SEV_RET_MAX, SEV_RET_MAX,
} sev_ret_code; } sev_ret_code;
struct sev_user_data_status { struct sev_user_data_status {
@ -82,6 +91,28 @@ struct sev_user_data_get_id2 {
__u64 address; __u64 address;
__u32 length; __u32 length;
} __attribute__((__packed__)); } __attribute__((__packed__));
struct sev_user_data_snp_status {
__u8 api_major;
__u8 api_minor;
__u8 state;
__u8 is_rmp_initialized : 1;
__u8 rsvd : 7;
__u32 build_id;
__u32 mask_chip_id : 1;
__u32 mask_chip_key : 1;
__u32 vlek_en : 1;
__u32 rsvd1 : 29;
__u32 guest_count;
__u64 current_tcb_version;
__u64 reported_tcb_version;
} __attribute__((__packed__));
struct sev_user_data_snp_config {
__u64 reported_tcb;
__u32 mask_chip_id : 1;
__u32 mask_chip_key : 1;
__u32 rsvd : 30;
__u8 rsvd1[52];
} __attribute__((__packed__));
struct sev_issue_cmd { struct sev_issue_cmd {
__u32 cmd; __u32 cmd;
__u64 data; __u64 data;

View file

@ -12,9 +12,11 @@
#define PTP_RISING_EDGE (1 << 1) #define PTP_RISING_EDGE (1 << 1)
#define PTP_FALLING_EDGE (1 << 2) #define PTP_FALLING_EDGE (1 << 2)
#define PTP_STRICT_FLAGS (1 << 3) #define PTP_STRICT_FLAGS (1 << 3)
#define PTP_EXT_OFFSET (1 << 4)
#define PTP_EXTTS_EDGES (PTP_RISING_EDGE | PTP_FALLING_EDGE) #define PTP_EXTTS_EDGES (PTP_RISING_EDGE | PTP_FALLING_EDGE)
#define PTP_EXTTS_VALID_FLAGS (PTP_ENABLE_FEATURE | PTP_RISING_EDGE | PTP_FALLING_EDGE | PTP_STRICT_FLAGS) #define PTP_EXTTS_VALID_FLAGS (PTP_ENABLE_FEATURE | PTP_RISING_EDGE | PTP_FALLING_EDGE | PTP_STRICT_FLAGS | PTP_EXT_OFFSET)
#define PTP_EXTTS_V1_VALID_FLAGS (PTP_ENABLE_FEATURE | PTP_RISING_EDGE | PTP_FALLING_EDGE) #define PTP_EXTTS_V1_VALID_FLAGS (PTP_ENABLE_FEATURE | PTP_RISING_EDGE | PTP_FALLING_EDGE)
#define PTP_EXTTS_EVENT_VALID (PTP_ENABLE_FEATURE)
#define PTP_PEROUT_ONE_SHOT (1 << 0) #define PTP_PEROUT_ONE_SHOT (1 << 0)
#define PTP_PEROUT_DUTY_CYCLE (1 << 1) #define PTP_PEROUT_DUTY_CYCLE (1 << 1)
#define PTP_PEROUT_PHASE (1 << 2) #define PTP_PEROUT_PHASE (1 << 2)

View file

@ -97,6 +97,7 @@ enum rkisp1_cif_isp_version {
RKISP1_V11, RKISP1_V11,
RKISP1_V12, RKISP1_V12,
RKISP1_V13, RKISP1_V13,
RKISP1_V_IMX8MP,
}; };
enum rkisp1_cif_isp_histogram_mode { enum rkisp1_cif_isp_histogram_mode {
RKISP1_CIF_ISP_HISTOGRAM_MODE_DISABLE, RKISP1_CIF_ISP_HISTOGRAM_MODE_DISABLE,

View file

@ -53,7 +53,7 @@ struct tc_pedit_sel {
tc_gen; tc_gen;
unsigned char nkeys; unsigned char nkeys;
unsigned char flags; unsigned char flags;
struct tc_pedit_key keys[0]; struct tc_pedit_key keys[] __counted_by(nkeys);
}; };
#define tc_pedit tc_pedit_sel #define tc_pedit tc_pedit_sel
#endif #endif

View file

@ -30,6 +30,7 @@
#define UBLK_U_CMD_END_USER_RECOVERY _IOWR('u', UBLK_CMD_END_USER_RECOVERY, struct ublksrv_ctrl_cmd) #define UBLK_U_CMD_END_USER_RECOVERY _IOWR('u', UBLK_CMD_END_USER_RECOVERY, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_GET_DEV_INFO2 _IOR('u', UBLK_CMD_GET_DEV_INFO2, struct ublksrv_ctrl_cmd) #define UBLK_U_CMD_GET_DEV_INFO2 _IOR('u', UBLK_CMD_GET_DEV_INFO2, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_GET_FEATURES _IOR('u', 0x13, struct ublksrv_ctrl_cmd) #define UBLK_U_CMD_GET_FEATURES _IOR('u', 0x13, struct ublksrv_ctrl_cmd)
#define UBLK_U_CMD_DEL_DEV_ASYNC _IOR('u', 0x14, struct ublksrv_ctrl_cmd)
#define UBLK_FEATURES_LEN 8 #define UBLK_FEATURES_LEN 8
#define UBLK_IO_FETCH_REQ 0x20 #define UBLK_IO_FETCH_REQ 0x20
#define UBLK_IO_COMMIT_AND_FETCH_REQ 0x21 #define UBLK_IO_COMMIT_AND_FETCH_REQ 0x21

View file

@ -286,6 +286,7 @@ struct usb_otg20_descriptor {
#define USB_OTG_SRP (1 << 0) #define USB_OTG_SRP (1 << 0)
#define USB_OTG_HNP (1 << 1) #define USB_OTG_HNP (1 << 1)
#define USB_OTG_ADP (1 << 2) #define USB_OTG_ADP (1 << 2)
#define USB_OTG_RSP (1 << 3)
#define OTG_STS_SELECTOR 0xF000 #define OTG_STS_SELECTOR 0xF000
struct usb_debug_descriptor { struct usb_debug_descriptor {
__u8 bLength; __u8 bLength;

View file

@ -69,6 +69,12 @@ struct usb_ext_prop_desc {
__le32 dwPropertyDataType; __le32 dwPropertyDataType;
__le16 wPropertyNameLength; __le16 wPropertyNameLength;
} __attribute__((packed)); } __attribute__((packed));
#define USB_FFS_DMABUF_TRANSFER_MASK 0x0
struct usb_ffs_dmabuf_transfer_req {
int fd;
__u32 flags;
__u64 length;
} __attribute__((packed));
struct usb_functionfs_strings_head { struct usb_functionfs_strings_head {
__le32 magic; __le32 magic;
__le32 length; __le32 length;
@ -97,4 +103,7 @@ struct usb_functionfs_event {
#define FUNCTIONFS_INTERFACE_REVMAP _IO('g', 128) #define FUNCTIONFS_INTERFACE_REVMAP _IO('g', 128)
#define FUNCTIONFS_ENDPOINT_REVMAP _IO('g', 129) #define FUNCTIONFS_ENDPOINT_REVMAP _IO('g', 129)
#define FUNCTIONFS_ENDPOINT_DESC _IOR('g', 130, struct usb_endpoint_descriptor) #define FUNCTIONFS_ENDPOINT_DESC _IOR('g', 130, struct usb_endpoint_descriptor)
#define FUNCTIONFS_DMABUF_ATTACH _IOW('g', 131, int)
#define FUNCTIONFS_DMABUF_DETACH _IOW('g', 132, int)
#define FUNCTIONFS_DMABUF_TRANSFER _IOW('g', 133, struct usb_ffs_dmabuf_transfer_req)
#endif #endif

View file

@ -9,11 +9,13 @@
#include <linux/types.h> #include <linux/types.h>
#include <linux/ioctl.h> #include <linux/ioctl.h>
#define USER_EVENTS_SYSTEM "user_events" #define USER_EVENTS_SYSTEM "user_events"
#define USER_EVENTS_MULTI_SYSTEM "user_events_multi"
#define USER_EVENTS_PREFIX "u:" #define USER_EVENTS_PREFIX "u:"
#define DYN_LOC(offset,size) ((size) << 16 | (offset)) #define DYN_LOC(offset,size) ((size) << 16 | (offset))
enum user_reg_flag { enum user_reg_flag {
USER_EVENT_REG_PERSIST = 1U << 0, USER_EVENT_REG_PERSIST = 1U << 0,
USER_EVENT_REG_MAX = 1U << 1, USER_EVENT_REG_MULTI_FORMAT = 1U << 1,
USER_EVENT_REG_MAX = 1U << 2,
}; };
struct user_reg { struct user_reg {
__u32 size; __u32 size;

View file

@ -41,6 +41,22 @@ enum vdpa_attr {
VDPA_ATTR_DEV_VENDOR_ATTR_NAME, VDPA_ATTR_DEV_VENDOR_ATTR_NAME,
VDPA_ATTR_DEV_VENDOR_ATTR_VALUE, VDPA_ATTR_DEV_VENDOR_ATTR_VALUE,
VDPA_ATTR_DEV_FEATURES, VDPA_ATTR_DEV_FEATURES,
VDPA_ATTR_DEV_BLK_CFG_CAPACITY,
VDPA_ATTR_DEV_BLK_CFG_SIZE_MAX,
VDPA_ATTR_DEV_BLK_CFG_BLK_SIZE,
VDPA_ATTR_DEV_BLK_CFG_SEG_MAX,
VDPA_ATTR_DEV_BLK_CFG_NUM_QUEUES,
VDPA_ATTR_DEV_BLK_CFG_PHY_BLK_EXP,
VDPA_ATTR_DEV_BLK_CFG_ALIGN_OFFSET,
VDPA_ATTR_DEV_BLK_CFG_MIN_IO_SIZE,
VDPA_ATTR_DEV_BLK_CFG_OPT_IO_SIZE,
VDPA_ATTR_DEV_BLK_CFG_MAX_DISCARD_SEC,
VDPA_ATTR_DEV_BLK_CFG_MAX_DISCARD_SEG,
VDPA_ATTR_DEV_BLK_CFG_DISCARD_SEC_ALIGN,
VDPA_ATTR_DEV_BLK_CFG_MAX_WRITE_ZEROES_SEC,
VDPA_ATTR_DEV_BLK_CFG_MAX_WRITE_ZEROES_SEG,
VDPA_ATTR_DEV_BLK_READ_ONLY,
VDPA_ATTR_DEV_BLK_FLUSH,
VDPA_ATTR_MAX, VDPA_ATTR_MAX,
}; };
#endif #endif

View file

@ -4,8 +4,8 @@
* See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
* for more information. * for more information.
*/ */
#define LINUX_VERSION_CODE 395264 #define LINUX_VERSION_CODE 395520
#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + ((c) > 255 ? 255 : (c))) #define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + ((c) > 255 ? 255 : (c)))
#define LINUX_VERSION_MAJOR 6 #define LINUX_VERSION_MAJOR 6
#define LINUX_VERSION_PATCHLEVEL 8 #define LINUX_VERSION_PATCHLEVEL 9
#define LINUX_VERSION_SUBLEVEL 0 #define LINUX_VERSION_SUBLEVEL 0

View file

@ -0,0 +1,20 @@
/*
* This file is auto-generated. Modifications will be lost.
*
* See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/
* for more information.
*/
#ifndef _UAPI_LINUX_VESA_H
#define _UAPI_LINUX_VESA_H
enum vesa_blank_mode {
VESA_NO_BLANKING = 0,
#define VESA_NO_BLANKING VESA_NO_BLANKING
VESA_VSYNC_SUSPEND = 1,
#define VESA_VSYNC_SUSPEND VESA_VSYNC_SUSPEND
VESA_HSYNC_SUSPEND = 2,
#define VESA_HSYNC_SUSPEND VESA_HSYNC_SUSPEND
VESA_POWERDOWN = VESA_VSYNC_SUSPEND | VESA_HSYNC_SUSPEND,
#define VESA_POWERDOWN VESA_POWERDOWN
VESA_BLANK_MAX = VESA_POWERDOWN,
};
#endif

View file

@ -55,12 +55,13 @@
#define VHOST_VDPA_SET_CONFIG_CALL _IOW(VHOST_VIRTIO, 0x77, int) #define VHOST_VDPA_SET_CONFIG_CALL _IOW(VHOST_VIRTIO, 0x77, int)
#define VHOST_VDPA_GET_IOVA_RANGE _IOR(VHOST_VIRTIO, 0x78, struct vhost_vdpa_iova_range) #define VHOST_VDPA_GET_IOVA_RANGE _IOR(VHOST_VIRTIO, 0x78, struct vhost_vdpa_iova_range)
#define VHOST_VDPA_GET_CONFIG_SIZE _IOR(VHOST_VIRTIO, 0x79, __u32) #define VHOST_VDPA_GET_CONFIG_SIZE _IOR(VHOST_VIRTIO, 0x79, __u32)
#define VHOST_VDPA_GET_VQS_COUNT _IOR(VHOST_VIRTIO, 0x80, __u32)
#define VHOST_VDPA_GET_GROUP_NUM _IOR(VHOST_VIRTIO, 0x81, __u32)
#define VHOST_VDPA_GET_AS_NUM _IOR(VHOST_VIRTIO, 0x7A, unsigned int) #define VHOST_VDPA_GET_AS_NUM _IOR(VHOST_VIRTIO, 0x7A, unsigned int)
#define VHOST_VDPA_GET_VRING_GROUP _IOWR(VHOST_VIRTIO, 0x7B, struct vhost_vring_state) #define VHOST_VDPA_GET_VRING_GROUP _IOWR(VHOST_VIRTIO, 0x7B, struct vhost_vring_state)
#define VHOST_VDPA_SET_GROUP_ASID _IOW(VHOST_VIRTIO, 0x7C, struct vhost_vring_state) #define VHOST_VDPA_SET_GROUP_ASID _IOW(VHOST_VIRTIO, 0x7C, struct vhost_vring_state)
#define VHOST_VDPA_SUSPEND _IO(VHOST_VIRTIO, 0x7D) #define VHOST_VDPA_SUSPEND _IO(VHOST_VIRTIO, 0x7D)
#define VHOST_VDPA_RESUME _IO(VHOST_VIRTIO, 0x7E) #define VHOST_VDPA_RESUME _IO(VHOST_VIRTIO, 0x7E)
#define VHOST_VDPA_GET_VRING_DESC_GROUP _IOWR(VHOST_VIRTIO, 0x7F, struct vhost_vring_state) #define VHOST_VDPA_GET_VRING_DESC_GROUP _IOWR(VHOST_VIRTIO, 0x7F, struct vhost_vring_state)
#define VHOST_VDPA_GET_VQS_COUNT _IOR(VHOST_VIRTIO, 0x80, __u32)
#define VHOST_VDPA_GET_GROUP_NUM _IOR(VHOST_VIRTIO, 0x81, __u32)
#define VHOST_VDPA_GET_VRING_SIZE _IOWR(VHOST_VIRTIO, 0x82, struct vhost_vring_state)
#endif #endif

View file

@ -194,6 +194,7 @@ struct virtio_gpu_cmd_submit {
}; };
#define VIRTIO_GPU_CAPSET_VIRGL 1 #define VIRTIO_GPU_CAPSET_VIRGL 1
#define VIRTIO_GPU_CAPSET_VIRGL2 2 #define VIRTIO_GPU_CAPSET_VIRGL2 2
#define VIRTIO_GPU_CAPSET_VENUS 4
struct virtio_gpu_get_capset_info { struct virtio_gpu_get_capset_info {
struct virtio_gpu_ctrl_hdr hdr; struct virtio_gpu_ctrl_hdr hdr;
__le32 capset_index; __le32 capset_index;

View file

@ -126,30 +126,30 @@ struct virtio_pci_cfg_cap {
#define VIRTIO_ADMIN_CMD_LEGACY_DEV_CFG_WRITE 0x4 #define VIRTIO_ADMIN_CMD_LEGACY_DEV_CFG_WRITE 0x4
#define VIRTIO_ADMIN_CMD_LEGACY_DEV_CFG_READ 0x5 #define VIRTIO_ADMIN_CMD_LEGACY_DEV_CFG_READ 0x5
#define VIRTIO_ADMIN_CMD_LEGACY_NOTIFY_INFO 0x6 #define VIRTIO_ADMIN_CMD_LEGACY_NOTIFY_INFO 0x6
struct __attribute__((__packed__)) virtio_admin_cmd_hdr { struct virtio_admin_cmd_hdr {
__le16 opcode; __le16 opcode;
__le16 group_type; __le16 group_type;
__u8 reserved1[12]; __u8 reserved1[12];
__le64 group_member_id; __le64 group_member_id;
}; };
struct __attribute__((__packed__)) virtio_admin_cmd_status { struct virtio_admin_cmd_status {
__le16 status; __le16 status;
__le16 status_qualifier; __le16 status_qualifier;
__u8 reserved2[4]; __u8 reserved2[4];
}; };
struct __attribute__((__packed__)) virtio_admin_cmd_legacy_wr_data { struct virtio_admin_cmd_legacy_wr_data {
__u8 offset; __u8 offset;
__u8 reserved[7]; __u8 reserved[7];
__u8 registers[]; __u8 registers[];
}; };
struct __attribute__((__packed__)) virtio_admin_cmd_legacy_rd_data { struct virtio_admin_cmd_legacy_rd_data {
__u8 offset; __u8 offset;
}; };
#define VIRTIO_ADMIN_CMD_NOTIFY_INFO_FLAGS_END 0 #define VIRTIO_ADMIN_CMD_NOTIFY_INFO_FLAGS_END 0
#define VIRTIO_ADMIN_CMD_NOTIFY_INFO_FLAGS_OWNER_DEV 0x1 #define VIRTIO_ADMIN_CMD_NOTIFY_INFO_FLAGS_OWNER_DEV 0x1
#define VIRTIO_ADMIN_CMD_NOTIFY_INFO_FLAGS_OWNER_MEM 0x2 #define VIRTIO_ADMIN_CMD_NOTIFY_INFO_FLAGS_OWNER_MEM 0x2
#define VIRTIO_ADMIN_CMD_MAX_NOTIFY_INFO 4 #define VIRTIO_ADMIN_CMD_MAX_NOTIFY_INFO 4
struct __attribute__((__packed__)) virtio_admin_cmd_notify_info_data { struct virtio_admin_cmd_notify_info_data {
__u8 flags; __u8 flags;
__u8 bar; __u8 bar;
__u8 padding[6]; __u8 padding[6];

View file

@ -7,10 +7,14 @@
#ifndef VIRTIO_SND_IF_H #ifndef VIRTIO_SND_IF_H
#define VIRTIO_SND_IF_H #define VIRTIO_SND_IF_H
#include <linux/virtio_types.h> #include <linux/virtio_types.h>
enum {
VIRTIO_SND_F_CTLS = 0
};
struct virtio_snd_config { struct virtio_snd_config {
__le32 jacks; __le32 jacks;
__le32 streams; __le32 streams;
__le32 chmaps; __le32 chmaps;
__le32 controls;
}; };
enum { enum {
VIRTIO_SND_VQ_CONTROL = 0, VIRTIO_SND_VQ_CONTROL = 0,
@ -33,10 +37,18 @@ enum {
VIRTIO_SND_R_PCM_START, VIRTIO_SND_R_PCM_START,
VIRTIO_SND_R_PCM_STOP, VIRTIO_SND_R_PCM_STOP,
VIRTIO_SND_R_CHMAP_INFO = 0x0200, VIRTIO_SND_R_CHMAP_INFO = 0x0200,
VIRTIO_SND_R_CTL_INFO = 0x0300,
VIRTIO_SND_R_CTL_ENUM_ITEMS,
VIRTIO_SND_R_CTL_READ,
VIRTIO_SND_R_CTL_WRITE,
VIRTIO_SND_R_CTL_TLV_READ,
VIRTIO_SND_R_CTL_TLV_WRITE,
VIRTIO_SND_R_CTL_TLV_COMMAND,
VIRTIO_SND_EVT_JACK_CONNECTED = 0x1000, VIRTIO_SND_EVT_JACK_CONNECTED = 0x1000,
VIRTIO_SND_EVT_JACK_DISCONNECTED, VIRTIO_SND_EVT_JACK_DISCONNECTED,
VIRTIO_SND_EVT_PCM_PERIOD_ELAPSED = 0x1100, VIRTIO_SND_EVT_PCM_PERIOD_ELAPSED = 0x1100,
VIRTIO_SND_EVT_PCM_XRUN, VIRTIO_SND_EVT_PCM_XRUN,
VIRTIO_SND_EVT_CTL_NOTIFY = 0x1200,
VIRTIO_SND_S_OK = 0x8000, VIRTIO_SND_S_OK = 0x8000,
VIRTIO_SND_S_BAD_MSG, VIRTIO_SND_S_BAD_MSG,
VIRTIO_SND_S_NOT_SUPP, VIRTIO_SND_S_NOT_SUPP,
@ -209,4 +221,83 @@ struct virtio_snd_chmap_info {
__u8 channels; __u8 channels;
__u8 positions[VIRTIO_SND_CHMAP_MAX_SIZE]; __u8 positions[VIRTIO_SND_CHMAP_MAX_SIZE];
}; };
struct virtio_snd_ctl_hdr {
struct virtio_snd_hdr hdr;
__le32 control_id;
};
enum {
VIRTIO_SND_CTL_ROLE_UNDEFINED = 0,
VIRTIO_SND_CTL_ROLE_VOLUME,
VIRTIO_SND_CTL_ROLE_MUTE,
VIRTIO_SND_CTL_ROLE_GAIN
};
enum {
VIRTIO_SND_CTL_TYPE_BOOLEAN = 0,
VIRTIO_SND_CTL_TYPE_INTEGER,
VIRTIO_SND_CTL_TYPE_INTEGER64,
VIRTIO_SND_CTL_TYPE_ENUMERATED,
VIRTIO_SND_CTL_TYPE_BYTES,
VIRTIO_SND_CTL_TYPE_IEC958
};
enum {
VIRTIO_SND_CTL_ACCESS_READ = 0,
VIRTIO_SND_CTL_ACCESS_WRITE,
VIRTIO_SND_CTL_ACCESS_VOLATILE,
VIRTIO_SND_CTL_ACCESS_INACTIVE,
VIRTIO_SND_CTL_ACCESS_TLV_READ,
VIRTIO_SND_CTL_ACCESS_TLV_WRITE,
VIRTIO_SND_CTL_ACCESS_TLV_COMMAND
};
struct virtio_snd_ctl_info {
struct virtio_snd_info hdr;
__le32 role;
__le32 type;
__le32 access;
__le32 count;
__le32 index;
__u8 name[44];
union {
struct {
__le32 min;
__le32 max;
__le32 step;
} integer;
struct {
__le64 min;
__le64 max;
__le64 step;
} integer64;
struct {
__le32 items;
} enumerated;
} value;
};
struct virtio_snd_ctl_enum_item {
__u8 item[64];
};
struct virtio_snd_ctl_iec958 {
__u8 status[24];
__u8 subcode[147];
__u8 pad;
__u8 dig_subframe[4];
};
struct virtio_snd_ctl_value {
union {
__le32 integer[128];
__le64 integer64[64];
__le32 enumerated[128];
__u8 bytes[512];
struct virtio_snd_ctl_iec958 iec958;
} value;
};
enum {
VIRTIO_SND_CTL_EVT_MASK_VALUE = 0,
VIRTIO_SND_CTL_EVT_MASK_INFO,
VIRTIO_SND_CTL_EVT_MASK_TLV
};
struct virtio_snd_ctl_event {
struct virtio_snd_hdr hdr;
__le16 control_id;
__le16 mask;
};
#endif #endif

View file

@ -37,6 +37,15 @@ struct hns_roce_ib_create_srq_resp {
__u32 srqn; __u32 srqn;
__u32 cap_flags; __u32 cap_flags;
}; };
enum hns_roce_congest_type_flags {
HNS_ROCE_CREATE_QP_FLAGS_DCQCN,
HNS_ROCE_CREATE_QP_FLAGS_LDCP,
HNS_ROCE_CREATE_QP_FLAGS_HC3,
HNS_ROCE_CREATE_QP_FLAGS_DIP,
};
enum hns_roce_create_qp_comp_mask {
HNS_ROCE_CREATE_QP_MASK_CONGEST_TYPE = 1 << 0,
};
struct hns_roce_ib_create_qp { struct hns_roce_ib_create_qp {
__aligned_u64 buf_addr; __aligned_u64 buf_addr;
__aligned_u64 db_addr; __aligned_u64 db_addr;
@ -45,6 +54,9 @@ struct hns_roce_ib_create_qp {
__u8 sq_no_prefetch; __u8 sq_no_prefetch;
__u8 reserved[5]; __u8 reserved[5];
__aligned_u64 sdb_addr; __aligned_u64 sdb_addr;
__aligned_u64 comp_mask;
__aligned_u64 create_flags;
__aligned_u64 cong_type_flags;
}; };
enum hns_roce_qp_cap_flags { enum hns_roce_qp_cap_flags {
HNS_ROCE_QP_CAP_RQ_RECORD_DB = 1 << 0, HNS_ROCE_QP_CAP_RQ_RECORD_DB = 1 << 0,
@ -73,6 +85,8 @@ struct hns_roce_ib_alloc_ucontext_resp {
__u32 reserved; __u32 reserved;
__u32 config; __u32 config;
__u32 max_inline_data; __u32 max_inline_data;
__u8 congest_type;
__u8 reserved0[7];
}; };
struct hns_roce_ib_alloc_ucontext { struct hns_roce_ib_alloc_ucontext {
__u32 config; __u32 config;

View file

@ -176,7 +176,7 @@ struct mpi3mr_bsg_in_reply_buf {
__u8 mpi_reply_type; __u8 mpi_reply_type;
__u8 rsvd1; __u8 rsvd1;
__u16 rsvd2; __u16 rsvd2;
__u8 reply_buf[1]; __u8 reply_buf[];
}; };
struct mpi3mr_buf_entry { struct mpi3mr_buf_entry {
__u8 buf_type; __u8 buf_type;

View file

@ -15,6 +15,8 @@ enum avs_tplg_token {
AVS_TKN_MANIFEST_NUM_MODCFGS_EXT_U32 = 6, AVS_TKN_MANIFEST_NUM_MODCFGS_EXT_U32 = 6,
AVS_TKN_MANIFEST_NUM_PPLCFGS_U32 = 7, AVS_TKN_MANIFEST_NUM_PPLCFGS_U32 = 7,
AVS_TKN_MANIFEST_NUM_BINDINGS_U32 = 8, AVS_TKN_MANIFEST_NUM_BINDINGS_U32 = 8,
AVS_TKN_MANIFEST_NUM_CONDPATH_TMPLS_U32 = 9,
AVS_TKN_MANIFEST_NUM_INIT_CONFIGS_U32 = 10,
AVS_TKN_LIBRARY_ID_U32 = 101, AVS_TKN_LIBRARY_ID_U32 = 101,
AVS_TKN_LIBRARY_NAME_STRING = 102, AVS_TKN_LIBRARY_NAME_STRING = 102,
AVS_TKN_AFMT_ID_U32 = 201, AVS_TKN_AFMT_ID_U32 = 201,
@ -89,6 +91,8 @@ enum avs_tplg_token {
AVS_TKN_MOD_PROC_DOMAIN_U8 = 1705, AVS_TKN_MOD_PROC_DOMAIN_U8 = 1705,
AVS_TKN_MOD_MODCFG_EXT_ID_U32 = 1706, AVS_TKN_MOD_MODCFG_EXT_ID_U32 = 1706,
AVS_TKN_MOD_KCONTROL_ID_U32 = 1707, AVS_TKN_MOD_KCONTROL_ID_U32 = 1707,
AVS_TKN_MOD_INIT_CONFIG_NUM_IDS_U32 = 1708,
AVS_TKN_MOD_INIT_CONFIG_ID_U32 = 1709,
AVS_TKN_PATH_TMPL_ID_U32 = 1801, AVS_TKN_PATH_TMPL_ID_U32 = 1801,
AVS_TKN_PATH_ID_U32 = 1901, AVS_TKN_PATH_ID_U32 = 1901,
AVS_TKN_PATH_FE_FMT_ID_U32 = 1902, AVS_TKN_PATH_FE_FMT_ID_U32 = 1902,
@ -97,5 +101,8 @@ enum avs_tplg_token {
AVS_TKN_PIN_FMT_IOBS_U32 = 2202, AVS_TKN_PIN_FMT_IOBS_U32 = 2202,
AVS_TKN_PIN_FMT_AFMT_ID_U32 = 2203, AVS_TKN_PIN_FMT_AFMT_ID_U32 = 2203,
AVS_TKN_KCONTROL_ID_U32 = 2301, AVS_TKN_KCONTROL_ID_U32 = 2301,
AVS_TKN_INIT_CONFIG_ID_U32 = 2401,
AVS_TKN_INIT_CONFIG_PARAM_U8 = 2402,
AVS_TKN_INIT_CONFIG_LENGTH_U32 = 2403,
}; };
#endif #endif

View file

@ -128,4 +128,6 @@
#define SOF_TKN_AMD_ACPI2S_TDM_MODE 1702 #define SOF_TKN_AMD_ACPI2S_TDM_MODE 1702
#define SOF_TKN_IMX_MICFIL_RATE 2000 #define SOF_TKN_IMX_MICFIL_RATE 2000
#define SOF_TKN_IMX_MICFIL_CH 2001 #define SOF_TKN_IMX_MICFIL_CH 2001
#define SOF_TKN_AMD_ACP_SDW_RATE 2100
#define SOF_TKN_AMD_ACP_SDW_CH 2101
#endif #endif