Merge "setjmp_test: riscv64 does have callee-save fp registers." into main am: 1bebfd3c10
am: 6246e95adf
Original change: https://android-review.googlesource.com/c/platform/bionic/+/3096178 Change-Id: Ibf8d3247eba551ba3eeb4ca854338f706bc8ff2d Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
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commit
b63934c060
1 changed files with 44 additions and 9 deletions
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@ -174,6 +174,9 @@ TEST(setjmp, sigsetjmp_1_signal_mask) {
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}
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}
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}
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}
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#if defined(__arm__) || defined(__aarch64__)
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// arm and arm64 have the same callee save fp registers (8-15),
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// but use different instructions for accessing them.
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#if defined(__arm__)
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#if defined(__arm__)
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#define SET_FREG(n, v) asm volatile("vmov.f64 d"#n ", #"#v : : : "d"#n)
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#define SET_FREG(n, v) asm volatile("vmov.f64 d"#n ", #"#v : : : "d"#n)
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#define GET_FREG(n) ({ double _r; asm volatile("fcpyd %P0, d"#n : "=w"(_r) : :); _r;})
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#define GET_FREG(n) ({ double _r; asm volatile("fcpyd %P0, d"#n : "=w"(_r) : :); _r;})
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@ -183,21 +186,53 @@ TEST(setjmp, sigsetjmp_1_signal_mask) {
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#define GET_FREG(n) ({ double _r; asm volatile("fmov %0, d"#n : "=r"(_r) : :); _r; })
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#define GET_FREG(n) ({ double _r; asm volatile("fmov %0, d"#n : "=r"(_r) : :); _r; })
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#define CLEAR_FREG(n) asm volatile("fmov d"#n ", xzr" : : : "d"#n)
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#define CLEAR_FREG(n) asm volatile("fmov d"#n ", xzr" : : : "d"#n)
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#endif
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#endif
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#if defined(__arm__) || defined(__aarch64__)
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#define SET_FREGS \
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#define SET_FREGS \
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SET_FREG(8, 8.0); SET_FREG(9, 9.0); SET_FREG(10, 10.0); SET_FREG(11, 11.0); \
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SET_FREG(8, 8.0); SET_FREG(9, 9.0); SET_FREG(10, 10.0); SET_FREG(11, 11.0); \
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SET_FREG(12, 12.0); SET_FREG(13, 13.0); SET_FREG(14, 14.0); SET_FREG(15, 15.0);
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SET_FREG(12, 12.0); SET_FREG(13, 13.0); SET_FREG(14, 14.0); SET_FREG(15, 15.0)
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#define CLEAR_FREGS \
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#define CLEAR_FREGS \
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CLEAR_FREG(8); CLEAR_FREG(9); CLEAR_FREG(10); CLEAR_FREG(11); \
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CLEAR_FREG(8); CLEAR_FREG(9); CLEAR_FREG(10); CLEAR_FREG(11); \
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CLEAR_FREG(12); CLEAR_FREG(13); CLEAR_FREG(14); CLEAR_FREG(15);
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CLEAR_FREG(12); CLEAR_FREG(13); CLEAR_FREG(14); CLEAR_FREG(15)
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#define CHECK_FREGS \
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#define CHECK_FREGS \
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EXPECT_EQ(8.0, GET_FREG(8)); EXPECT_EQ(9.0, GET_FREG(9)); \
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EXPECT_EQ(8.0, GET_FREG(8)); EXPECT_EQ(9.0, GET_FREG(9)); \
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EXPECT_EQ(10.0, GET_FREG(10)); EXPECT_EQ(11.0, GET_FREG(11)); \
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EXPECT_EQ(10.0, GET_FREG(10)); EXPECT_EQ(11.0, GET_FREG(11)); \
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EXPECT_EQ(12.0, GET_FREG(12)); EXPECT_EQ(13.0, GET_FREG(13)); \
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EXPECT_EQ(12.0, GET_FREG(12)); EXPECT_EQ(13.0, GET_FREG(13)); \
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EXPECT_EQ(14.0, GET_FREG(14)); EXPECT_EQ(15.0, GET_FREG(15));
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EXPECT_EQ(14.0, GET_FREG(14)); EXPECT_EQ(15.0, GET_FREG(15))
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#elif defined(__riscv)
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// riscv64 has callee save registers fs0-fs11.
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// TODO: use Zfa to get 1.0 rather than the one_p trick.
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#define SET_FREGS \
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double one = 1, *one_p = &one; \
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asm volatile("fmv.d.x fs0, zero ; fld fs1, (%0) ; \
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fadd.d fs2, fs1, fs1 ; fadd.d fs3, fs2, fs1 ; \
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fadd.d fs4, fs3, fs1 ; fadd.d fs5, fs4, fs1 ; \
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fadd.d fs6, fs5, fs1 ; fadd.d fs7, fs6, fs1 ; \
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fadd.d fs8, fs7, fs1 ; fadd.d fs9, fs8, fs1 ; \
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fadd.d fs10, fs9, fs1 ; fadd.d fs11, fs10, fs1" \
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: \
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: "r"(one_p) \
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: "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", \
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"fs6", "fs7", "fs8", "fs9", "fs10", "fs11")
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#define CLEAR_FREGS \
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asm volatile("fmv.d.x fs0, zero ; fmv.d.x fs1, zero ; \
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fmv.d.x fs2, zero ; fmv.d.x fs3, zero ; \
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fmv.d.x fs4, zero ; fmv.d.x fs5, zero ; \
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fmv.d.x fs6, zero ; fmv.d.x fs7, zero ; \
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fmv.d.x fs8, zero ; fmv.d.x fs9, zero ; \
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fmv.d.x fs10, zero ; fmv.d.x fs11, zero" \
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: : : "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", \
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"fs6", "fs7", "fs8", "fs9", "fs10", "fs11")
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#define GET_FREG(n) ({ double _r; asm volatile("fmv.d %0, fs"#n : "=f"(_r) : :); _r; })
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#define CHECK_FREGS \
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EXPECT_EQ(0.0, GET_FREG(0)); EXPECT_EQ(1.0, GET_FREG(1)); \
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EXPECT_EQ(2.0, GET_FREG(2)); EXPECT_EQ(3.0, GET_FREG(3)); \
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EXPECT_EQ(4.0, GET_FREG(4)); EXPECT_EQ(5.0, GET_FREG(5)); \
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EXPECT_EQ(6.0, GET_FREG(6)); EXPECT_EQ(7.0, GET_FREG(7)); \
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EXPECT_EQ(8.0, GET_FREG(8)); EXPECT_EQ(9.0, GET_FREG(9)); \
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EXPECT_EQ(10.0, GET_FREG(10)); EXPECT_EQ(11.0, GET_FREG(11))
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#else
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#else
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/* The other architectures don't save/restore fp registers. */
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// x86 and x86-64 don't save/restore fp registers.
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#define SET_FREGS
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#define SET_FREGS
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#define CLEAR_FREGS
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#define CLEAR_FREGS
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#define CHECK_FREGS
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#define CHECK_FREGS
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