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Update to v6.3 kernel headers.

Browse source 
Kernel headers coming from:

Git: https://android.googlesource.com/kernel/common/
Branch: android-mainline
Tag: android-mainline-6.3

Test: Bionic unit tests pass.
Change-Id: I5270ef291a77343e47ef3a5fbd02b8cacf218ec5
This commit is contained in:
Christopher Ferris 2023-05-09 19:04:15 +00:00
parent 44befb2286
commit b7cef6d910
72 changed files with 608 additions and 1181 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
libc/kernel/uapi/asm-arm64/asm/hwcap.h
View file

@ -87,4 +87,10 @@
#define HWCAP2_CSSC (1UL << 34)
#define HWCAP2_RPRFM (1UL << 35)
#define HWCAP2_SVE2P1 (1UL << 36)
#define HWCAP2_SME2 (1UL << 37)
#define HWCAP2_SME2P1 (1UL << 38)
#define HWCAP2_SME_I16I32 (1UL << 39)
#define HWCAP2_SME_BI32I32 (1UL << 40)
#define HWCAP2_SME_B16B16 (1UL << 41)
#define HWCAP2_SME_F16F16 (1UL << 42)
#endif

1
libc/kernel/uapi/asm-arm64/asm/kvm.h
View file

@ -74,6 +74,7 @@ struct kvm_regs {
#define KVM_ARM_VCPU_SVE 4
#define KVM_ARM_VCPU_PTRAUTH_ADDRESS 5
#define KVM_ARM_VCPU_PTRAUTH_GENERIC 6
#define KVM_ARM_VCPU_HAS_EL2 7
struct kvm_vcpu_init {
__u32 target;
__u32 features[7];

16
libc/kernel/uapi/asm-arm64/asm/sigcontext.h
View file

@ -59,12 +59,23 @@ struct sve_context {
__u16 __reserved[2];
};
#define SVE_SIG_FLAG_SM 0x1
#define TPIDR2_MAGIC 0x54504902
struct tpidr2_context {
struct _aarch64_ctx head;
__u64 tpidr2;
};
#define ZA_MAGIC 0x54366345
struct za_context {
struct _aarch64_ctx head;
__u16 vl;
__u16 __reserved[3];
};
#define ZT_MAGIC 0x5a544e01
struct zt_context {
struct _aarch64_ctx head;
__u16 nregs;
__u16 __reserved[3];
};
#endif
#include <asm/sve_context.h>
#define SVE_VQ_BYTES __SVE_VQ_BYTES
@ -94,4 +105,9 @@ struct za_context {
#define ZA_SIG_REGS_SIZE(vq) ((vq * __SVE_VQ_BYTES) * (vq * __SVE_VQ_BYTES))
#define ZA_SIG_ZAV_OFFSET(vq,n) (ZA_SIG_REGS_OFFSET + (SVE_SIG_ZREG_SIZE(vq) * n))
#define ZA_SIG_CONTEXT_SIZE(vq) (ZA_SIG_REGS_OFFSET + ZA_SIG_REGS_SIZE(vq))
#define ZT_SIG_REG_SIZE 512
#define ZT_SIG_REG_BYTES (ZT_SIG_REG_SIZE / 8)
#define ZT_SIG_REGS_OFFSET sizeof(struct zt_context)
#define ZT_SIG_REGS_SIZE(n) (ZT_SIG_REG_BYTES * n)
#define ZT_SIG_CONTEXT_SIZE(n) (sizeof(struct zt_context) + ZT_SIG_REGS_SIZE(n))
#endif

5
libc/kernel/uapi/asm-riscv/asm/setup.h
View file

@ -16,4 +16,7 @@
***
****************************************************************************
****************************************************************************/
#include <asm-generic/setup.h>
#ifndef _UAPI_ASM_RISCV_SETUP_H
#define _UAPI_ASM_RISCV_SETUP_H
#define COMMAND_LINE_SIZE 1024
#endif

13
libc/kernel/uapi/asm-x86/asm/kvm.h
View file

@ -20,6 +20,7 @@
#define _ASM_X86_KVM_H
#include <linux/types.h>
#include <linux/ioctl.h>
#include <linux/stddef.h>
#define KVM_PIO_PAGE_OFFSET 1
#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
#define KVM_DIRTY_LOG_PAGE_OFFSET 64
@ -395,8 +396,8 @@ struct kvm_nested_state {
__u8 pad[120];
} hdr;
union {
struct kvm_vmx_nested_state_data vmx[0];
struct kvm_svm_nested_state_data svm[0];
__DECLARE_FLEX_ARRAY(struct kvm_vmx_nested_state_data, vmx);
__DECLARE_FLEX_ARRAY(struct kvm_svm_nested_state_data, svm);
} data;
};
struct kvm_pmu_event_filter {
@ -409,6 +410,14 @@ struct kvm_pmu_event_filter {
};
#define KVM_PMU_EVENT_ALLOW 0
#define KVM_PMU_EVENT_DENY 1
#define KVM_PMU_EVENT_FLAG_MASKED_EVENTS BIT(0)
#define KVM_PMU_EVENT_FLAGS_VALID_MASK (KVM_PMU_EVENT_FLAG_MASKED_EVENTS)
#define KVM_PMU_ENCODE_MASKED_ENTRY(event_select,mask,match,exclude) (((event_select) & 0xFFULL) | (((event_select) & 0XF00ULL) << 24) | (((mask) & 0xFFULL) << 56) | (((match) & 0xFFULL) << 8) | ((__u64) (! ! (exclude)) << 55))
#define KVM_PMU_MASKED_ENTRY_EVENT_SELECT (GENMASK_ULL(7, 0) | GENMASK_ULL(35, 32))
#define KVM_PMU_MASKED_ENTRY_UMASK_MASK (GENMASK_ULL(63, 56))
#define KVM_PMU_MASKED_ENTRY_UMASK_MATCH (GENMASK_ULL(15, 8))
#define KVM_PMU_MASKED_ENTRY_EXCLUDE (BIT_ULL(55))
#define KVM_PMU_MASKED_ENTRY_UMASK_MASK_SHIFT (56)
#define KVM_VCPU_TSC_CTRL 0
#define KVM_VCPU_TSC_OFFSET 0
#endif

17
libc/kernel/uapi/drm/amdgpu_drm.h
View file

@ -428,6 +428,7 @@ struct drm_amdgpu_cs_chunk_data {
#define AMDGPU_IDS_FLAGS_FUSION 0x1
#define AMDGPU_IDS_FLAGS_PREEMPTION 0x2
#define AMDGPU_IDS_FLAGS_TMZ 0x4
#define AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD 0x8
#define AMDGPU_INFO_ACCEL_WORKING 0x00
#define AMDGPU_INFO_CRTC_FROM_ID 0x01
#define AMDGPU_INFO_HW_IP_INFO 0x02
@ -486,6 +487,8 @@ struct drm_amdgpu_cs_chunk_data {
#define AMDGPU_INFO_SENSOR_VDDGFX 0x7
#define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_SCLK 0x8
#define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_MCLK 0x9
#define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_SCLK 0xa
#define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_MCLK 0xb
#define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS 0x1E
#define AMDGPU_INFO_VRAM_LOST_COUNTER 0x1F
#define AMDGPU_INFO_RAS_ENABLED_FEATURES 0x20
@ -616,7 +619,7 @@ struct drm_amdgpu_info_device {
__u32 enabled_rb_pipes_mask;
__u32 num_rb_pipes;
__u32 num_hw_gfx_contexts;
__u32 _pad;
__u32 pcie_gen;
__u64 ids_flags;
__u64 virtual_address_offset;
__u64 virtual_address_max;
@ -643,12 +646,22 @@ struct drm_amdgpu_info_device {
__u32 gs_vgt_table_depth;
__u32 gs_prim_buffer_depth;
__u32 max_gs_waves_per_vgt;
__u32 _pad1;
__u32 pcie_num_lanes;
__u32 cu_ao_bitmap[4][4];
__u64 high_va_offset;
__u64 high_va_max;
__u32 pa_sc_tile_steering_override;
__u64 tcc_disabled_mask;
__u64 min_engine_clock;
__u64 min_memory_clock;
__u32 tcp_cache_size;
__u32 num_sqc_per_wgp;
__u32 sqc_data_cache_size;
__u32 sqc_inst_cache_size;
__u32 gl1c_cache_size;
__u32 gl2c_cache_size;
__u64 mall_size;
__u32 enabled_rb_pipes_mask_hi;
};
struct drm_amdgpu_info_hw_ip {
__u32 hw_ip_version_major;

6
libc/kernel/uapi/misc/habanalabs.h → libc/kernel/uapi/drm/habanalabs_accel.h
View file

@ -662,6 +662,7 @@ enum hl_server_type {
#define HL_INFO_ENGINE_STATUS 32
#define HL_INFO_PAGE_FAULT_EVENT 33
#define HL_INFO_USER_MAPPINGS 34
#define HL_INFO_FW_GENERIC_REQ 35
#define HL_INFO_VERSION_MAX_LEN 128
#define HL_INFO_CARD_NAME_MAX_LEN 16
#define HL_ENGINES_DATA_MAX_SIZE SZ_1M
@ -872,6 +873,7 @@ struct hl_info_args {
__u32 user_buffer_actual_size;
__u32 sec_attest_nonce;
__u32 array_size;
__u32 fw_sub_opcode;
};
__u32 pad;
};
@ -935,6 +937,7 @@ struct hl_cs_chunk {
#define HL_CS_FLAGS_RESERVE_SIGNALS_ONLY 0x1000
#define HL_CS_FLAGS_UNRESERVE_SIGNALS_ONLY 0x2000
#define HL_CS_FLAGS_ENGINE_CORE_COMMAND 0x4000
#define HL_CS_FLAGS_FLUSH_PCI_HBW_WRITES 0x8000
#define HL_CS_STATUS_SUCCESS 0
#define HL_MAX_JOBS_PER_CS 512
#define HL_ENGINE_CORE_HALT (1 << 0)
@ -1072,8 +1075,9 @@ struct hl_mem_in {
__u64 device_virt_addr;
} unmap;
struct {
__u64 handle;
__u64 addr;
__u64 mem_size;
__u64 offset;
} export_dmabuf_fd;
};
__u32 op;

220
libc/kernel/uapi/drm/i810_drm.h
View file

@ -1,220 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _I810_DRM_H_
#define _I810_DRM_H_
#include "drm.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifndef _I810_DEFINES_
#define _I810_DEFINES_
#define I810_DMA_BUF_ORDER 12
#define I810_DMA_BUF_SZ (1 << I810_DMA_BUF_ORDER)
#define I810_DMA_BUF_NR 256
#define I810_NR_SAREA_CLIPRECTS 8
#define I810_NR_TEX_REGIONS 64
#define I810_LOG_MIN_TEX_REGION_SIZE 16
#endif
#define I810_UPLOAD_TEX0IMAGE 0x1
#define I810_UPLOAD_TEX1IMAGE 0x2
#define I810_UPLOAD_CTX 0x4
#define I810_UPLOAD_BUFFERS 0x8
#define I810_UPLOAD_TEX0 0x10
#define I810_UPLOAD_TEX1 0x20
#define I810_UPLOAD_CLIPRECTS 0x40
#define I810_DESTREG_DI0 0
#define I810_DESTREG_DI1 1
#define I810_DESTREG_DV0 2
#define I810_DESTREG_DV1 3
#define I810_DESTREG_DR0 4
#define I810_DESTREG_DR1 5
#define I810_DESTREG_DR2 6
#define I810_DESTREG_DR3 7
#define I810_DESTREG_DR4 8
#define I810_DEST_SETUP_SIZE 10
#define I810_CTXREG_CF0 0
#define I810_CTXREG_CF1 1
#define I810_CTXREG_ST0 2
#define I810_CTXREG_ST1 3
#define I810_CTXREG_VF 4
#define I810_CTXREG_MT 5
#define I810_CTXREG_MC0 6
#define I810_CTXREG_MC1 7
#define I810_CTXREG_MC2 8
#define I810_CTXREG_MA0 9
#define I810_CTXREG_MA1 10
#define I810_CTXREG_MA2 11
#define I810_CTXREG_SDM 12
#define I810_CTXREG_FOG 13
#define I810_CTXREG_B1 14
#define I810_CTXREG_B2 15
#define I810_CTXREG_LCS 16
#define I810_CTXREG_PV 17
#define I810_CTXREG_ZA 18
#define I810_CTXREG_AA 19
#define I810_CTX_SETUP_SIZE 20
#define I810_TEXREG_MI0 0
#define I810_TEXREG_MI1 1
#define I810_TEXREG_MI2 2
#define I810_TEXREG_MI3 3
#define I810_TEXREG_MF 4
#define I810_TEXREG_MLC 5
#define I810_TEXREG_MLL 6
#define I810_TEXREG_MCS 7
#define I810_TEX_SETUP_SIZE 8
#define I810_FRONT 0x1
#define I810_BACK 0x2
#define I810_DEPTH 0x4
typedef enum _drm_i810_init_func {
I810_INIT_DMA = 0x01,
I810_CLEANUP_DMA = 0x02,
I810_INIT_DMA_1_4 = 0x03
} drm_i810_init_func_t;
typedef struct _drm_i810_init {
drm_i810_init_func_t func;
unsigned int mmio_offset;
unsigned int buffers_offset;
int sarea_priv_offset;
unsigned int ring_start;
unsigned int ring_end;
unsigned int ring_size;
unsigned int front_offset;
unsigned int back_offset;
unsigned int depth_offset;
unsigned int overlay_offset;
unsigned int overlay_physical;
unsigned int w;
unsigned int h;
unsigned int pitch;
unsigned int pitch_bits;
} drm_i810_init_t;
typedef struct _drm_i810_pre12_init {
drm_i810_init_func_t func;
unsigned int mmio_offset;
unsigned int buffers_offset;
int sarea_priv_offset;
unsigned int ring_start;
unsigned int ring_end;
unsigned int ring_size;
unsigned int front_offset;
unsigned int back_offset;
unsigned int depth_offset;
unsigned int w;
unsigned int h;
unsigned int pitch;
unsigned int pitch_bits;
} drm_i810_pre12_init_t;
typedef struct _drm_i810_tex_region {
unsigned char next, prev;
unsigned char in_use;
int age;
} drm_i810_tex_region_t;
typedef struct _drm_i810_sarea {
unsigned int ContextState[I810_CTX_SETUP_SIZE];
unsigned int BufferState[I810_DEST_SETUP_SIZE];
unsigned int TexState[2][I810_TEX_SETUP_SIZE];
unsigned int dirty;
unsigned int nbox;
struct drm_clip_rect boxes[I810_NR_SAREA_CLIPRECTS];
drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS + 1];
int texAge;
int last_enqueue;
int last_dispatch;
int last_quiescent;
int ctxOwner;
int vertex_prim;
int pf_enabled;
int pf_active;
int pf_current_page;
} drm_i810_sarea_t;
#define DRM_I810_INIT 0x00
#define DRM_I810_VERTEX 0x01
#define DRM_I810_CLEAR 0x02
#define DRM_I810_FLUSH 0x03
#define DRM_I810_GETAGE 0x04
#define DRM_I810_GETBUF 0x05
#define DRM_I810_SWAP 0x06
#define DRM_I810_COPY 0x07
#define DRM_I810_DOCOPY 0x08
#define DRM_I810_OV0INFO 0x09
#define DRM_I810_FSTATUS 0x0a
#define DRM_I810_OV0FLIP 0x0b
#define DRM_I810_MC 0x0c
#define DRM_I810_RSTATUS 0x0d
#define DRM_I810_FLIP 0x0e
#define DRM_IOCTL_I810_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I810_INIT, drm_i810_init_t)
#define DRM_IOCTL_I810_VERTEX DRM_IOW(DRM_COMMAND_BASE + DRM_I810_VERTEX, drm_i810_vertex_t)
#define DRM_IOCTL_I810_CLEAR DRM_IOW(DRM_COMMAND_BASE + DRM_I810_CLEAR, drm_i810_clear_t)
#define DRM_IOCTL_I810_FLUSH DRM_IO(DRM_COMMAND_BASE + DRM_I810_FLUSH)
#define DRM_IOCTL_I810_GETAGE DRM_IO(DRM_COMMAND_BASE + DRM_I810_GETAGE)
#define DRM_IOCTL_I810_GETBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_I810_GETBUF, drm_i810_dma_t)
#define DRM_IOCTL_I810_SWAP DRM_IO(DRM_COMMAND_BASE + DRM_I810_SWAP)
#define DRM_IOCTL_I810_COPY DRM_IOW(DRM_COMMAND_BASE + DRM_I810_COPY, drm_i810_copy_t)
#define DRM_IOCTL_I810_DOCOPY DRM_IO(DRM_COMMAND_BASE + DRM_I810_DOCOPY)
#define DRM_IOCTL_I810_OV0INFO DRM_IOR(DRM_COMMAND_BASE + DRM_I810_OV0INFO, drm_i810_overlay_t)
#define DRM_IOCTL_I810_FSTATUS DRM_IO(DRM_COMMAND_BASE + DRM_I810_FSTATUS)
#define DRM_IOCTL_I810_OV0FLIP DRM_IO(DRM_COMMAND_BASE + DRM_I810_OV0FLIP)
#define DRM_IOCTL_I810_MC DRM_IOW(DRM_COMMAND_BASE + DRM_I810_MC, drm_i810_mc_t)
#define DRM_IOCTL_I810_RSTATUS DRM_IO(DRM_COMMAND_BASE + DRM_I810_RSTATUS)
#define DRM_IOCTL_I810_FLIP DRM_IO(DRM_COMMAND_BASE + DRM_I810_FLIP)
typedef struct _drm_i810_clear {
int clear_color;
int clear_depth;
int flags;
} drm_i810_clear_t;
typedef struct _drm_i810_vertex {
int idx;
int used;
int discard;
} drm_i810_vertex_t;
typedef struct _drm_i810_copy_t {
int idx;
int used;
void * address;
} drm_i810_copy_t;
#define PR_TRIANGLES (0x0 << 18)
#define PR_TRISTRIP_0 (0x1 << 18)
#define PR_TRISTRIP_1 (0x2 << 18)
#define PR_TRIFAN (0x3 << 18)
#define PR_POLYGON (0x4 << 18)
#define PR_LINES (0x5 << 18)
#define PR_LINESTRIP (0x6 << 18)
#define PR_RECTS (0x7 << 18)
#define PR_MASK (0x7 << 18)
typedef struct drm_i810_dma {
void * __linux_virtual;
int request_idx;
int request_size;
int granted;
} drm_i810_dma_t;
typedef struct _drm_i810_overlay_t {
unsigned int offset;
unsigned int physical;
} drm_i810_overlay_t;
typedef struct _drm_i810_mc {
int idx;
int used;
int num_blocks;
int * length;
unsigned int last_render;
} drm_i810_mc_t;
#ifdef __cplusplus
}
#endif
#endif

102
libc/kernel/uapi/drm/ivpu_accel.h Normal file
View file

@ -0,0 +1,102 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef __UAPI_IVPU_DRM_H__
#define __UAPI_IVPU_DRM_H__
#include "drm.h"
#ifdef __cplusplus
extern "C" {
#endif
#define DRM_IVPU_DRIVER_MAJOR 1
#define DRM_IVPU_DRIVER_MINOR 0
#define DRM_IVPU_GET_PARAM 0x00
#define DRM_IVPU_SET_PARAM 0x01
#define DRM_IVPU_BO_CREATE 0x02
#define DRM_IVPU_BO_INFO 0x03
#define DRM_IVPU_SUBMIT 0x05
#define DRM_IVPU_BO_WAIT 0x06
#define DRM_IOCTL_IVPU_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_GET_PARAM, struct drm_ivpu_param)
#define DRM_IOCTL_IVPU_SET_PARAM DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_SET_PARAM, struct drm_ivpu_param)
#define DRM_IOCTL_IVPU_BO_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_BO_CREATE, struct drm_ivpu_bo_create)
#define DRM_IOCTL_IVPU_BO_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_BO_INFO, struct drm_ivpu_bo_info)
#define DRM_IOCTL_IVPU_SUBMIT DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_SUBMIT, struct drm_ivpu_submit)
#define DRM_IOCTL_IVPU_BO_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_BO_WAIT, struct drm_ivpu_bo_wait)
#define DRM_IVPU_PARAM_DEVICE_ID 0
#define DRM_IVPU_PARAM_DEVICE_REVISION 1
#define DRM_IVPU_PARAM_PLATFORM_TYPE 2
#define DRM_IVPU_PARAM_CORE_CLOCK_RATE 3
#define DRM_IVPU_PARAM_NUM_CONTEXTS 4
#define DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS 5
#define DRM_IVPU_PARAM_CONTEXT_PRIORITY 6
#define DRM_IVPU_PARAM_CONTEXT_ID 7
#define DRM_IVPU_PARAM_FW_API_VERSION 8
#define DRM_IVPU_PARAM_ENGINE_HEARTBEAT 9
#define DRM_IVPU_PARAM_UNIQUE_INFERENCE_ID 10
#define DRM_IVPU_PARAM_TILE_CONFIG 11
#define DRM_IVPU_PARAM_SKU 12
#define DRM_IVPU_PLATFORM_TYPE_SILICON 0
#define DRM_IVPU_CONTEXT_PRIORITY_IDLE 0
#define DRM_IVPU_CONTEXT_PRIORITY_NORMAL 1
#define DRM_IVPU_CONTEXT_PRIORITY_FOCUS 2
#define DRM_IVPU_CONTEXT_PRIORITY_REALTIME 3
struct drm_ivpu_param {
__u32 param;
__u32 index;
__u64 value;
};
#define DRM_IVPU_BO_HIGH_MEM 0x00000001
#define DRM_IVPU_BO_MAPPABLE 0x00000002
#define DRM_IVPU_BO_CACHED 0x00000000
#define DRM_IVPU_BO_UNCACHED 0x00010000
#define DRM_IVPU_BO_WC 0x00020000
#define DRM_IVPU_BO_CACHE_MASK 0x00030000
#define DRM_IVPU_BO_FLAGS (DRM_IVPU_BO_HIGH_MEM | DRM_IVPU_BO_MAPPABLE | DRM_IVPU_BO_CACHE_MASK)
struct drm_ivpu_bo_create {
__u64 size;
__u32 flags;
__u32 handle;
__u64 vpu_addr;
};
struct drm_ivpu_bo_info {
__u32 handle;
__u32 flags;
__u64 vpu_addr;
__u64 mmap_offset;
__u64 size;
};
#define DRM_IVPU_ENGINE_COMPUTE 0
#define DRM_IVPU_ENGINE_COPY 1
struct drm_ivpu_submit {
__u64 buffers_ptr;
__u32 buffer_count;
__u32 engine;
__u32 flags;
__u32 commands_offset;
};
#define DRM_IVPU_JOB_STATUS_SUCCESS 0
struct drm_ivpu_bo_wait {
__u32 handle;
__u32 flags;
__s64 timeout_ns;
__u32 job_status;
__u32 pad;
};
#ifdef __cplusplus
}
#endif
#endif

247
libc/kernel/uapi/drm/mga_drm.h
View file

@ -1,247 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef __MGA_DRM_H__
#define __MGA_DRM_H__
#include "drm.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifndef __MGA_SAREA_DEFINES__
#define __MGA_SAREA_DEFINES__
#define MGA_F 0x1
#define MGA_A 0x2
#define MGA_S 0x4
#define MGA_T2 0x8
#define MGA_WARP_TGZ 0
#define MGA_WARP_TGZF (MGA_F)
#define MGA_WARP_TGZA (MGA_A)
#define MGA_WARP_TGZAF (MGA_F | MGA_A)
#define MGA_WARP_TGZS (MGA_S)
#define MGA_WARP_TGZSF (MGA_S | MGA_F)
#define MGA_WARP_TGZSA (MGA_S | MGA_A)
#define MGA_WARP_TGZSAF (MGA_S | MGA_F | MGA_A)
#define MGA_WARP_T2GZ (MGA_T2)
#define MGA_WARP_T2GZF (MGA_T2 | MGA_F)
#define MGA_WARP_T2GZA (MGA_T2 | MGA_A)
#define MGA_WARP_T2GZAF (MGA_T2 | MGA_A | MGA_F)
#define MGA_WARP_T2GZS (MGA_T2 | MGA_S)
#define MGA_WARP_T2GZSF (MGA_T2 | MGA_S | MGA_F)
#define MGA_WARP_T2GZSA (MGA_T2 | MGA_S | MGA_A)
#define MGA_WARP_T2GZSAF (MGA_T2 | MGA_S | MGA_F | MGA_A)
#define MGA_MAX_G200_PIPES 8
#define MGA_MAX_G400_PIPES 16
#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES
#define MGA_WARP_UCODE_SIZE 32768
#define MGA_CARD_TYPE_G200 1
#define MGA_CARD_TYPE_G400 2
#define MGA_CARD_TYPE_G450 3
#define MGA_CARD_TYPE_G550 4
#define MGA_FRONT 0x1
#define MGA_BACK 0x2
#define MGA_DEPTH 0x4
#define MGA_UPLOAD_CONTEXT 0x1
#define MGA_UPLOAD_TEX0 0x2
#define MGA_UPLOAD_TEX1 0x4
#define MGA_UPLOAD_PIPE 0x8
#define MGA_UPLOAD_TEX0IMAGE 0x10
#define MGA_UPLOAD_TEX1IMAGE 0x20
#define MGA_UPLOAD_2D 0x40
#define MGA_WAIT_AGE 0x80
#define MGA_UPLOAD_CLIPRECTS 0x100
#define MGA_BUFFER_SIZE (1 << 16)
#define MGA_NUM_BUFFERS 128
#define MGA_NR_SAREA_CLIPRECTS 8
#define MGA_CARD_HEAP 0
#define MGA_AGP_HEAP 1
#define MGA_NR_TEX_HEAPS 2
#define MGA_NR_TEX_REGIONS 16
#define MGA_LOG_MIN_TEX_REGION_SIZE 16
#define DRM_MGA_IDLE_RETRY 2048
#endif
typedef struct {
unsigned int dstorg;
unsigned int maccess;
unsigned int plnwt;
unsigned int dwgctl;
unsigned int alphactrl;
unsigned int fogcolor;
unsigned int wflag;
unsigned int tdualstage0;
unsigned int tdualstage1;
unsigned int fcol;
unsigned int stencil;
unsigned int stencilctl;
} drm_mga_context_regs_t;
typedef struct {
unsigned int pitch;
} drm_mga_server_regs_t;
typedef struct {
unsigned int texctl;
unsigned int texctl2;
unsigned int texfilter;
unsigned int texbordercol;
unsigned int texorg;
unsigned int texwidth;
unsigned int texheight;
unsigned int texorg1;
unsigned int texorg2;
unsigned int texorg3;
unsigned int texorg4;
} drm_mga_texture_regs_t;
typedef struct {
unsigned int head;
unsigned int wrap;
} drm_mga_age_t;
typedef struct _drm_mga_sarea {
drm_mga_context_regs_t context_state;
drm_mga_server_regs_t server_state;
drm_mga_texture_regs_t tex_state[2];
unsigned int warp_pipe;
unsigned int dirty;
unsigned int vertsize;
struct drm_clip_rect boxes[MGA_NR_SAREA_CLIPRECTS];
unsigned int nbox;
unsigned int req_drawable;
unsigned int req_draw_buffer;
unsigned int exported_drawable;
unsigned int exported_index;
unsigned int exported_stamp;
unsigned int exported_buffers;
unsigned int exported_nfront;
unsigned int exported_nback;
int exported_back_x, exported_front_x, exported_w;
int exported_back_y, exported_front_y, exported_h;
struct drm_clip_rect exported_boxes[MGA_NR_SAREA_CLIPRECTS];
unsigned int status[4];
unsigned int last_wrap;
drm_mga_age_t last_frame;
unsigned int last_enqueue;
unsigned int last_dispatch;
unsigned int last_quiescent;
struct drm_tex_region texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1];
unsigned int texAge[MGA_NR_TEX_HEAPS];
int ctxOwner;
} drm_mga_sarea_t;
#define DRM_MGA_INIT 0x00
#define DRM_MGA_FLUSH 0x01
#define DRM_MGA_RESET 0x02
#define DRM_MGA_SWAP 0x03
#define DRM_MGA_CLEAR 0x04
#define DRM_MGA_VERTEX 0x05
#define DRM_MGA_INDICES 0x06
#define DRM_MGA_ILOAD 0x07
#define DRM_MGA_BLIT 0x08
#define DRM_MGA_GETPARAM 0x09
#define DRM_MGA_SET_FENCE 0x0a
#define DRM_MGA_WAIT_FENCE 0x0b
#define DRM_MGA_DMA_BOOTSTRAP 0x0c
#define DRM_IOCTL_MGA_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t)
#define DRM_IOCTL_MGA_FLUSH DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_FLUSH, struct drm_lock)
#define DRM_IOCTL_MGA_RESET DRM_IO(DRM_COMMAND_BASE + DRM_MGA_RESET)
#define DRM_IOCTL_MGA_SWAP DRM_IO(DRM_COMMAND_BASE + DRM_MGA_SWAP)
#define DRM_IOCTL_MGA_CLEAR DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t)
#define DRM_IOCTL_MGA_VERTEX DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t)
#define DRM_IOCTL_MGA_INDICES DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t)
#define DRM_IOCTL_MGA_ILOAD DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t)
#define DRM_IOCTL_MGA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t)
#define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t)
#define DRM_IOCTL_MGA_SET_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_MGA_SET_FENCE, __u32)
#define DRM_IOCTL_MGA_WAIT_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_WAIT_FENCE, __u32)
#define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t)
typedef struct _drm_mga_warp_index {
int installed;
unsigned long phys_addr;
int size;
} drm_mga_warp_index_t;
typedef struct drm_mga_init {
enum {
MGA_INIT_DMA = 0x01,
MGA_CLEANUP_DMA = 0x02
} func;
unsigned long sarea_priv_offset;
__struct_group(, always32bit,, int chipset;
int sgram;
unsigned int maccess;
unsigned int fb_cpp;
unsigned int front_offset, front_pitch;
unsigned int back_offset, back_pitch;
unsigned int depth_cpp;
unsigned int depth_offset, depth_pitch;
unsigned int texture_offset[MGA_NR_TEX_HEAPS];
unsigned int texture_size[MGA_NR_TEX_HEAPS];
);
unsigned long fb_offset;
unsigned long mmio_offset;
unsigned long status_offset;
unsigned long warp_offset;
unsigned long primary_offset;
unsigned long buffers_offset;
} drm_mga_init_t;
typedef struct drm_mga_dma_bootstrap {
unsigned long texture_handle;
__u32 texture_size;
__u32 primary_size;
__u32 secondary_bin_count;
__u32 secondary_bin_size;
__u32 agp_mode;
__u8 agp_size;
} drm_mga_dma_bootstrap_t;
typedef struct drm_mga_clear {
unsigned int flags;
unsigned int clear_color;
unsigned int clear_depth;
unsigned int color_mask;
unsigned int depth_mask;
} drm_mga_clear_t;
typedef struct drm_mga_vertex {
int idx;
int used;
int discard;
} drm_mga_vertex_t;
typedef struct drm_mga_indices {
int idx;
unsigned int start;
unsigned int end;
int discard;
} drm_mga_indices_t;
typedef struct drm_mga_iload {
int idx;
unsigned int dstorg;
unsigned int length;
} drm_mga_iload_t;
typedef struct _drm_mga_blit {
unsigned int planemask;
unsigned int srcorg;
unsigned int dstorg;
int src_pitch, dst_pitch;
int delta_sx, delta_sy;
int delta_dx, delta_dy;
int height, ydir;
int source_pitch, dest_pitch;
} drm_mga_blit_t;
#define MGA_PARAM_IRQ_NR 1
#define MGA_PARAM_CARD_TYPE 2
typedef struct drm_mga_getparam {
int param;
void * value;
} drm_mga_getparam_t;
#ifdef __cplusplus
}
#endif
#endif

3
libc/kernel/uapi/drm/msm_drm.h
View file

@ -116,7 +116,8 @@ struct drm_msm_gem_submit_cmd {
#define MSM_SUBMIT_BO_READ 0x0001
#define MSM_SUBMIT_BO_WRITE 0x0002
#define MSM_SUBMIT_BO_DUMP 0x0004
#define MSM_SUBMIT_BO_FLAGS (MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_WRITE | MSM_SUBMIT_BO_DUMP)
#define MSM_SUBMIT_BO_NO_IMPLICIT 0x0008
#define MSM_SUBMIT_BO_FLAGS (MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_WRITE | MSM_SUBMIT_BO_DUMP | MSM_SUBMIT_BO_NO_IMPLICIT)
struct drm_msm_gem_submit_bo {
__u32 flags;
__u32 handle;

235
libc/kernel/uapi/drm/r128_drm.h
View file

@ -1,235 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef __R128_DRM_H__
#define __R128_DRM_H__
#include "drm.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifndef __R128_SAREA_DEFINES__
#define __R128_SAREA_DEFINES__
#define R128_UPLOAD_CONTEXT 0x001
#define R128_UPLOAD_SETUP 0x002
#define R128_UPLOAD_TEX0 0x004
#define R128_UPLOAD_TEX1 0x008
#define R128_UPLOAD_TEX0IMAGES 0x010
#define R128_UPLOAD_TEX1IMAGES 0x020
#define R128_UPLOAD_CORE 0x040
#define R128_UPLOAD_MASKS 0x080
#define R128_UPLOAD_WINDOW 0x100
#define R128_UPLOAD_CLIPRECTS 0x200
#define R128_REQUIRE_QUIESCENCE 0x400
#define R128_UPLOAD_ALL 0x7ff
#define R128_FRONT 0x1
#define R128_BACK 0x2
#define R128_DEPTH 0x4
#define R128_POINTS 0x1
#define R128_LINES 0x2
#define R128_LINE_STRIP 0x3
#define R128_TRIANGLES 0x4
#define R128_TRIANGLE_FAN 0x5
#define R128_TRIANGLE_STRIP 0x6
#define R128_BUFFER_SIZE 16384
#define R128_INDEX_PRIM_OFFSET 20
#define R128_HOSTDATA_BLIT_OFFSET 32
#define R128_NR_SAREA_CLIPRECTS 12
#define R128_LOCAL_TEX_HEAP 0
#define R128_AGP_TEX_HEAP 1
#define R128_NR_TEX_HEAPS 2
#define R128_NR_TEX_REGIONS 64
#define R128_LOG_TEX_GRANULARITY 16
#define R128_NR_CONTEXT_REGS 12
#define R128_MAX_TEXTURE_LEVELS 11
#define R128_MAX_TEXTURE_UNITS 2
#endif
typedef struct {
unsigned int dst_pitch_offset_c;
unsigned int dp_gui_master_cntl_c;
unsigned int sc_top_left_c;
unsigned int sc_bottom_right_c;
unsigned int z_offset_c;
unsigned int z_pitch_c;
unsigned int z_sten_cntl_c;
unsigned int tex_cntl_c;
unsigned int misc_3d_state_cntl_reg;
unsigned int texture_clr_cmp_clr_c;
unsigned int texture_clr_cmp_msk_c;
unsigned int fog_color_c;
unsigned int tex_size_pitch_c;
unsigned int constant_color_c;
unsigned int pm4_vc_fpu_setup;
unsigned int setup_cntl;
unsigned int dp_write_mask;
unsigned int sten_ref_mask_c;
unsigned int plane_3d_mask_c;
unsigned int window_xy_offset;
unsigned int scale_3d_cntl;
} drm_r128_context_regs_t;
typedef struct {
unsigned int tex_cntl;
unsigned int tex_combine_cntl;
unsigned int tex_size_pitch;
unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
unsigned int tex_border_color;
} drm_r128_texture_regs_t;
typedef struct drm_r128_sarea {
drm_r128_context_regs_t context_state;
drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS];
unsigned int dirty;
unsigned int vertsize;
unsigned int vc_format;
struct drm_clip_rect boxes[R128_NR_SAREA_CLIPRECTS];
unsigned int nbox;
unsigned int last_frame;
unsigned int last_dispatch;
struct drm_tex_region tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS + 1];
unsigned int tex_age[R128_NR_TEX_HEAPS];
int ctx_owner;
int pfAllowPageFlip;
int pfCurrentPage;
} drm_r128_sarea_t;
#define DRM_R128_INIT 0x00
#define DRM_R128_CCE_START 0x01
#define DRM_R128_CCE_STOP 0x02
#define DRM_R128_CCE_RESET 0x03
#define DRM_R128_CCE_IDLE 0x04
#define DRM_R128_RESET 0x06
#define DRM_R128_SWAP 0x07
#define DRM_R128_CLEAR 0x08
#define DRM_R128_VERTEX 0x09
#define DRM_R128_INDICES 0x0a
#define DRM_R128_BLIT 0x0b
#define DRM_R128_DEPTH 0x0c
#define DRM_R128_STIPPLE 0x0d
#define DRM_R128_INDIRECT 0x0f
#define DRM_R128_FULLSCREEN 0x10
#define DRM_R128_CLEAR2 0x11
#define DRM_R128_GETPARAM 0x12
#define DRM_R128_FLIP 0x13
#define DRM_IOCTL_R128_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t)
#define DRM_IOCTL_R128_CCE_START DRM_IO(DRM_COMMAND_BASE + DRM_R128_CCE_START)
#define DRM_IOCTL_R128_CCE_STOP DRM_IOW(DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t)
#define DRM_IOCTL_R128_CCE_RESET DRM_IO(DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
#define DRM_IOCTL_R128_CCE_IDLE DRM_IO(DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
#define DRM_IOCTL_R128_RESET DRM_IO(DRM_COMMAND_BASE + DRM_R128_RESET)
#define DRM_IOCTL_R128_SWAP DRM_IO(DRM_COMMAND_BASE + DRM_R128_SWAP)
#define DRM_IOCTL_R128_CLEAR DRM_IOW(DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t)
#define DRM_IOCTL_R128_VERTEX DRM_IOW(DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t)
#define DRM_IOCTL_R128_INDICES DRM_IOW(DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t)
#define DRM_IOCTL_R128_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t)
#define DRM_IOCTL_R128_DEPTH DRM_IOW(DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t)
#define DRM_IOCTL_R128_STIPPLE DRM_IOW(DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t)
#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t)
#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW(DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t)
#define DRM_IOCTL_R128_CLEAR2 DRM_IOW(DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t)
#define DRM_IOCTL_R128_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t)
#define DRM_IOCTL_R128_FLIP DRM_IO(DRM_COMMAND_BASE + DRM_R128_FLIP)
typedef struct drm_r128_init {
enum {
R128_INIT_CCE = 0x01,
R128_CLEANUP_CCE = 0x02
} func;
unsigned long sarea_priv_offset;
int is_pci;
int cce_mode;
int cce_secure;
int ring_size;
int usec_timeout;
unsigned int fb_bpp;
unsigned int front_offset, front_pitch;
unsigned int back_offset, back_pitch;
unsigned int depth_bpp;
unsigned int depth_offset, depth_pitch;
unsigned int span_offset;
unsigned long fb_offset;
unsigned long mmio_offset;
unsigned long ring_offset;
unsigned long ring_rptr_offset;
unsigned long buffers_offset;
unsigned long agp_textures_offset;
} drm_r128_init_t;
typedef struct drm_r128_cce_stop {
int flush;
int idle;
} drm_r128_cce_stop_t;
typedef struct drm_r128_clear {
unsigned int flags;
unsigned int clear_color;
unsigned int clear_depth;
unsigned int color_mask;
unsigned int depth_mask;
} drm_r128_clear_t;
typedef struct drm_r128_vertex {
int prim;
int idx;
int count;
int discard;
} drm_r128_vertex_t;
typedef struct drm_r128_indices {
int prim;
int idx;
int start;
int end;
int discard;
} drm_r128_indices_t;
typedef struct drm_r128_blit {
int idx;
int pitch;
int offset;
int format;
unsigned short x, y;
unsigned short width, height;
} drm_r128_blit_t;
typedef struct drm_r128_depth {
enum {
R128_WRITE_SPAN = 0x01,
R128_WRITE_PIXELS = 0x02,
R128_READ_SPAN = 0x03,
R128_READ_PIXELS = 0x04
} func;
int n;
int * x;
int * y;
unsigned int * buffer;
unsigned char * mask;
} drm_r128_depth_t;
typedef struct drm_r128_stipple {
unsigned int * mask;
} drm_r128_stipple_t;
typedef struct drm_r128_indirect {
int idx;
int start;
int end;
int discard;
} drm_r128_indirect_t;
typedef struct drm_r128_fullscreen {
enum {
R128_INIT_FULLSCREEN = 0x01,
R128_CLEANUP_FULLSCREEN = 0x02
} func;
} drm_r128_fullscreen_t;
#define R128_PARAM_IRQ_NR 1
typedef struct drm_r128_getparam {
int param;
void * value;
} drm_r128_getparam_t;
#ifdef __cplusplus
}
#endif
#endif

157
libc/kernel/uapi/drm/savage_drm.h
View file

@ -1,157 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef __SAVAGE_DRM_H__
#define __SAVAGE_DRM_H__
#include "drm.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifndef __SAVAGE_SAREA_DEFINES__
#define __SAVAGE_SAREA_DEFINES__
#define SAVAGE_CARD_HEAP 0
#define SAVAGE_AGP_HEAP 1
#define SAVAGE_NR_TEX_HEAPS 2
#define SAVAGE_NR_TEX_REGIONS 16
#define SAVAGE_LOG_MIN_TEX_REGION_SIZE 16
#endif
typedef struct _drm_savage_sarea {
struct drm_tex_region texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS + 1];
unsigned int texAge[SAVAGE_NR_TEX_HEAPS];
int ctxOwner;
} drm_savage_sarea_t, * drm_savage_sarea_ptr;
#define DRM_SAVAGE_BCI_INIT 0x00
#define DRM_SAVAGE_BCI_CMDBUF 0x01
#define DRM_SAVAGE_BCI_EVENT_EMIT 0x02
#define DRM_SAVAGE_BCI_EVENT_WAIT 0x03
#define DRM_IOCTL_SAVAGE_BCI_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_INIT, drm_savage_init_t)
#define DRM_IOCTL_SAVAGE_BCI_CMDBUF DRM_IOW(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_CMDBUF, drm_savage_cmdbuf_t)
#define DRM_IOCTL_SAVAGE_BCI_EVENT_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_EMIT, drm_savage_event_emit_t)
#define DRM_IOCTL_SAVAGE_BCI_EVENT_WAIT DRM_IOW(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_WAIT, drm_savage_event_wait_t)
#define SAVAGE_DMA_PCI 1
#define SAVAGE_DMA_AGP 3
typedef struct drm_savage_init {
enum {
SAVAGE_INIT_BCI = 1,
SAVAGE_CLEANUP_BCI = 2
} func;
unsigned int sarea_priv_offset;
unsigned int cob_size;
unsigned int bci_threshold_lo, bci_threshold_hi;
unsigned int dma_type;
unsigned int fb_bpp;
unsigned int front_offset, front_pitch;
unsigned int back_offset, back_pitch;
unsigned int depth_bpp;
unsigned int depth_offset, depth_pitch;
unsigned int texture_offset;
unsigned int texture_size;
unsigned long status_offset;
unsigned long buffers_offset;
unsigned long agp_textures_offset;
unsigned long cmd_dma_offset;
} drm_savage_init_t;
typedef union drm_savage_cmd_header drm_savage_cmd_header_t;
typedef struct drm_savage_cmdbuf {
drm_savage_cmd_header_t * cmd_addr;
unsigned int size;
unsigned int dma_idx;
int discard;
unsigned int * vb_addr;
unsigned int vb_size;
unsigned int vb_stride;
struct drm_clip_rect * box_addr;
unsigned int nbox;
} drm_savage_cmdbuf_t;
#define SAVAGE_WAIT_2D 0x1
#define SAVAGE_WAIT_3D 0x2
#define SAVAGE_WAIT_IRQ 0x4
typedef struct drm_savage_event {
unsigned int count;
unsigned int flags;
} drm_savage_event_emit_t, drm_savage_event_wait_t;
#define SAVAGE_CMD_STATE 0
#define SAVAGE_CMD_DMA_PRIM 1
#define SAVAGE_CMD_VB_PRIM 2
#define SAVAGE_CMD_DMA_IDX 3
#define SAVAGE_CMD_VB_IDX 4
#define SAVAGE_CMD_CLEAR 5
#define SAVAGE_CMD_SWAP 6
#define SAVAGE_PRIM_TRILIST 0
#define SAVAGE_PRIM_TRISTRIP 1
#define SAVAGE_PRIM_TRIFAN 2
#define SAVAGE_PRIM_TRILIST_201 3
#define SAVAGE_SKIP_Z 0x01
#define SAVAGE_SKIP_W 0x02
#define SAVAGE_SKIP_C0 0x04
#define SAVAGE_SKIP_C1 0x08
#define SAVAGE_SKIP_S0 0x10
#define SAVAGE_SKIP_T0 0x20
#define SAVAGE_SKIP_ST0 0x30
#define SAVAGE_SKIP_S1 0x40
#define SAVAGE_SKIP_T1 0x80
#define SAVAGE_SKIP_ST1 0xc0
#define SAVAGE_SKIP_ALL_S3D 0x3f
#define SAVAGE_SKIP_ALL_S4 0xff
#define SAVAGE_FRONT 0x1
#define SAVAGE_BACK 0x2
#define SAVAGE_DEPTH 0x4
union drm_savage_cmd_header {
struct {
unsigned char cmd;
unsigned char pad0;
unsigned short pad1;
unsigned short pad2;
unsigned short pad3;
} cmd;
struct {
unsigned char cmd;
unsigned char global;
unsigned short count;
unsigned short start;
unsigned short pad3;
} state;
struct {
unsigned char cmd;
unsigned char prim;
unsigned short skip;
unsigned short count;
unsigned short start;
} prim;
struct {
unsigned char cmd;
unsigned char prim;
unsigned short skip;
unsigned short count;
unsigned short pad3;
} idx;
struct {
unsigned char cmd;
unsigned char pad0;
unsigned short pad1;
unsigned int flags;
} clear0;
struct {
unsigned int mask;
unsigned int value;
} clear1;
};
#ifdef __cplusplus
}
#endif
#endif

54
libc/kernel/uapi/drm/sis_drm.h
View file

@ -1,54 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef __SIS_DRM_H__
#define __SIS_DRM_H__
#include "drm.h"
#ifdef __cplusplus
extern "C" {
#endif
#define NOT_USED_0_3
#define DRM_SIS_FB_ALLOC 0x04
#define DRM_SIS_FB_FREE 0x05
#define NOT_USED_6_12
#define DRM_SIS_AGP_INIT 0x13
#define DRM_SIS_AGP_ALLOC 0x14
#define DRM_SIS_AGP_FREE 0x15
#define DRM_SIS_FB_INIT 0x16
#define DRM_IOCTL_SIS_FB_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_FB_ALLOC, drm_sis_mem_t)
#define DRM_IOCTL_SIS_FB_FREE DRM_IOW(DRM_COMMAND_BASE + DRM_SIS_FB_FREE, drm_sis_mem_t)
#define DRM_IOCTL_SIS_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_AGP_INIT, drm_sis_agp_t)
#define DRM_IOCTL_SIS_AGP_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_AGP_ALLOC, drm_sis_mem_t)
#define DRM_IOCTL_SIS_AGP_FREE DRM_IOW(DRM_COMMAND_BASE + DRM_SIS_AGP_FREE, drm_sis_mem_t)
#define DRM_IOCTL_SIS_FB_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_SIS_FB_INIT, drm_sis_fb_t)
typedef struct {
int context;
unsigned long offset;
unsigned long size;
unsigned long free;
} drm_sis_mem_t;
typedef struct {
unsigned long offset, size;
} drm_sis_agp_t;
typedef struct {
unsigned long offset, size;
} drm_sis_fb_t;
#ifdef __cplusplus
}
#endif
#endif

202
libc/kernel/uapi/drm/via_drm.h
View file

@ -1,202 +0,0 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _VIA_DRM_H_
#define _VIA_DRM_H_
#include "drm.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifndef _VIA_DEFINES_
#define _VIA_DEFINES_
#define VIA_NR_SAREA_CLIPRECTS 8
#define VIA_NR_XVMC_PORTS 10
#define VIA_NR_XVMC_LOCKS 5
#define VIA_MAX_CACHELINE_SIZE 64
#define XVMCLOCKPTR(saPriv,lockNo) ((volatile struct drm_hw_lock *) (((((unsigned long) (saPriv)->XvMCLockArea) + (VIA_MAX_CACHELINE_SIZE - 1)) & ~(VIA_MAX_CACHELINE_SIZE - 1)) + VIA_MAX_CACHELINE_SIZE * (lockNo)))
#define VIA_NR_TEX_REGIONS 64
#define VIA_LOG_MIN_TEX_REGION_SIZE 16
#endif
#define VIA_UPLOAD_TEX0IMAGE 0x1
#define VIA_UPLOAD_TEX1IMAGE 0x2
#define VIA_UPLOAD_CTX 0x4
#define VIA_UPLOAD_BUFFERS 0x8
#define VIA_UPLOAD_TEX0 0x10
#define VIA_UPLOAD_TEX1 0x20
#define VIA_UPLOAD_CLIPRECTS 0x40
#define VIA_UPLOAD_ALL 0xff
#define DRM_VIA_ALLOCMEM 0x00
#define DRM_VIA_FREEMEM 0x01
#define DRM_VIA_AGP_INIT 0x02
#define DRM_VIA_FB_INIT 0x03
#define DRM_VIA_MAP_INIT 0x04
#define DRM_VIA_DEC_FUTEX 0x05
#define NOT_USED
#define DRM_VIA_DMA_INIT 0x07
#define DRM_VIA_CMDBUFFER 0x08
#define DRM_VIA_FLUSH 0x09
#define DRM_VIA_PCICMD 0x0a
#define DRM_VIA_CMDBUF_SIZE 0x0b
#define NOT_USED
#define DRM_VIA_WAIT_IRQ 0x0d
#define DRM_VIA_DMA_BLIT 0x0e
#define DRM_VIA_BLIT_SYNC 0x0f
#define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
#define DRM_IOCTL_VIA_FREEMEM DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t)
#define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t)
#define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t)
#define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t)
#define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t)
#define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t)
#define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
#define DRM_IOCTL_VIA_FLUSH DRM_IO(DRM_COMMAND_BASE + DRM_VIA_FLUSH)
#define DRM_IOCTL_VIA_PCICMD DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t)
#define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, drm_via_cmdbuf_size_t)
#define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t)
#define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t)
#define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t)
#define VIA_TEX_SETUP_SIZE 8
#define VIA_FRONT 0x1
#define VIA_BACK 0x2
#define VIA_DEPTH 0x4
#define VIA_STENCIL 0x8
#define VIA_MEM_VIDEO 0
#define VIA_MEM_AGP 1
#define VIA_MEM_SYSTEM 2
#define VIA_MEM_MIXED 3
#define VIA_MEM_UNKNOWN 4
typedef struct {
__u32 offset;
__u32 size;
} drm_via_agp_t;
typedef struct {
__u32 offset;
__u32 size;
} drm_via_fb_t;
typedef struct {
__u32 context;
__u32 type;
__u32 size;
unsigned long index;
unsigned long offset;
} drm_via_mem_t;
typedef struct _drm_via_init {
enum {
VIA_INIT_MAP = 0x01,
VIA_CLEANUP_MAP = 0x02
} func;
unsigned long sarea_priv_offset;
unsigned long fb_offset;
unsigned long mmio_offset;
unsigned long agpAddr;
} drm_via_init_t;
typedef struct _drm_via_futex {
enum {
VIA_FUTEX_WAIT = 0x00,
VIA_FUTEX_WAKE = 0X01
} func;
__u32 ms;
__u32 lock;
__u32 val;
} drm_via_futex_t;
typedef struct _drm_via_dma_init {
enum {
VIA_INIT_DMA = 0x01,
VIA_CLEANUP_DMA = 0x02,
VIA_DMA_INITIALIZED = 0x03
} func;
unsigned long offset;
unsigned long size;
unsigned long reg_pause_addr;
} drm_via_dma_init_t;
typedef struct _drm_via_cmdbuffer {
char * buf;
unsigned long size;
} drm_via_cmdbuffer_t;
typedef struct _drm_via_tex_region {
unsigned char next, prev;
unsigned char inUse;
int age;
} drm_via_tex_region_t;
typedef struct _drm_via_sarea {
unsigned int dirty;
unsigned int nbox;
struct drm_clip_rect boxes[VIA_NR_SAREA_CLIPRECTS];
drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1];
int texAge;
int ctxOwner;
int vertexPrim;
char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)];
unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS];
unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS];
unsigned int XvMCCtxNoGrabbed;
unsigned int pfCurrentOffset;
} drm_via_sarea_t;
typedef struct _drm_via_cmdbuf_size {
enum {
VIA_CMDBUF_SPACE = 0x01,
VIA_CMDBUF_LAG = 0x02
} func;
int wait;
__u32 size;
} drm_via_cmdbuf_size_t;
typedef enum {
VIA_IRQ_ABSOLUTE = 0x0,
VIA_IRQ_RELATIVE = 0x1,
VIA_IRQ_SIGNAL = 0x10000000,
VIA_IRQ_FORCE_SEQUENCE = 0x20000000
} via_irq_seq_type_t;
#define VIA_IRQ_FLAGS_MASK 0xF0000000
enum drm_via_irqs {
drm_via_irq_hqv0 = 0,
drm_via_irq_hqv1,
drm_via_irq_dma0_dd,
drm_via_irq_dma0_td,
drm_via_irq_dma1_dd,
drm_via_irq_dma1_td,
drm_via_irq_num
};
struct drm_via_wait_irq_request {
unsigned irq;
via_irq_seq_type_t type;
__u32 sequence;
__u32 signal;
};
typedef union drm_via_irqwait {
struct drm_via_wait_irq_request request;
struct drm_wait_vblank_reply reply;
} drm_via_irqwait_t;
typedef struct drm_via_blitsync {
__u32 sync_handle;
unsigned engine;
} drm_via_blitsync_t;
typedef struct drm_via_dmablit {
__u32 num_lines;
__u32 line_length;
__u32 fb_addr;
__u32 fb_stride;
unsigned char * mem_addr;
__u32 mem_stride;
__u32 flags;
int to_fb;
drm_via_blitsync_t sync;
} drm_via_dmablit_t;
#ifdef __cplusplus
}
#endif
#endif

1
libc/kernel/uapi/linux/android/binder.h
View file

@ -221,6 +221,7 @@ enum binder_driver_return_protocol {
BR_FAILED_REPLY = _IO('r', 17),
BR_FROZEN_REPLY = _IO('r', 18),
BR_ONEWAY_SPAM_SUSPECT = _IO('r', 19),
BR_TRANSACTION_PENDING_FROZEN = _IO('r', 20),
};
enum binder_driver_command_protocol {
BC_TRANSACTION = _IOW('c', 0, struct binder_transaction_data),

2
libc/kernel/uapi/linux/auxvec.h
View file

@ -41,6 +41,8 @@
#define AT_BASE_PLATFORM 24
#define AT_RANDOM 25
#define AT_HWCAP2 26
#define AT_RSEQ_FEATURE_SIZE 27
#define AT_RSEQ_ALIGN 28
#define AT_EXECFN 31
#ifndef AT_MINSIGSTKSZ
#define AT_MINSIGSTKSZ 51

1
libc/kernel/uapi/linux/batadv_packet.h
View file

@ -28,6 +28,7 @@ enum batadv_packettype {
BATADV_CODED = 0x02,
BATADV_ELP = 0x03,
BATADV_OGM2 = 0x04,
BATADV_MCAST = 0x05,
#define BATADV_UNICAST_MIN 0x40
BATADV_UNICAST = 0x40,
BATADV_UNICAST_FRAG = 0x41,

14
libc/kernel/uapi/linux/bpf.h
View file

@ -275,6 +275,7 @@ enum bpf_link_type {
#define BPF_F_TEST_STATE_FREQ (1U << 3)
#define BPF_F_SLEEPABLE (1U << 4)
#define BPF_F_XDP_HAS_FRAGS (1U << 5)
#define BPF_F_XDP_DEV_BOUND_ONLY (1U << 6)
#define BPF_F_KPROBE_MULTI_RETURN (1U << 0)
#define BPF_PSEUDO_MAP_FD 1
#define BPF_PSEUDO_MAP_IDX 5
@ -557,6 +558,7 @@ enum {
BPF_F_ZERO_CSUM_TX = (1ULL << 1),
BPF_F_DONT_FRAGMENT = (1ULL << 2),
BPF_F_SEQ_NUMBER = (1ULL << 3),
BPF_F_NO_TUNNEL_KEY = (1ULL << 4),
};
enum {
BPF_F_TUNINFO_FLAGS = (1ULL << 4),
@ -583,6 +585,8 @@ enum {
BPF_F_ADJ_ROOM_ENCAP_L4_UDP = (1ULL << 4),
BPF_F_ADJ_ROOM_NO_CSUM_RESET = (1ULL << 5),
BPF_F_ADJ_ROOM_ENCAP_L2_ETH = (1ULL << 6),
BPF_F_ADJ_ROOM_DECAP_L3_IPV4 = (1ULL << 7),
BPF_F_ADJ_ROOM_DECAP_L3_IPV6 = (1ULL << 8),
};
enum {
BPF_ADJ_ROOM_ENCAP_L2_MASK = 0xff,
@ -1095,6 +1099,7 @@ struct bpf_raw_tracepoint_args {
enum {
BPF_FIB_LOOKUP_DIRECT = (1U << 0),
BPF_FIB_LOOKUP_OUTPUT = (1U << 1),
BPF_FIB_LOOKUP_SKIP_NEIGH = (1U << 2),
};
enum {
BPF_FIB_LKUP_RET_SUCCESS,
@ -1218,6 +1223,15 @@ struct bpf_list_node {
__u64 : 64;
__u64 : 64;
} __attribute__((aligned(8)));
struct bpf_rb_root {
__u64 : 64;
__u64 : 64;
} __attribute__((aligned(8)));
struct bpf_rb_node {
__u64 : 64;
__u64 : 64;
__u64 : 64;
} __attribute__((aligned(8)));
struct bpf_sysctl {
__u32 write;
__u32 file_pos;

3
libc/kernel/uapi/linux/btrfs.h
View file

@ -157,7 +157,8 @@ struct btrfs_ioctl_dev_info_args {
__u8 uuid[BTRFS_UUID_SIZE];
__u64 bytes_used;
__u64 total_bytes;
__u64 unused[379];
__u8 fsid[BTRFS_UUID_SIZE];
__u64 unused[377];
__u8 path[BTRFS_DEVICE_PATH_NAME_MAX];
};
#define BTRFS_FS_INFO_FLAG_CSUM_INFO (1 << 0)

4
libc/kernel/uapi/linux/cxl_mem.h
View file

@ -37,7 +37,9 @@ static const struct {
struct cxl_command_info {
__u32 id;
__u32 flags;
#define CXL_MEM_COMMAND_FLAG_MASK GENMASK(0, 0)
#define CXL_MEM_COMMAND_FLAG_MASK GENMASK(1, 0)
#define CXL_MEM_COMMAND_FLAG_ENABLED BIT(0)
#define CXL_MEM_COMMAND_FLAG_EXCLUSIVE BIT(1)
__u32 size_in;
__u32 size_out;
};

1
libc/kernel/uapi/linux/dcbnl.h
View file

@ -181,6 +181,7 @@ enum ieee_attrs {
DCB_ATTR_IEEE_QCN_STATS,
DCB_ATTR_DCB_BUFFER,
DCB_ATTR_DCB_APP_TRUST_TABLE,
DCB_ATTR_DCB_REWR_TABLE,
__DCB_ATTR_IEEE_MAX
};
#define DCB_ATTR_IEEE_MAX (__DCB_ATTR_IEEE_MAX - 1)

3
libc/kernel/uapi/linux/elf.h
View file

@ -366,6 +366,7 @@ typedef struct elf64_shdr {
#define NT_ARM_PAC_ENABLED_KEYS 0x40a
#define NT_ARM_SSVE 0x40b
#define NT_ARM_ZA 0x40c
#define NT_ARM_ZT 0x40d
#define NT_ARC_V2 0x600
#define NT_VMCOREDD 0x700
#define NT_MIPS_DSP 0x800
@ -376,6 +377,8 @@ typedef struct elf64_shdr {
#define NT_LOONGARCH_LSX 0xa02
#define NT_LOONGARCH_LASX 0xa03
#define NT_LOONGARCH_LBT 0xa04
#define NT_LOONGARCH_HW_BREAK 0xa05
#define NT_LOONGARCH_HW_WATCH 0xa06
#define NT_GNU_PROPERTY_TYPE_0 5
typedef struct elf32_note {
Elf32_Word n_namesz;

18
libc/kernel/uapi/linux/ethtool.h
View file

@ -269,6 +269,11 @@ enum ethtool_stringset {
ETH_SS_STATS_RMON,
ETH_SS_COUNT
};
enum ethtool_mac_stats_src {
ETHTOOL_MAC_STATS_SRC_AGGREGATE,
ETHTOOL_MAC_STATS_SRC_EMAC,
ETHTOOL_MAC_STATS_SRC_PMAC,
};
enum ethtool_module_power_mode_policy {
ETHTOOL_MODULE_POWER_MODE_POLICY_HIGH = 1,
ETHTOOL_MODULE_POWER_MODE_POLICY_AUTO,
@ -291,6 +296,14 @@ enum ethtool_podl_pse_pw_d_status {
ETHTOOL_PODL_PSE_PW_D_STATUS_IDLE,
ETHTOOL_PODL_PSE_PW_D_STATUS_ERROR,
};
enum ethtool_mm_verify_status {
ETHTOOL_MM_VERIFY_STATUS_UNKNOWN,
ETHTOOL_MM_VERIFY_STATUS_INITIAL,
ETHTOOL_MM_VERIFY_STATUS_VERIFYING,
ETHTOOL_MM_VERIFY_STATUS_SUCCEEDED,
ETHTOOL_MM_VERIFY_STATUS_FAILED,
ETHTOOL_MM_VERIFY_STATUS_DISABLED,
};
struct ethtool_gstrings {
__u32 cmd;
__u32 string_set;
@ -419,7 +432,7 @@ struct ethtool_rxnfc {
__u32 rule_cnt;
__u32 rss_context;
};
__u32 rule_locs[0];
__u32 rule_locs[];
};
struct ethtool_rxfh_indir {
__u32 cmd;
@ -725,6 +738,9 @@ enum ethtool_link_mode_bit_indices {
ETHTOOL_LINK_MODE_800000baseDR8_2_Full_BIT = 96,
ETHTOOL_LINK_MODE_800000baseSR8_Full_BIT = 97,
ETHTOOL_LINK_MODE_800000baseVR8_Full_BIT = 98,
ETHTOOL_LINK_MODE_10baseT1S_Full_BIT = 99,
ETHTOOL_LINK_MODE_10baseT1S_Half_BIT = 100,
ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT = 101,
__ETHTOOL_LINK_MODE_MASK_NBITS
};
#define __ETHTOOL_LINK_MODE_LEGACY_MASK(base_name) (1UL << (ETHTOOL_LINK_MODE_ ##base_name ##_BIT))

58
libc/kernel/uapi/linux/ethtool_netlink.h
View file

@ -59,6 +59,11 @@ enum {
ETHTOOL_MSG_PSE_GET,
ETHTOOL_MSG_PSE_SET,
ETHTOOL_MSG_RSS_GET,
ETHTOOL_MSG_PLCA_GET_CFG,
ETHTOOL_MSG_PLCA_SET_CFG,
ETHTOOL_MSG_PLCA_GET_STATUS,
ETHTOOL_MSG_MM_GET,
ETHTOOL_MSG_MM_SET,
__ETHTOOL_MSG_USER_CNT,
ETHTOOL_MSG_USER_MAX = __ETHTOOL_MSG_USER_CNT - 1
};
@ -102,6 +107,11 @@ enum {
ETHTOOL_MSG_MODULE_NTF,
ETHTOOL_MSG_PSE_GET_REPLY,
ETHTOOL_MSG_RSS_GET_REPLY,
ETHTOOL_MSG_PLCA_GET_CFG_REPLY,
ETHTOOL_MSG_PLCA_GET_STATUS_REPLY,
ETHTOOL_MSG_PLCA_NTF,
ETHTOOL_MSG_MM_GET_REPLY,
ETHTOOL_MSG_MM_NTF,
__ETHTOOL_MSG_KERNEL_CNT,
ETHTOOL_MSG_KERNEL_MAX = __ETHTOOL_MSG_KERNEL_CNT - 1
};
@ -266,6 +276,7 @@ enum {
ETHTOOL_A_RINGS_TCP_DATA_SPLIT,
ETHTOOL_A_RINGS_CQE_SIZE,
ETHTOOL_A_RINGS_TX_PUSH,
ETHTOOL_A_RINGS_RX_PUSH,
__ETHTOOL_A_RINGS_CNT,
ETHTOOL_A_RINGS_MAX = (__ETHTOOL_A_RINGS_CNT - 1)
};
@ -310,6 +321,9 @@ enum {
ETHTOOL_A_COALESCE_RATE_SAMPLE_INTERVAL,
ETHTOOL_A_COALESCE_USE_CQE_MODE_TX,
ETHTOOL_A_COALESCE_USE_CQE_MODE_RX,
ETHTOOL_A_COALESCE_TX_AGGR_MAX_BYTES,
ETHTOOL_A_COALESCE_TX_AGGR_MAX_FRAMES,
ETHTOOL_A_COALESCE_TX_AGGR_TIME_USECS,
__ETHTOOL_A_COALESCE_CNT,
ETHTOOL_A_COALESCE_MAX = (__ETHTOOL_A_COALESCE_CNT - 1)
};
@ -320,6 +334,7 @@ enum {
ETHTOOL_A_PAUSE_RX,
ETHTOOL_A_PAUSE_TX,
ETHTOOL_A_PAUSE_STATS,
ETHTOOL_A_PAUSE_STATS_SRC,
__ETHTOOL_A_PAUSE_CNT,
ETHTOOL_A_PAUSE_MAX = (__ETHTOOL_A_PAUSE_CNT - 1)
};
@ -538,6 +553,7 @@ enum {
ETHTOOL_A_STATS_HEADER,
ETHTOOL_A_STATS_GROUPS,
ETHTOOL_A_STATS_GRP,
ETHTOOL_A_STATS_SRC,
__ETHTOOL_A_STATS_CNT,
ETHTOOL_A_STATS_MAX = (__ETHTOOL_A_STATS_CNT - 1)
};
@ -635,6 +651,48 @@ enum {
__ETHTOOL_A_RSS_CNT,
ETHTOOL_A_RSS_MAX = (__ETHTOOL_A_RSS_CNT - 1),
};
enum {
ETHTOOL_A_PLCA_UNSPEC,
ETHTOOL_A_PLCA_HEADER,
ETHTOOL_A_PLCA_VERSION,
ETHTOOL_A_PLCA_ENABLED,
ETHTOOL_A_PLCA_STATUS,
ETHTOOL_A_PLCA_NODE_CNT,
ETHTOOL_A_PLCA_NODE_ID,
ETHTOOL_A_PLCA_TO_TMR,
ETHTOOL_A_PLCA_BURST_CNT,
ETHTOOL_A_PLCA_BURST_TMR,
__ETHTOOL_A_PLCA_CNT,
ETHTOOL_A_PLCA_MAX = (__ETHTOOL_A_PLCA_CNT - 1)
};
enum {
ETHTOOL_A_MM_STAT_UNSPEC,
ETHTOOL_A_MM_STAT_PAD,
ETHTOOL_A_MM_STAT_REASSEMBLY_ERRORS,
ETHTOOL_A_MM_STAT_SMD_ERRORS,
ETHTOOL_A_MM_STAT_REASSEMBLY_OK,
ETHTOOL_A_MM_STAT_RX_FRAG_COUNT,
ETHTOOL_A_MM_STAT_TX_FRAG_COUNT,
ETHTOOL_A_MM_STAT_HOLD_COUNT,
__ETHTOOL_A_MM_STAT_CNT,
ETHTOOL_A_MM_STAT_MAX = (__ETHTOOL_A_MM_STAT_CNT - 1)
};
enum {
ETHTOOL_A_MM_UNSPEC,
ETHTOOL_A_MM_HEADER,
ETHTOOL_A_MM_PMAC_ENABLED,
ETHTOOL_A_MM_TX_ENABLED,
ETHTOOL_A_MM_TX_ACTIVE,
ETHTOOL_A_MM_TX_MIN_FRAG_SIZE,
ETHTOOL_A_MM_RX_MIN_FRAG_SIZE,
ETHTOOL_A_MM_VERIFY_ENABLED,
ETHTOOL_A_MM_VERIFY_STATUS,
ETHTOOL_A_MM_VERIFY_TIME,
ETHTOOL_A_MM_MAX_VERIFY_TIME,
ETHTOOL_A_MM_STATS,
__ETHTOOL_A_MM_CNT,
ETHTOOL_A_MM_MAX = (__ETHTOOL_A_MM_CNT - 1)
};
#define ETHTOOL_GENL_NAME "ethtool"
#define ETHTOOL_GENL_VERSION 1
#define ETHTOOL_MCGRP_MONITOR_NAME "monitor"

14
libc/kernel/uapi/linux/fanotify.h
View file

@ -113,13 +113,27 @@ struct fanotify_event_info_error {
__s32 error;
__u32 error_count;
};
#define FAN_RESPONSE_INFO_NONE 0
#define FAN_RESPONSE_INFO_AUDIT_RULE 1
struct fanotify_response {
__s32 fd;
__u32 response;
};
struct fanotify_response_info_header {
__u8 type;
__u8 pad;
__u16 len;
};
struct fanotify_response_info_audit_rule {
struct fanotify_response_info_header hdr;
__u32 rule_number;
__u32 subj_trust;
__u32 obj_trust;
};
#define FAN_ALLOW 0x01
#define FAN_DENY 0x02
#define FAN_AUDIT 0x10
#define FAN_INFO 0x20
#define FAN_NOFD - 1
#define FAN_NOPIDFD FAN_NOFD
#define FAN_EPIDFD - 2

1
libc/kernel/uapi/linux/fcntl.h
View file

@ -34,6 +34,7 @@
#define F_SEAL_GROW 0x0004
#define F_SEAL_WRITE 0x0008
#define F_SEAL_FUTURE_WRITE 0x0010
#define F_SEAL_EXEC 0x0020
#define F_GET_RW_HINT (F_LINUX_SPECIFIC_BASE + 11)
#define F_SET_RW_HINT (F_LINUX_SPECIFIC_BASE + 12)
#define F_GET_FILE_RW_HINT (F_LINUX_SPECIFIC_BASE + 13)

16
libc/kernel/uapi/linux/fou.h
View file

@ -19,7 +19,12 @@
#ifndef _UAPI_LINUX_FOU_H
#define _UAPI_LINUX_FOU_H
#define FOU_GENL_NAME "fou"
#define FOU_GENL_VERSION 0x1
#define FOU_GENL_VERSION 1
enum {
FOU_ENCAP_UNSPEC,
FOU_ENCAP_DIRECT,
FOU_ENCAP_GUE,
};
enum {
FOU_ATTR_UNSPEC,
FOU_ATTR_PORT,
@ -33,7 +38,7 @@ enum {
FOU_ATTR_PEER_V6,
FOU_ATTR_PEER_PORT,
FOU_ATTR_IFINDEX,
__FOU_ATTR_MAX,
__FOU_ATTR_MAX
};
#define FOU_ATTR_MAX (__FOU_ATTR_MAX - 1)
enum {
@ -41,12 +46,7 @@ enum {
FOU_CMD_ADD,
FOU_CMD_DEL,
FOU_CMD_GET,
__FOU_CMD_MAX,
};
enum {
FOU_ENCAP_UNSPEC,
FOU_ENCAP_DIRECT,
FOU_ENCAP_GUE,
__FOU_CMD_MAX
};
#define FOU_CMD_MAX (__FOU_CMD_MAX - 1)
#endif

16
libc/kernel/uapi/linux/fuse.h
View file

@ -111,6 +111,7 @@ struct fuse_file_lock {
#define FUSE_INIT_RESERVED (1 << 31)
#define FUSE_SECURITY_CTX (1ULL << 32)
#define FUSE_HAS_INODE_DAX (1ULL << 33)
#define FUSE_CREATE_SUPP_GROUP (1ULL << 34)
#if FUSE_KERNEL_VERSION > 7 || FUSE_KERNEL_VERSION == 7 && FUSE_KERNEL_MINOR_VERSION >= 36
#define FUSE_PASSTHROUGH (1ULL << 63)
#else
@ -140,6 +141,10 @@ struct fuse_file_lock {
#define FUSE_OPEN_KILL_SUIDGID (1 << 0)
#define FUSE_SETXATTR_ACL_KILL_SGID (1 << 0)
#define FUSE_EXPIRE_ONLY (1 << 0)
enum fuse_ext_type {
FUSE_MAX_NR_SECCTX = 31,
FUSE_EXT_GROUPS = 32,
};
enum fuse_opcode {
FUSE_LOOKUP = 1,
FUSE_FORGET = 2,
@ -465,7 +470,8 @@ struct fuse_in_header {
uint32_t uid;
uint32_t gid;
uint32_t pid;
uint32_t padding;
uint16_t total_extlen;
uint16_t padding;
};
struct fuse_out_header {
uint32_t len;
@ -575,4 +581,12 @@ struct fuse_secctx_header {
uint32_t size;
uint32_t nr_secctx;
};
struct fuse_ext_header {
uint32_t size;
uint32_t type;
};
struct fuse_supp_groups {
uint32_t nr_groups;
uint32_t groups[];
};
#endif

6
libc/kernel/uapi/linux/gsmmux.h
View file

@ -47,4 +47,10 @@ struct gsm_netconfig {
#define GSMIOC_ENABLE_NET _IOW('G', 2, struct gsm_netconfig)
#define GSMIOC_DISABLE_NET _IO('G', 3)
#define GSMIOC_GETFIRST _IOR('G', 4, __u32)
struct gsm_config_ext {
__u32 keep_alive;
__u32 reserved[7];
};
#define GSMIOC_GETCONF_EXT _IOR('G', 5, struct gsm_config_ext)
#define GSMIOC_SETCONF_EXT _IOW('G', 6, struct gsm_config_ext)
#endif

2
libc/kernel/uapi/linux/if_bridge.h
View file

@ -435,6 +435,8 @@ enum {
BRIDGE_VLANDB_ENTRY_TUNNEL_INFO,
BRIDGE_VLANDB_ENTRY_STATS,
BRIDGE_VLANDB_ENTRY_MCAST_ROUTER,
BRIDGE_VLANDB_ENTRY_MCAST_N_GROUPS,
BRIDGE_VLANDB_ENTRY_MCAST_MAX_GROUPS,
__BRIDGE_VLANDB_ENTRY_MAX,
};
#define BRIDGE_VLANDB_ENTRY_MAX (__BRIDGE_VLANDB_ENTRY_MAX - 1)

4
libc/kernel/uapi/linux/if_link.h
View file

@ -167,6 +167,8 @@ enum {
IFLA_TSO_MAX_SEGS,
IFLA_ALLMULTI,
IFLA_DEVLINK_PORT,
IFLA_GSO_IPV4_MAX_SIZE,
IFLA_GRO_IPV4_MAX_SIZE,
__IFLA_MAX
};
#define IFLA_MAX (__IFLA_MAX - 1)
@ -307,6 +309,8 @@ enum {
IFLA_BRPORT_MCAST_EHT_HOSTS_CNT,
IFLA_BRPORT_LOCKED,
IFLA_BRPORT_MAB,
IFLA_BRPORT_MCAST_N_GROUPS,
IFLA_BRPORT_MCAST_MAX_GROUPS,
__IFLA_BRPORT_MAX
};
#define IFLA_BRPORT_MAX (__IFLA_BRPORT_MAX - 1)

1
libc/kernel/uapi/linux/if_packet.h
View file

@ -113,6 +113,7 @@ struct tpacket_auxdata {
#define TP_STATUS_BLK_TMO (1 << 5)
#define TP_STATUS_VLAN_TPID_VALID (1 << 6)
#define TP_STATUS_CSUM_VALID (1 << 7)
#define TP_STATUS_GSO_TCP (1 << 8)
#define TP_STATUS_AVAILABLE 0
#define TP_STATUS_SEND_REQUEST (1 << 0)
#define TP_STATUS_SENDING (1 << 1)

1
libc/kernel/uapi/linux/in.h
View file

@ -141,6 +141,7 @@ enum {
#define MCAST_MSFILTER 48
#define IP_MULTICAST_ALL 49
#define IP_UNICAST_IF 50
#define IP_LOCAL_PORT_RANGE 51
#define MCAST_EXCLUDE 0
#define MCAST_INCLUDE 1
#define IP_DEFAULT_MULTICAST_TTL 1

7
libc/kernel/uapi/linux/io_uring.h
View file

@ -200,6 +200,7 @@ enum {
IORING_MSG_SEND_FD,
};
#define IORING_MSG_RING_CQE_SKIP (1U << 0)
#define IORING_MSG_RING_FLAGS_PASS (1U << 1)
struct io_uring_cqe {
__u64 user_data;
__s32 res;
@ -272,6 +273,7 @@ struct io_uring_params {
#define IORING_FEAT_RSRC_TAGS (1U << 10)
#define IORING_FEAT_CQE_SKIP (1U << 11)
#define IORING_FEAT_LINKED_FILE (1U << 12)
#define IORING_FEAT_REG_REG_RING (1U << 13)
enum {
IORING_REGISTER_BUFFERS = 0,
IORING_UNREGISTER_BUFFERS = 1,
@ -299,7 +301,8 @@ enum {
IORING_UNREGISTER_PBUF_RING = 23,
IORING_REGISTER_SYNC_CANCEL = 24,
IORING_REGISTER_FILE_ALLOC_RANGE = 25,
IORING_REGISTER_LAST
IORING_REGISTER_LAST,
IORING_REGISTER_USE_REGISTERED_RING = 1U << 31
};
enum {
IO_WQ_BOUND,
@ -381,7 +384,7 @@ struct io_uring_buf_ring {
__u16 resv3;
__u16 tail;
};
struct io_uring_buf bufs[0];
__DECLARE_FLEX_ARRAY(struct io_uring_buf, bufs);
};
};
struct io_uring_buf_reg {

2
libc/kernel/uapi/linux/ioam6.h
View file

@ -58,6 +58,6 @@ struct ioam6_trace_hdr {
#error "Please fix <asm/byteorder.h>"
#endif
#define IOAM6_TRACE_DATA_SIZE_MAX 244
__u8 data[0];
__u8 data[];
} __attribute__((packed));
#endif

2
libc/kernel/uapi/linux/kd.h
View file

@ -158,5 +158,7 @@ struct console_font {
#define KD_FONT_OP_GET 1
#define KD_FONT_OP_SET_DEFAULT 2
#define KD_FONT_OP_COPY 3
#define KD_FONT_OP_SET_TALL 4
#define KD_FONT_OP_GET_TALL 5
#define KD_FONT_FLAG_DONT_RECALC 1
#endif

6
libc/kernel/uapi/linux/kvm.h
View file

@ -436,6 +436,8 @@ struct kvm_s390_mem_op {
struct {
__u8 ar;
__u8 key;
__u8 pad1[6];
__u64 old_addr;
};
__u32 sida_offset;
__u8 reserved[32];
@ -447,9 +449,12 @@ struct kvm_s390_mem_op {
#define KVM_S390_MEMOP_SIDA_WRITE 3
#define KVM_S390_MEMOP_ABSOLUTE_READ 4
#define KVM_S390_MEMOP_ABSOLUTE_WRITE 5
#define KVM_S390_MEMOP_ABSOLUTE_CMPXCHG 6
#define KVM_S390_MEMOP_F_CHECK_ONLY (1ULL << 0)
#define KVM_S390_MEMOP_F_INJECT_EXCEPTION (1ULL << 1)
#define KVM_S390_MEMOP_F_SKEY_PROTECTION (1ULL << 2)
#define KVM_S390_MEMOP_EXTENSION_CAP_BASE (1 << 0)
#define KVM_S390_MEMOP_EXTENSION_CAP_CMPXCHG (1 << 1)
struct kvm_interrupt {
__u32 irq;
};
@ -926,6 +931,7 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_DIRTY_LOG_RING_ACQ_REL 223
#define KVM_CAP_S390_PROTECTED_ASYNC_DISABLE 224
#define KVM_CAP_DIRTY_LOG_RING_WITH_BITMAP 225
#define KVM_CAP_PMU_EVENT_MASKED_EVENTS 226
#ifdef KVM_CAP_IRQ_ROUTING
struct kvm_irq_routing_irqchip {
__u32 irqchip;

4
libc/kernel/uapi/linux/mdio.h
View file

@ -78,6 +78,8 @@
#define MDIO_AN_T1_LP_L 517
#define MDIO_AN_T1_LP_M 518
#define MDIO_AN_T1_LP_H 519
#define MDIO_AN_10BT1_AN_CTRL 526
#define MDIO_AN_10BT1_AN_STAT 527
#define MDIO_PMA_PMD_BT1_CTRL 2100
#define MDIO_PMA_LASI_RXCTRL 0x9000
#define MDIO_PMA_LASI_TXCTRL 0x9001
@ -270,6 +272,8 @@
#define MDIO_AN_T1_LP_M_B10L 0x4000
#define MDIO_AN_T1_LP_H_10L_TX_HI_REQ 0x1000
#define MDIO_AN_T1_LP_H_10L_TX_HI 0x2000
#define MDIO_AN_10BT1_AN_CTRL_ADV_EEE_T1L 0x4000
#define MDIO_AN_10BT1_AN_STAT_LPA_EEE_T1L 0x4000
#define MDIO_PMA_PMD_BT1_CTRL_CFG_MST 0x4000
#define MDIO_AN_EEE_ADV_100TX 0x0002
#define MDIO_AN_EEE_ADV_1000T 0x0004

3
libc/kernel/uapi/linux/media-bus-format.h
View file

@ -30,8 +30,11 @@
#define MEDIA_BUS_FMT_RGB565_2X8_BE 0x1007
#define MEDIA_BUS_FMT_RGB565_2X8_LE 0x1008
#define MEDIA_BUS_FMT_RGB666_1X18 0x1009
#define MEDIA_BUS_FMT_BGR666_1X18 0x1023
#define MEDIA_BUS_FMT_RBG888_1X24 0x100e
#define MEDIA_BUS_FMT_RGB666_1X24_CPADHI 0x1015
#define MEDIA_BUS_FMT_BGR666_1X24_CPADHI 0x1024
#define MEDIA_BUS_FMT_RGB565_1X24_CPADHI 0x1022
#define MEDIA_BUS_FMT_RGB666_1X7X3_SPWG 0x1010
#define MEDIA_BUS_FMT_BGR888_1X24 0x1013
#define MEDIA_BUS_FMT_BGR888_3X8 0x101b

1
libc/kernel/uapi/linux/membarrier.h
View file

@ -29,6 +29,7 @@ enum membarrier_cmd {
MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_SYNC_CORE = (1 << 6),
MEMBARRIER_CMD_PRIVATE_EXPEDITED_RSEQ = (1 << 7),
MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_RSEQ = (1 << 8),
MEMBARRIER_CMD_GET_REGISTRATIONS = (1 << 9),
MEMBARRIER_CMD_SHARED = MEMBARRIER_CMD_GLOBAL,
};
enum membarrier_cmd_flag {

2
libc/kernel/uapi/linux/memfd.h
View file

@ -22,6 +22,8 @@
#define MFD_CLOEXEC 0x0001U
#define MFD_ALLOW_SEALING 0x0002U
#define MFD_HUGETLB 0x0004U
#define MFD_NOEXEC_SEAL 0x0008U
#define MFD_EXEC 0x0010U
#define MFD_HUGE_SHIFT HUGETLB_FLAG_ENCODE_SHIFT
#define MFD_HUGE_MASK HUGETLB_FLAG_ENCODE_MASK
#define MFD_HUGE_64KB HUGETLB_FLAG_ENCODE_64KB

47
libc/kernel/uapi/linux/meye.h → libc/kernel/uapi/linux/netdev.h
View file

@ -16,23 +16,34 @@
***
****************************************************************************
****************************************************************************/
#ifndef _MEYE_H_
#define _MEYE_H_
struct meye_params {
unsigned char subsample;
unsigned char quality;
unsigned char sharpness;
unsigned char agc;
unsigned char picture;
unsigned char framerate;
#ifndef _UAPI_LINUX_NETDEV_H
#define _UAPI_LINUX_NETDEV_H
#define NETDEV_FAMILY_NAME "netdev"
#define NETDEV_FAMILY_VERSION 1
enum netdev_xdp_act {
NETDEV_XDP_ACT_BASIC = 1,
NETDEV_XDP_ACT_REDIRECT = 2,
NETDEV_XDP_ACT_NDO_XMIT = 4,
NETDEV_XDP_ACT_XSK_ZEROCOPY = 8,
NETDEV_XDP_ACT_HW_OFFLOAD = 16,
NETDEV_XDP_ACT_RX_SG = 32,
NETDEV_XDP_ACT_NDO_XMIT_SG = 64,
NETDEV_XDP_ACT_MASK = 127,
};
#define MEYEIOC_G_PARAMS _IOR('v', BASE_VIDIOC_PRIVATE + 0, struct meye_params)
#define MEYEIOC_S_PARAMS _IOW('v', BASE_VIDIOC_PRIVATE + 1, struct meye_params)
#define MEYEIOC_QBUF_CAPT _IOW('v', BASE_VIDIOC_PRIVATE + 2, int)
#define MEYEIOC_SYNC _IOWR('v', BASE_VIDIOC_PRIVATE + 3, int)
#define MEYEIOC_STILLCAPT _IO('v', BASE_VIDIOC_PRIVATE + 4)
#define MEYEIOC_STILLJCAPT _IOR('v', BASE_VIDIOC_PRIVATE + 5, int)
#define V4L2_CID_MEYE_AGC (V4L2_CID_USER_MEYE_BASE + 0)
#define V4L2_CID_MEYE_PICTURE (V4L2_CID_USER_MEYE_BASE + 1)
#define V4L2_CID_MEYE_FRAMERATE (V4L2_CID_USER_MEYE_BASE + 2)
enum {
NETDEV_A_DEV_IFINDEX = 1,
NETDEV_A_DEV_PAD,
NETDEV_A_DEV_XDP_FEATURES,
__NETDEV_A_DEV_MAX,
NETDEV_A_DEV_MAX = (__NETDEV_A_DEV_MAX - 1)
};
enum {
NETDEV_CMD_DEV_GET = 1,
NETDEV_CMD_DEV_ADD_NTF,
NETDEV_CMD_DEV_DEL_NTF,
NETDEV_CMD_DEV_CHANGE_NTF,
__NETDEV_CMD_MAX,
NETDEV_CMD_MAX = (__NETDEV_CMD_MAX - 1)
};
#define NETDEV_MCGRP_MGMT "mgmt"
#endif

7
libc/kernel/uapi/linux/netfilter/nf_tables.h
View file

@ -87,6 +87,13 @@ enum nf_tables_msg_types {
NFT_MSG_GETFLOWTABLE,
NFT_MSG_DELFLOWTABLE,
NFT_MSG_GETRULE_RESET,
NFT_MSG_DESTROYTABLE,
NFT_MSG_DESTROYCHAIN,
NFT_MSG_DESTROYRULE,
NFT_MSG_DESTROYSET,
NFT_MSG_DESTROYSETELEM,
NFT_MSG_DESTROYOBJ,
NFT_MSG_DESTROYFLOWTABLE,
NFT_MSG_MAX,
};
enum nft_list_attributes {

4
libc/kernel/uapi/linux/nl80211.h
View file

@ -528,6 +528,7 @@ enum nl80211_attrs {
NL80211_ATTR_TX_HW_TIMESTAMP,
NL80211_ATTR_RX_HW_TIMESTAMP,
NL80211_ATTR_TD_BITMAP,
NL80211_ATTR_PUNCT_BITMAP,
__NL80211_ATTR_AFTER_LAST,
NUM_NL80211_ATTR = __NL80211_ATTR_AFTER_LAST,
NL80211_ATTR_MAX = __NL80211_ATTR_AFTER_LAST - 1
@ -1396,6 +1397,7 @@ enum plink_actions {
#define NL80211_KEK_LEN 16
#define NL80211_KCK_EXT_LEN 24
#define NL80211_KEK_EXT_LEN 32
#define NL80211_KCK_EXT_LEN_32 32
#define NL80211_REPLAY_CTR_LEN 8
enum nl80211_rekey_data {
__NL80211_REKEY_DATA_INVALID,
@ -1533,6 +1535,8 @@ enum nl80211_ext_feature_index {
NL80211_EXT_FEATURE_FILS_CRYPTO_OFFLOAD,
NL80211_EXT_FEATURE_RADAR_BACKGROUND,
NL80211_EXT_FEATURE_POWERED_ADDR_CHANGE,
NL80211_EXT_FEATURE_PUNCT,
NL80211_EXT_FEATURE_SECURE_NAN,
NUM_NL80211_EXT_FEATURES,
MAX_NL80211_EXT_FEATURES = NUM_NL80211_EXT_FEATURES - 1
};

1
libc/kernel/uapi/linux/pci_regs.h
View file

@ -594,6 +594,7 @@
#define PCI_EXP_LNKCTL2_TX_MARGIN 0x0380
#define PCI_EXP_LNKCTL2_HASD 0x0020
#define PCI_EXP_LNKSTA2 0x32
#define PCI_EXP_LNKSTA2_FLIT 0x0400
#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 0x32
#define PCI_EXP_SLTCAP2 0x34
#define PCI_EXP_SLTCAP2_IBPD 0x00000001

2
libc/kernel/uapi/linux/perf_event.h
View file

@ -237,6 +237,7 @@ enum perf_event_read_format {
#define PERF_ATTR_SIZE_VER5 112
#define PERF_ATTR_SIZE_VER6 120
#define PERF_ATTR_SIZE_VER7 128
#define PERF_ATTR_SIZE_VER8 136
struct perf_event_attr {
__u32 type;
__u32 size;
@ -276,6 +277,7 @@ struct perf_event_attr {
__u32 aux_sample_size;
__u32 __reserved_3;
__u64 sig_data;
__u64 config3;
};
struct perf_event_query_bpf {
__u32 ids_len;

3
libc/kernel/uapi/linux/prctl.h
View file

@ -184,6 +184,9 @@ struct prctl_mm_map {
#define PR_SME_GET_VL 64
#define PR_SME_VL_LEN_MASK 0xffff
#define PR_SME_VL_INHERIT (1 << 17)
#define PR_SET_MDWE 65
#define PR_MDWE_REFUSE_EXEC_GAIN 1
#define PR_GET_MDWE 66
#define PR_SET_VMA 0x53564d41
#define PR_SET_VMA_ANON_NAME 0
#endif

4
libc/kernel/uapi/linux/rpl.h
View file

@ -34,8 +34,8 @@ struct ipv6_rpl_sr_hdr {
#error "Please fix <asm/byteorder.h>"
#endif
union {
struct in6_addr addr[0];
__u8 data[0];
__DECLARE_FLEX_ARRAY(struct in6_addr, addr);
__DECLARE_FLEX_ARRAY(__u8, data);
} segments;
} __attribute__((packed));
#define rpl_segaddr segments.addr

3
libc/kernel/uapi/linux/rseq.h
View file

@ -49,5 +49,8 @@ struct rseq {
__u32 cpu_id;
__u64 rseq_cs;
__u32 flags;
__u32 node_id;
__u32 mm_cid;
char end[];
} __attribute__((aligned(4 * sizeof(__u64))));
#endif

2
libc/kernel/uapi/linux/rtnetlink.h
View file

@ -463,6 +463,7 @@ enum {
TCA_INGRESS_BLOCK,
TCA_EGRESS_BLOCK,
TCA_DUMP_FLAGS,
TCA_EXT_WARN_MSG,
__TCA_MAX
};
#define TCA_MAX (__TCA_MAX - 1)
@ -589,6 +590,7 @@ enum {
TCA_ROOT_FLAGS,
TCA_ROOT_COUNT,
TCA_ROOT_TIME_DELTA,
TCA_ROOT_EXT_WARN_MSG,
__TCA_ROOT_MAX,
#define TCA_ROOT_MAX (__TCA_ROOT_MAX - 1)
};

1
libc/kernel/uapi/linux/sed-opal.h
View file

@ -122,6 +122,7 @@ struct opal_read_write_table {
#define OPAL_FL_LOCKED 0x00000008
#define OPAL_FL_MBR_ENABLED 0x00000010
#define OPAL_FL_MBR_DONE 0x00000020
#define OPAL_FL_SUM_SUPPORTED 0x00000040
struct opal_status {
__u32 flags;
__u32 reserved;

1
libc/kernel/uapi/linux/serial_core.h
View file

@ -99,6 +99,7 @@
#define PORT_VT8500 97
#define PORT_XUARTPS 98
#define PORT_AR933X 99
#define PORT_MCHP16550A 100
#define PORT_ARC 101
#define PORT_RP2 102
#define PORT_LPUART 103

5
libc/kernel/uapi/linux/serial_reg.h
View file

@ -37,6 +37,11 @@
#define UART_IIR_RX_TIMEOUT 0x0c
#define UART_IIR_XOFF 0x10
#define UART_IIR_CTS_RTS_DSR 0x20
#define UART_IIR_64BYTE_FIFO 0x20
#define UART_IIR_FIFO_ENABLED 0xc0
#define UART_IIR_FIFO_ENABLED_8250 0x00
#define UART_IIR_FIFO_ENABLED_16550 0x80
#define UART_IIR_FIFO_ENABLED_16550A 0xc0
#define UART_FCR 2
#define UART_FCR_ENABLE_FIFO 0x01
#define UART_FCR_CLEAR_RCVR 0x02

3
libc/kernel/uapi/linux/snmp.h
View file

@ -87,6 +87,8 @@ enum {
ICMP_MIB_OUTADDRMASKS,
ICMP_MIB_OUTADDRMASKREPS,
ICMP_MIB_CSUMERRORS,
ICMP_MIB_RATELIMITGLOBAL,
ICMP_MIB_RATELIMITHOST,
__ICMP_MIB_MAX
};
#define __ICMPMSG_MIB_MAX 512
@ -97,6 +99,7 @@ enum {
ICMP6_MIB_OUTMSGS,
ICMP6_MIB_OUTERRORS,
ICMP6_MIB_CSUMERRORS,
ICMP6_MIB_RATELIMITHOST,
__ICMP6_MIB_MAX
};
#define __ICMP6MSG_MIB_MAX 512

18
libc/kernel/uapi/linux/ublk_cmd.h
View file

@ -29,6 +29,7 @@
#define UBLK_CMD_GET_PARAMS 0x09
#define UBLK_CMD_START_USER_RECOVERY 0x10
#define UBLK_CMD_END_USER_RECOVERY 0x11
#define UBLK_CMD_GET_DEV_INFO2 0x12
#define UBLK_IO_FETCH_REQ 0x20
#define UBLK_IO_COMMIT_AND_FETCH_REQ 0x21
#define UBLK_IO_NEED_GET_DATA 0x22
@ -43,6 +44,7 @@
#define UBLK_F_NEED_GET_DATA (1UL << 2)
#define UBLK_F_USER_RECOVERY (1UL << 3)
#define UBLK_F_USER_RECOVERY_REISSUE (1UL << 4)
#define UBLK_F_UNPRIVILEGED_DEV (1UL << 5)
#define UBLK_S_DEV_DEAD 0
#define UBLK_S_DEV_LIVE 1
#define UBLK_S_DEV_QUIESCED 2
@ -51,7 +53,10 @@ struct ublksrv_ctrl_cmd {
__u16 queue_id;
__u16 len;
__u64 addr;
__u64 data[2];
__u64 data[1];
__u16 dev_path_len;
__u16 pad;
__u32 reserved;
};
struct ublksrv_ctrl_dev_info {
__u16 nr_hw_queues;
@ -64,7 +69,8 @@ struct ublksrv_ctrl_dev_info {
__u32 pad1;
__u64 flags;
__u64 ublksrv_flags;
__u64 reserved0;
__u32 owner_uid;
__u32 owner_gid;
__u64 reserved1;
__u64 reserved2;
};
@ -116,12 +122,20 @@ struct ublk_param_discard {
__u16 max_discard_segments;
__u16 reserved0;
};
struct ublk_param_devt {
__u32 char_major;
__u32 char_minor;
__u32 disk_major;
__u32 disk_minor;
};
struct ublk_params {
__u32 len;
#define UBLK_PARAM_TYPE_BASIC (1 << 0)
#define UBLK_PARAM_TYPE_DISCARD (1 << 1)
#define UBLK_PARAM_TYPE_DEVT (1 << 2)
__u32 types;
struct ublk_param_basic basic;
struct ublk_param_discard discard;
struct ublk_param_devt devt;
};
#endif

10
libc/kernel/uapi/linux/usb/ch9.h
View file

@ -417,6 +417,16 @@ struct usb_ss_container_id_descriptor {
__u8 ContainerID[16];
} __attribute__((packed));
#define USB_DT_USB_SS_CONTN_ID_SIZE 20
#define USB_PLAT_DEV_CAP_TYPE 5
struct usb_plat_dev_cap_descriptor {
__u8 bLength;
__u8 bDescriptorType;
__u8 bDevCapabilityType;
__u8 bReserved;
__u8 UUID[16];
__u8 CapabilityData[];
} __attribute__((packed));
#define USB_DT_USB_PLAT_DEV_CAP_SIZE(capability_data_size) (20 + capability_data_size)
#define USB_SSP_CAP_TYPE 0xa
struct usb_ssp_cap_descriptor {
__u8 bLength;

26
libc/kernel/uapi/linux/usb/video.h
View file

@ -139,6 +139,32 @@
#define UVC_CONTROL_CAP_DISABLED (1 << 2)
#define UVC_CONTROL_CAP_AUTOUPDATE (1 << 3)
#define UVC_CONTROL_CAP_ASYNCHRONOUS (1 << 4)
enum uvc_color_primaries_values {
UVC_COLOR_PRIMARIES_UNSPECIFIED,
UVC_COLOR_PRIMARIES_BT_709_SRGB,
UVC_COLOR_PRIMARIES_BT_470_2_M,
UVC_COLOR_PRIMARIES_BT_470_2_B_G,
UVC_COLOR_PRIMARIES_SMPTE_170M,
UVC_COLOR_PRIMARIES_SMPTE_240M,
};
enum uvc_transfer_characteristics_values {
UVC_TRANSFER_CHARACTERISTICS_UNSPECIFIED,
UVC_TRANSFER_CHARACTERISTICS_BT_709,
UVC_TRANSFER_CHARACTERISTICS_BT_470_2_M,
UVC_TRANSFER_CHARACTERISTICS_BT_470_2_B_G,
UVC_TRANSFER_CHARACTERISTICS_SMPTE_170M,
UVC_TRANSFER_CHARACTERISTICS_SMPTE_240M,
UVC_TRANSFER_CHARACTERISTICS_LINEAR,
UVC_TRANSFER_CHARACTERISTICS_SRGB,
};
enum uvc_matrix_coefficients {
UVC_MATRIX_COEFFICIENTS_UNSPECIFIED,
UVC_MATRIX_COEFFICIENTS_BT_709,
UVC_MATRIX_COEFFICIENTS_FCC,
UVC_MATRIX_COEFFICIENTS_BT_470_2_B_G,
UVC_MATRIX_COEFFICIENTS_SMPTE_170M,
UVC_MATRIX_COEFFICIENTS_SMPTE_240M,
};
struct uvc_descriptor_header {
__u8 bLength;
__u8 bDescriptorType;

8
libc/kernel/uapi/linux/uuid.h
View file

@ -21,11 +21,9 @@
#include <linux/types.h>
typedef struct {
__u8 b[16];
} guid_t;
#define GUID_INIT(a,b,c,d0,d1,d2,d3,d4,d5,d6,d7) \
((guid_t) \
} uuid_le;
#define UUID_LE(a,b,c,d0,d1,d2,d3,d4,d5,d6,d7) \
((uuid_le) \
{ { (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, (b) & 0xff, ((b) >> 8) & 0xff, (c) & 0xff, ((c) >> 8) & 0xff, (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) } })
typedef guid_t uuid_le;
#define UUID_LE(a,b,c,d0,d1,d2,d3,d4,d5,d6,d7) GUID_INIT(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7)
#define NULL_UUID_LE UUID_LE(0x00000000, 0x0000, 0x0000, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00)
#endif

3
libc/kernel/uapi/linux/uvcvideo.h
View file

@ -36,9 +36,10 @@
#define UVC_CTRL_FLAG_AUTO_UPDATE (1 << 7)
#define UVC_CTRL_FLAG_ASYNCHRONOUS (1 << 8)
#define UVC_CTRL_FLAG_GET_RANGE (UVC_CTRL_FLAG_GET_CUR | UVC_CTRL_FLAG_GET_MIN | UVC_CTRL_FLAG_GET_MAX | UVC_CTRL_FLAG_GET_RES | UVC_CTRL_FLAG_GET_DEF)
#define UVC_MENU_NAME_LEN 32
struct uvc_menu_info {
__u32 value;
__u8 name[32];
__u8 name[UVC_MENU_NAME_LEN];
};
struct uvc_xu_control_mapping {
__u32 id;

40
libc/kernel/uapi/linux/v4l2-subdev.h
View file

@ -18,6 +18,7 @@
****************************************************************************/
#ifndef __LINUX_V4L2_SUBDEV_H
#define __LINUX_V4L2_SUBDEV_H
#include <linux/const.h>
#include <linux/ioctl.h>
#include <linux/types.h>
#include <linux/v4l2-common.h>
@ -30,13 +31,15 @@ struct v4l2_subdev_format {
__u32 which;
__u32 pad;
struct v4l2_mbus_framefmt format;
__u32 reserved[8];
__u32 stream;
__u32 reserved[7];
};
struct v4l2_subdev_crop {
__u32 which;
__u32 pad;
struct v4l2_rect rect;
__u32 reserved[8];
__u32 stream;
__u32 reserved[7];
};
#define V4L2_SUBDEV_MBUS_CODE_CSC_COLORSPACE 0x00000001
#define V4L2_SUBDEV_MBUS_CODE_CSC_XFER_FUNC 0x00000002
@ -49,7 +52,8 @@ struct v4l2_subdev_mbus_code_enum {
__u32 code;
__u32 which;
__u32 flags;
__u32 reserved[7];
__u32 stream;
__u32 reserved[6];
};
struct v4l2_subdev_frame_size_enum {
__u32 index;
@ -60,12 +64,14 @@ struct v4l2_subdev_frame_size_enum {
__u32 min_height;
__u32 max_height;
__u32 which;
__u32 reserved[8];
__u32 stream;
__u32 reserved[7];
};
struct v4l2_subdev_frame_interval {
__u32 pad;
struct v4l2_fract interval;
__u32 reserved[9];
__u32 stream;
__u32 reserved[8];
};
struct v4l2_subdev_frame_interval_enum {
__u32 index;
@ -75,7 +81,8 @@ struct v4l2_subdev_frame_interval_enum {
__u32 height;
struct v4l2_fract interval;
__u32 which;
__u32 reserved[8];
__u32 stream;
__u32 reserved[7];
};
struct v4l2_subdev_selection {
__u32 which;
@ -83,7 +90,8 @@ struct v4l2_subdev_selection {
__u32 target;
__u32 flags;
struct v4l2_rect r;
__u32 reserved[8];
__u32 stream;
__u32 reserved[7];
};
struct v4l2_subdev_capability {
__u32 version;
@ -91,6 +99,22 @@ struct v4l2_subdev_capability {
__u32 reserved[14];
};
#define V4L2_SUBDEV_CAP_RO_SUBDEV 0x00000001
#define V4L2_SUBDEV_CAP_STREAMS 0x00000002
#define V4L2_SUBDEV_ROUTE_FL_ACTIVE (1U << 0)
struct v4l2_subdev_route {
__u32 sink_pad;
__u32 sink_stream;
__u32 source_pad;
__u32 source_stream;
__u32 flags;
__u32 reserved[5];
};
struct v4l2_subdev_routing {
__u32 which;
__u32 num_routes;
__u64 routes;
__u32 reserved[6];
};
#define v4l2_subdev_edid v4l2_edid
#define VIDIOC_SUBDEV_QUERYCAP _IOR('V', 0, struct v4l2_subdev_capability)
#define VIDIOC_SUBDEV_G_FMT _IOWR('V', 4, struct v4l2_subdev_format)
@ -104,6 +128,8 @@ struct v4l2_subdev_capability {
#define VIDIOC_SUBDEV_S_CROP _IOWR('V', 60, struct v4l2_subdev_crop)
#define VIDIOC_SUBDEV_G_SELECTION _IOWR('V', 61, struct v4l2_subdev_selection)
#define VIDIOC_SUBDEV_S_SELECTION _IOWR('V', 62, struct v4l2_subdev_selection)
#define VIDIOC_SUBDEV_G_ROUTING _IOWR('V', 38, struct v4l2_subdev_routing)
#define VIDIOC_SUBDEV_S_ROUTING _IOWR('V', 39, struct v4l2_subdev_routing)
#define VIDIOC_SUBDEV_G_STD _IOR('V', 23, v4l2_std_id)
#define VIDIOC_SUBDEV_S_STD _IOW('V', 24, v4l2_std_id)
#define VIDIOC_SUBDEV_ENUMSTD _IOWR('V', 25, struct v4l2_standard)

4
libc/kernel/uapi/linux/version.h
View file

@ -16,8 +16,8 @@
***
****************************************************************************
****************************************************************************/
#define LINUX_VERSION_CODE 393728
#define LINUX_VERSION_CODE 393984
#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + ((c) > 255 ? 255 : (c)))
#define LINUX_VERSION_MAJOR 6
#define LINUX_VERSION_PATCHLEVEL 2
#define LINUX_VERSION_PATCHLEVEL 3
#define LINUX_VERSION_SUBLEVEL 0

1
libc/kernel/uapi/linux/vhost.h
View file

@ -69,4 +69,5 @@
#define VHOST_VDPA_GET_VRING_GROUP _IOWR(VHOST_VIRTIO, 0x7B, struct vhost_vring_state)
#define VHOST_VDPA_SET_GROUP_ASID _IOW(VHOST_VIRTIO, 0x7C, struct vhost_vring_state)
#define VHOST_VDPA_SUSPEND _IO(VHOST_VIRTIO, 0x7D)
#define VHOST_VDPA_RESUME _IO(VHOST_VIRTIO, 0x7E)
#endif

1
libc/kernel/uapi/linux/vhost_types.h
View file

@ -106,4 +106,5 @@ struct vhost_vdpa_iova_range {
#define VHOST_BACKEND_F_IOTLB_BATCH 0x2
#define VHOST_BACKEND_F_IOTLB_ASID 0x3
#define VHOST_BACKEND_F_SUSPEND 0x4
#define VHOST_BACKEND_F_RESUME 0x5
#endif

6
libc/kernel/uapi/linux/videodev2.h
View file

@ -244,6 +244,9 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_RGBX32 v4l2_fourcc('X', 'B', '2', '4')
#define V4L2_PIX_FMT_ARGB32 v4l2_fourcc('B', 'A', '2', '4')
#define V4L2_PIX_FMT_XRGB32 v4l2_fourcc('B', 'X', '2', '4')
#define V4L2_PIX_FMT_RGBX1010102 v4l2_fourcc('R', 'X', '3', '0')
#define V4L2_PIX_FMT_RGBA1010102 v4l2_fourcc('R', 'A', '3', '0')
#define V4L2_PIX_FMT_ARGB2101010 v4l2_fourcc('A', 'R', '3', '0')
#define V4L2_PIX_FMT_GREY v4l2_fourcc('G', 'R', 'E', 'Y')
#define V4L2_PIX_FMT_Y4 v4l2_fourcc('Y', '0', '4', ' ')
#define V4L2_PIX_FMT_Y6 v4l2_fourcc('Y', '0', '6', ' ')
@ -275,6 +278,9 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_YUVA32 v4l2_fourcc('Y', 'U', 'V', 'A')
#define V4L2_PIX_FMT_YUVX32 v4l2_fourcc('Y', 'U', 'V', 'X')
#define V4L2_PIX_FMT_M420 v4l2_fourcc('M', '4', '2', '0')
#define V4L2_PIX_FMT_Y210 v4l2_fourcc('Y', '2', '1', '0')
#define V4L2_PIX_FMT_Y212 v4l2_fourcc('Y', '2', '1', '2')
#define V4L2_PIX_FMT_Y216 v4l2_fourcc('Y', '2', '1', '6')
#define V4L2_PIX_FMT_NV12 v4l2_fourcc('N', 'V', '1', '2')
#define V4L2_PIX_FMT_NV21 v4l2_fourcc('N', 'V', '2', '1')
#define V4L2_PIX_FMT_NV16 v4l2_fourcc('N', 'V', '1', '6')

48
libc/kernel/uapi/linux/virtio_blk.h
View file

@ -32,6 +32,7 @@
#define VIRTIO_BLK_F_DISCARD 13
#define VIRTIO_BLK_F_WRITE_ZEROES 14
#define VIRTIO_BLK_F_SECURE_ERASE 16
#define VIRTIO_BLK_F_ZONED 17
#ifndef VIRTIO_BLK_NO_LEGACY
#define VIRTIO_BLK_F_BARRIER 0
#define VIRTIO_BLK_F_SCSI 7
@ -67,6 +68,15 @@ struct virtio_blk_config {
__virtio32 max_secure_erase_sectors;
__virtio32 max_secure_erase_seg;
__virtio32 secure_erase_sector_alignment;
struct virtio_blk_zoned_characteristics {
__virtio32 zone_sectors;
__virtio32 max_open_zones;
__virtio32 max_active_zones;
__virtio32 max_append_sectors;
__virtio32 write_granularity;
__u8 model;
__u8 unused2[3];
} zoned;
} __attribute__((packed));
#define VIRTIO_BLK_T_IN 0
#define VIRTIO_BLK_T_OUT 1
@ -78,6 +88,13 @@ struct virtio_blk_config {
#define VIRTIO_BLK_T_DISCARD 11
#define VIRTIO_BLK_T_WRITE_ZEROES 13
#define VIRTIO_BLK_T_SECURE_ERASE 14
#define VIRTIO_BLK_T_ZONE_APPEND 15
#define VIRTIO_BLK_T_ZONE_REPORT 16
#define VIRTIO_BLK_T_ZONE_OPEN 18
#define VIRTIO_BLK_T_ZONE_CLOSE 20
#define VIRTIO_BLK_T_ZONE_FINISH 22
#define VIRTIO_BLK_T_ZONE_RESET 24
#define VIRTIO_BLK_T_ZONE_RESET_ALL 26
#ifndef VIRTIO_BLK_NO_LEGACY
#define VIRTIO_BLK_T_BARRIER 0x80000000
#endif
@ -86,6 +103,33 @@ struct virtio_blk_outhdr {
__virtio32 ioprio;
__virtio64 sector;
};
#define VIRTIO_BLK_Z_NONE 0
#define VIRTIO_BLK_Z_HM 1
#define VIRTIO_BLK_Z_HA 2
struct virtio_blk_zone_descriptor {
__virtio64 z_cap;
__virtio64 z_start;
__virtio64 z_wp;
__u8 z_type;
__u8 z_state;
__u8 reserved[38];
};
struct virtio_blk_zone_report {
__virtio64 nr_zones;
__u8 reserved[56];
struct virtio_blk_zone_descriptor zones[];
};
#define VIRTIO_BLK_ZT_CONV 1
#define VIRTIO_BLK_ZT_SWR 2
#define VIRTIO_BLK_ZT_SWP 3
#define VIRTIO_BLK_ZS_NOT_WP 0
#define VIRTIO_BLK_ZS_EMPTY 1
#define VIRTIO_BLK_ZS_IOPEN 2
#define VIRTIO_BLK_ZS_EOPEN 3
#define VIRTIO_BLK_ZS_CLOSED 4
#define VIRTIO_BLK_ZS_RDONLY 13
#define VIRTIO_BLK_ZS_FULL 14
#define VIRTIO_BLK_ZS_OFFLINE 15
#define VIRTIO_BLK_WRITE_ZEROES_FLAG_UNMAP 0x00000001
struct virtio_blk_discard_write_zeroes {
__le64 sector;
@ -103,4 +147,8 @@ struct virtio_scsi_inhdr {
#define VIRTIO_BLK_S_OK 0
#define VIRTIO_BLK_S_IOERR 1
#define VIRTIO_BLK_S_UNSUPP 2
#define VIRTIO_BLK_S_ZONE_INVALID_CMD 3
#define VIRTIO_BLK_S_ZONE_UNALIGNED_WP 4
#define VIRTIO_BLK_S_ZONE_OPEN_RESOURCE 5
#define VIRTIO_BLK_S_ZONE_ACTIVE_RESOURCE 6
#endif

4
libc/kernel/uapi/rdma/hns-abi.h
View file

@ -62,9 +62,13 @@ struct hns_roce_ib_create_qp_resp {
};
enum {
HNS_ROCE_EXSGE_FLAGS = 1 << 0,
HNS_ROCE_RQ_INLINE_FLAGS = 1 << 1,
HNS_ROCE_CQE_INLINE_FLAGS = 1 << 2,
};
enum {
HNS_ROCE_RSP_EXSGE_FLAGS = 1 << 0,
HNS_ROCE_RSP_RQ_INLINE_FLAGS = 1 << 1,
HNS_ROCE_RSP_CQE_INLINE_FLAGS = 1 << 2,
};
struct hns_roce_ib_alloc_ucontext_resp {
__u32 qp_tab_size;

2
libc/kernel/uapi/scsi/scsi_bsg_fc.h
View file

@ -69,7 +69,7 @@ struct fc_bsg_host_vendor {
__u32 vendor_cmd[];
};
struct fc_bsg_host_vendor_reply {
__u32 vendor_rsp[0];
__DECLARE_FLEX_ARRAY(__u32, vendor_rsp);
};
struct fc_bsg_rport_els {
__u8 els_code;

5
libc/kernel/uapi/scsi/scsi_bsg_mpi3mr.h
View file

@ -220,9 +220,6 @@ struct mpi3mr_bsg_packet {
struct mpi3mr_bsg_mptcmd mptcmd;
} cmd;
};
#ifndef MPI3_NVME_ENCAP_CMD_MAX
#define MPI3_NVME_ENCAP_CMD_MAX (1)
#endif
struct mpi3_nvme_encapsulated_request {
__le16 host_tag;
__u8 ioc_use_only02;
@ -236,7 +233,7 @@ struct mpi3_nvme_encapsulated_request {
__le16 flags;
__le32 data_length;
__le32 reserved14[3];
__le32 command[MPI3_NVME_ENCAP_CMD_MAX];
__le32 command[];
};
struct mpi3_nvme_encapsulated_error_reply {
__le16 host_tag;

41
libc/kernel/uapi/scsi/scsi_bsg_ufs.h
View file

@ -20,8 +20,22 @@
#define SCSI_BSG_UFS_H
#include <linux/types.h>
#define UFS_CDB_SIZE 16
#define UPIU_TRANSACTION_UIC_CMD 0x1F
#define UIC_CMD_SIZE (sizeof(__u32) * 4)
enum ufs_bsg_msg_code {
UPIU_TRANSACTION_UIC_CMD = 0x1F,
UPIU_TRANSACTION_ARPMB_CMD,
};
enum ufs_rpmb_op_type {
UFS_RPMB_WRITE_KEY = 0x01,
UFS_RPMB_READ_CNT = 0x02,
UFS_RPMB_WRITE = 0x03,
UFS_RPMB_READ = 0x04,
UFS_RPMB_READ_RESP = 0x05,
UFS_RPMB_SEC_CONF_WRITE = 0x06,
UFS_RPMB_SEC_CONF_READ = 0x07,
UFS_RPMB_PURGE_ENABLE = 0x08,
UFS_RPMB_PURGE_STATUS_READ = 0x09,
};
struct utp_upiu_header {
__be32 dword_0;
__be32 dword_1;
@ -49,13 +63,36 @@ struct utp_upiu_req {
struct utp_upiu_query uc;
};
};
struct ufs_arpmb_meta {
__be16 req_resp_type;
__u8 nonce[16];
__be32 write_counter;
__be16 addr_lun;
__be16 block_count;
__be16 result;
} __attribute__((__packed__));
struct ufs_ehs {
__u8 length;
__u8 ehs_type;
__be16 ehssub_type;
struct ufs_arpmb_meta meta;
__u8 mac_key[32];
} __attribute__((__packed__));
struct ufs_bsg_request {
__u32 msgcode;
struct utp_upiu_req upiu_req;
};
struct ufs_bsg_reply {
__u32 result;
int result;
__u32 reply_payload_rcv_len;
struct utp_upiu_req upiu_rsp;
};
struct ufs_rpmb_request {
struct ufs_bsg_request bsg_request;
struct ufs_ehs ehs_req;
};
struct ufs_rpmb_reply {
struct ufs_bsg_reply bsg_reply;
struct ufs_ehs ehs_rsp;
};
#endif

10
libc/kernel/uapi/sound/firewire.h
View file

@ -27,6 +27,7 @@
#define SNDRV_FIREWIRE_EVENT_MOTU_NOTIFICATION 0x64776479
#define SNDRV_FIREWIRE_EVENT_TASCAM_CONTROL 0x7473636d
#define SNDRV_FIREWIRE_EVENT_MOTU_REGISTER_DSP_CHANGE 0x4d545244
#define SNDRV_FIREWIRE_EVENT_FF400_MESSAGE 0x4f6c6761
struct snd_firewire_event_common {
unsigned int type;
};
@ -74,6 +75,14 @@ struct snd_firewire_event_motu_register_dsp_change {
__u32 count;
__u32 changes[];
};
struct snd_firewire_event_ff400_message {
unsigned int type;
unsigned int message_count;
struct {
__u32 message;
__u32 tstamp;
} messages[];
};
union snd_firewire_event {
struct snd_firewire_event_common common;
struct snd_firewire_event_lock_status lock_status;
@ -83,6 +92,7 @@ union snd_firewire_event {
struct snd_firewire_event_tascam_control tascam_control;
struct snd_firewire_event_motu_notification motu_notification;
struct snd_firewire_event_motu_register_dsp_change motu_register_dsp_change;
struct snd_firewire_event_ff400_message ff400_message;
};
#define SNDRV_FIREWIRE_IOCTL_GET_INFO _IOR('H', 0xf8, struct snd_firewire_get_info)
#define SNDRV_FIREWIRE_IOCTL_LOCK _IO('H', 0xf9)

2
libc/kernel/uapi/sound/intel/avs/tokens.h
View file

@ -100,6 +100,7 @@ enum avs_tplg_token {
AVS_TKN_MOD_CORE_ID_U8 = 1704,
AVS_TKN_MOD_PROC_DOMAIN_U8 = 1705,
AVS_TKN_MOD_MODCFG_EXT_ID_U32 = 1706,
AVS_TKN_MOD_KCONTROL_ID_U32 = 1707,
AVS_TKN_PATH_TMPL_ID_U32 = 1801,
AVS_TKN_PATH_ID_U32 = 1901,
AVS_TKN_PATH_FE_FMT_ID_U32 = 1902,
@ -107,5 +108,6 @@ enum avs_tplg_token {
AVS_TKN_PIN_FMT_INDEX_U32 = 2201,
AVS_TKN_PIN_FMT_IOBS_U32 = 2202,
AVS_TKN_PIN_FMT_AFMT_ID_U32 = 2203,
AVS_TKN_KCONTROL_ID_U32 = 2301,
};
#endif