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[MIPSR6] Use C-coded string ops on mips32r6/mips64r6

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The existing assembler code uses deprecated lwl/lwr/swl/swr ops.
Replacing those with misalignment-forgiving lw/sw ops may
involve careful performance tuning.

Change-Id: I47a042f7b22b87d7d52e46c29c44b1db1ba8b693
This commit is contained in:
Duane Sand 2014-07-10 15:24:27 -07:00
parent 4d421901e5
commit bc5a3ec6df
1 changed files with 11 additions and 0 deletions
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11
libc/arch-mips/mips.mk
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@ -64,10 +64,21 @@ libc_bionic_src_files_mips += \
arch-mips/bionic/setjmp.S \
arch-mips/bionic/sigsetjmp.S \
arch-mips/bionic/syscall.S \
ifndef ARCH_MIPS_REV6
libc_bionic_src_files_mips += \
arch-mips/string/memcpy.S \
arch-mips/string/memset.S \
arch-mips/string/mips_strlen.c \
else
libc_bionic_src_files_mips += \
bionic/memcpy.cpp \
bionic/memset.c
libc_common_src_files_mips += \
upstream-openbsd/lib/libc/string/strlen.c
endif
libc_netbsd_src_files_mips := \
upstream-netbsd/common/lib/libc/hash/sha1/sha1.c \