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Merge "Update to v5.17 kernel headers." am: 9263a823ea

Browse source 
Original change: https://android-review.googlesource.com/c/platform/bionic/+/2037786

Change-Id: Ie3d253811d84ee1c87557bceb5ad8164e0576a2c
This commit is contained in:
Christopher Ferris 2022-03-23 18:52:13 +00:00 committed by Automerger Merge Worker
commit ceed1d8ec0
53 changed files with 1324 additions and 92 deletions
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3
libc/include/bits/glibc-syscalls.h
View file

@ -1023,6 +1023,9 @@
#if defined(__NR_set_mempolicy)
#define SYS_set_mempolicy __NR_set_mempolicy
#endif
#if defined(__NR_set_mempolicy_home_node)
#define SYS_set_mempolicy_home_node __NR_set_mempolicy_home_node
#endif
#if defined(__NR_set_robust_list)
#define SYS_set_robust_list __NR_set_robust_list
#endif

1
libc/kernel/uapi/asm-arm/asm/unistd-eabi.h
View file

@ -420,4 +420,5 @@
#define __NR_landlock_restrict_self (__NR_SYSCALL_BASE + 446)
#define __NR_process_mrelease (__NR_SYSCALL_BASE + 448)
#define __NR_futex_waitv (__NR_SYSCALL_BASE + 449)
#define __NR_set_mempolicy_home_node (__NR_SYSCALL_BASE + 450)
#endif

1
libc/kernel/uapi/asm-arm/asm/unistd-oabi.h
View file

@ -432,4 +432,5 @@
#define __NR_landlock_restrict_self (__NR_SYSCALL_BASE + 446)
#define __NR_process_mrelease (__NR_SYSCALL_BASE + 448)
#define __NR_futex_waitv (__NR_SYSCALL_BASE + 449)
#define __NR_set_mempolicy_home_node (__NR_SYSCALL_BASE + 450)
#endif

2
libc/kernel/uapi/asm-arm64/asm/hwcap.h
View file

@ -70,4 +70,6 @@
#define HWCAP2_BTI (1 << 17)
#define HWCAP2_MTE (1 << 18)
#define HWCAP2_ECV (1 << 19)
#define HWCAP2_AFP (1 << 20)
#define HWCAP2_RPRES (1 << 21)
#endif

4
libc/kernel/uapi/asm-arm64/asm/kvm.h
View file

@ -167,6 +167,10 @@ struct kvm_arm_copy_mte_tags {
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL 2
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED 3
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED (1U << 4)
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3 KVM_REG_ARM_FW_REG(3)
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL 0
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_AVAIL 1
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_REQUIRED 2
#define KVM_REG_ARM64_SVE (0x15 << KVM_REG_ARM_COPROC_SHIFT)
#define KVM_REG_ARM64_SVE_ZREG_BASE 0
#define KVM_REG_ARM64_SVE_PREG_BASE 0x400

3
libc/kernel/uapi/asm-generic/unistd.h
View file

@ -412,8 +412,9 @@
#endif
#define __NR_process_mrelease 448
#define __NR_futex_waitv 449
#define __NR_set_mempolicy_home_node 450
#undef __NR_syscalls
#define __NR_syscalls 450
#define __NR_syscalls 451
#if __BITS_PER_LONG == 64 && !defined(__SYSCALL_COMPAT)
#define __NR_fcntl __NR3264_fcntl
#define __NR_statfs __NR3264_statfs

2
libc/kernel/uapi/asm-x86/asm/kvm.h
View file

@ -322,6 +322,7 @@ struct kvm_debugregs {
};
struct kvm_xsave {
__u32 region[1024];
__u32 extra[0];
};
#define KVM_MAX_XCRS 16
struct kvm_xcr {
@ -361,6 +362,7 @@ struct kvm_sync_regs {
#define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000
#define KVM_STATE_NESTED_SVM_VMCB_SIZE 0x1000
#define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001
#define KVM_X86_XCOMP_GUEST_SUPP 0
struct kvm_vmx_nested_state_data {
__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
__u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];

2
libc/kernel/uapi/asm-x86/asm/prctl.h
View file

@ -27,6 +27,8 @@
#define ARCH_GET_XCOMP_SUPP 0x1021
#define ARCH_GET_XCOMP_PERM 0x1022
#define ARCH_REQ_XCOMP_PERM 0x1023
#define ARCH_GET_XCOMP_GUEST_PERM 0x1024
#define ARCH_REQ_XCOMP_GUEST_PERM 0x1025
#define ARCH_MAP_VDSO_X32 0x2001
#define ARCH_MAP_VDSO_32 0x2002
#define ARCH_MAP_VDSO_64 0x2003

1
libc/kernel/uapi/asm-x86/asm/unistd_32.h
View file

@ -457,4 +457,5 @@
#define __NR_memfd_secret 447
#define __NR_process_mrelease 448
#define __NR_futex_waitv 449
#define __NR_set_mempolicy_home_node 450
#endif

1
libc/kernel/uapi/asm-x86/asm/unistd_64.h
View file

@ -379,4 +379,5 @@
#define __NR_memfd_secret 447
#define __NR_process_mrelease 448
#define __NR_futex_waitv 449
#define __NR_set_mempolicy_home_node 450
#endif

1
libc/kernel/uapi/asm-x86/asm/unistd_x32.h
View file

@ -332,6 +332,7 @@
#define __NR_memfd_secret (__X32_SYSCALL_BIT + 447)
#define __NR_process_mrelease (__X32_SYSCALL_BIT + 448)
#define __NR_futex_waitv (__X32_SYSCALL_BIT + 449)
#define __NR_set_mempolicy_home_node (__X32_SYSCALL_BIT + 450)
#define __NR_rt_sigaction (__X32_SYSCALL_BIT + 512)
#define __NR_rt_sigreturn (__X32_SYSCALL_BIT + 513)
#define __NR_ioctl (__X32_SYSCALL_BIT + 514)

1
libc/kernel/uapi/drm/drm_fourcc.h
View file

@ -123,6 +123,7 @@ extern "C" {
#define DRM_FORMAT_P010 fourcc_code('P', '0', '1', '0')
#define DRM_FORMAT_P012 fourcc_code('P', '0', '1', '2')
#define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6')
#define DRM_FORMAT_P030 fourcc_code('P', '0', '3', '0')
#define DRM_FORMAT_Q410 fourcc_code('Q', '4', '1', '0')
#define DRM_FORMAT_Q401 fourcc_code('Q', '4', '0', '1')
#define DRM_FORMAT_YUV410 fourcc_code('Y', 'U', 'V', '9')

1
libc/kernel/uapi/drm/vmwgfx_drm.h
View file

@ -75,6 +75,7 @@ extern "C" {
#define DRM_VMW_PARAM_HW_CAPS2 13
#define DRM_VMW_PARAM_SM4_1 14
#define DRM_VMW_PARAM_SM5 15
#define DRM_VMW_PARAM_GL43 16
enum drm_vmw_handle_type {
DRM_VMW_HANDLE_LEGACY = 0,
DRM_VMW_HANDLE_PRIME = 1

2
libc/kernel/uapi/linux/audit.h
View file

@ -377,6 +377,6 @@ struct audit_rule_data {
__u32 values[AUDIT_MAX_FIELDS];
__u32 fieldflags[AUDIT_MAX_FIELDS];
__u32 buflen;
char buf[0];
char buf[];
};
#endif

27
libc/kernel/uapi/linux/bpf.h
View file

@ -360,8 +360,10 @@ union bpf_attr {
__u32 attach_prog_fd;
__u32 attach_btf_obj_fd;
};
__u32 : 32;
__u32 core_relo_cnt;
__aligned_u64 fd_array;
__aligned_u64 core_relos;
__u32 core_relo_rec_size;
};
struct {
__aligned_u64 pathname;
@ -478,7 +480,7 @@ union bpf_attr {
__u32 flags;
} prog_bind_map;
} __attribute__((aligned(8)));
#define __BPF_FUNC_MAPPER(FN) FN(unspec), FN(map_lookup_elem), FN(map_update_elem), FN(map_delete_elem), FN(probe_read), FN(ktime_get_ns), FN(trace_printk), FN(get_prandom_u32), FN(get_smp_processor_id), FN(skb_store_bytes), FN(l3_csum_replace), FN(l4_csum_replace), FN(tail_call), FN(clone_redirect), FN(get_current_pid_tgid), FN(get_current_uid_gid), FN(get_current_comm), FN(get_cgroup_classid), FN(skb_vlan_push), FN(skb_vlan_pop), FN(skb_get_tunnel_key), FN(skb_set_tunnel_key), FN(perf_event_read), FN(redirect), FN(get_route_realm), FN(perf_event_output), FN(skb_load_bytes), FN(get_stackid), FN(csum_diff), FN(skb_get_tunnel_opt), FN(skb_set_tunnel_opt), FN(skb_change_proto), FN(skb_change_type), FN(skb_under_cgroup), FN(get_hash_recalc), FN(get_current_task), FN(probe_write_user), FN(current_task_under_cgroup), FN(skb_change_tail), FN(skb_pull_data), FN(csum_update), FN(set_hash_invalid), FN(get_numa_node_id), FN(skb_change_head), FN(xdp_adjust_head), FN(probe_read_str), FN(get_socket_cookie), FN(get_socket_uid), FN(set_hash), FN(setsockopt), FN(skb_adjust_room), FN(redirect_map), FN(sk_redirect_map), FN(sock_map_update), FN(xdp_adjust_meta), FN(perf_event_read_value), FN(perf_prog_read_value), FN(getsockopt), FN(override_return), FN(sock_ops_cb_flags_set), FN(msg_redirect_map), FN(msg_apply_bytes), FN(msg_cork_bytes), FN(msg_pull_data), FN(bind), FN(xdp_adjust_tail), FN(skb_get_xfrm_state), FN(get_stack), FN(skb_load_bytes_relative), FN(fib_lookup), FN(sock_hash_update), FN(msg_redirect_hash), FN(sk_redirect_hash), FN(lwt_push_encap), FN(lwt_seg6_store_bytes), FN(lwt_seg6_adjust_srh), FN(lwt_seg6_action), FN(rc_repeat), FN(rc_keydown), FN(skb_cgroup_id), FN(get_current_cgroup_id), FN(get_local_storage), FN(sk_select_reuseport), FN(skb_ancestor_cgroup_id), FN(sk_lookup_tcp), FN(sk_lookup_udp), FN(sk_release), FN(map_push_elem), FN(map_pop_elem), FN(map_peek_elem), FN(msg_push_data), FN(msg_pop_data), FN(rc_pointer_rel), FN(spin_lock), FN(spin_unlock), FN(sk_fullsock), FN(tcp_sock), FN(skb_ecn_set_ce), FN(get_listener_sock), FN(skc_lookup_tcp), FN(tcp_check_syncookie), FN(sysctl_get_name), FN(sysctl_get_current_value), FN(sysctl_get_new_value), FN(sysctl_set_new_value), FN(strtol), FN(strtoul), FN(sk_storage_get), FN(sk_storage_delete), FN(send_signal), FN(tcp_gen_syncookie), FN(skb_output), FN(probe_read_user), FN(probe_read_kernel), FN(probe_read_user_str), FN(probe_read_kernel_str), FN(tcp_send_ack), FN(send_signal_thread), FN(jiffies64), FN(read_branch_records), FN(get_ns_current_pid_tgid), FN(xdp_output), FN(get_netns_cookie), FN(get_current_ancestor_cgroup_id), FN(sk_assign), FN(ktime_get_boot_ns), FN(seq_printf), FN(seq_write), FN(sk_cgroup_id), FN(sk_ancestor_cgroup_id), FN(ringbuf_output), FN(ringbuf_reserve), FN(ringbuf_submit), FN(ringbuf_discard), FN(ringbuf_query), FN(csum_level), FN(skc_to_tcp6_sock), FN(skc_to_tcp_sock), FN(skc_to_tcp_timewait_sock), FN(skc_to_tcp_request_sock), FN(skc_to_udp6_sock), FN(get_task_stack), FN(load_hdr_opt), FN(store_hdr_opt), FN(reserve_hdr_opt), FN(inode_storage_get), FN(inode_storage_delete), FN(d_path), FN(copy_from_user), FN(snprintf_btf), FN(seq_printf_btf), FN(skb_cgroup_classid), FN(redirect_neigh), FN(per_cpu_ptr), FN(this_cpu_ptr), FN(redirect_peer), FN(task_storage_get), FN(task_storage_delete), FN(get_current_task_btf), FN(bprm_opts_set), FN(ktime_get_coarse_ns), FN(ima_inode_hash), FN(sock_from_file), FN(check_mtu), FN(for_each_map_elem), FN(snprintf), FN(sys_bpf), FN(btf_find_by_name_kind), FN(sys_close), FN(timer_init), FN(timer_set_callback), FN(timer_start), FN(timer_cancel), FN(get_func_ip), FN(get_attach_cookie), FN(task_pt_regs), FN(get_branch_snapshot), FN(trace_vprintk), FN(skc_to_unix_sock), FN(kallsyms_lookup_name),
#define __BPF_FUNC_MAPPER(FN) FN(unspec), FN(map_lookup_elem), FN(map_update_elem), FN(map_delete_elem), FN(probe_read), FN(ktime_get_ns), FN(trace_printk), FN(get_prandom_u32), FN(get_smp_processor_id), FN(skb_store_bytes), FN(l3_csum_replace), FN(l4_csum_replace), FN(tail_call), FN(clone_redirect), FN(get_current_pid_tgid), FN(get_current_uid_gid), FN(get_current_comm), FN(get_cgroup_classid), FN(skb_vlan_push), FN(skb_vlan_pop), FN(skb_get_tunnel_key), FN(skb_set_tunnel_key), FN(perf_event_read), FN(redirect), FN(get_route_realm), FN(perf_event_output), FN(skb_load_bytes), FN(get_stackid), FN(csum_diff), FN(skb_get_tunnel_opt), FN(skb_set_tunnel_opt), FN(skb_change_proto), FN(skb_change_type), FN(skb_under_cgroup), FN(get_hash_recalc), FN(get_current_task), FN(probe_write_user), FN(current_task_under_cgroup), FN(skb_change_tail), FN(skb_pull_data), FN(csum_update), FN(set_hash_invalid), FN(get_numa_node_id), FN(skb_change_head), FN(xdp_adjust_head), FN(probe_read_str), FN(get_socket_cookie), FN(get_socket_uid), FN(set_hash), FN(setsockopt), FN(skb_adjust_room), FN(redirect_map), FN(sk_redirect_map), FN(sock_map_update), FN(xdp_adjust_meta), FN(perf_event_read_value), FN(perf_prog_read_value), FN(getsockopt), FN(override_return), FN(sock_ops_cb_flags_set), FN(msg_redirect_map), FN(msg_apply_bytes), FN(msg_cork_bytes), FN(msg_pull_data), FN(bind), FN(xdp_adjust_tail), FN(skb_get_xfrm_state), FN(get_stack), FN(skb_load_bytes_relative), FN(fib_lookup), FN(sock_hash_update), FN(msg_redirect_hash), FN(sk_redirect_hash), FN(lwt_push_encap), FN(lwt_seg6_store_bytes), FN(lwt_seg6_adjust_srh), FN(lwt_seg6_action), FN(rc_repeat), FN(rc_keydown), FN(skb_cgroup_id), FN(get_current_cgroup_id), FN(get_local_storage), FN(sk_select_reuseport), FN(skb_ancestor_cgroup_id), FN(sk_lookup_tcp), FN(sk_lookup_udp), FN(sk_release), FN(map_push_elem), FN(map_pop_elem), FN(map_peek_elem), FN(msg_push_data), FN(msg_pop_data), FN(rc_pointer_rel), FN(spin_lock), FN(spin_unlock), FN(sk_fullsock), FN(tcp_sock), FN(skb_ecn_set_ce), FN(get_listener_sock), FN(skc_lookup_tcp), FN(tcp_check_syncookie), FN(sysctl_get_name), FN(sysctl_get_current_value), FN(sysctl_get_new_value), FN(sysctl_set_new_value), FN(strtol), FN(strtoul), FN(sk_storage_get), FN(sk_storage_delete), FN(send_signal), FN(tcp_gen_syncookie), FN(skb_output), FN(probe_read_user), FN(probe_read_kernel), FN(probe_read_user_str), FN(probe_read_kernel_str), FN(tcp_send_ack), FN(send_signal_thread), FN(jiffies64), FN(read_branch_records), FN(get_ns_current_pid_tgid), FN(xdp_output), FN(get_netns_cookie), FN(get_current_ancestor_cgroup_id), FN(sk_assign), FN(ktime_get_boot_ns), FN(seq_printf), FN(seq_write), FN(sk_cgroup_id), FN(sk_ancestor_cgroup_id), FN(ringbuf_output), FN(ringbuf_reserve), FN(ringbuf_submit), FN(ringbuf_discard), FN(ringbuf_query), FN(csum_level), FN(skc_to_tcp6_sock), FN(skc_to_tcp_sock), FN(skc_to_tcp_timewait_sock), FN(skc_to_tcp_request_sock), FN(skc_to_udp6_sock), FN(get_task_stack), FN(load_hdr_opt), FN(store_hdr_opt), FN(reserve_hdr_opt), FN(inode_storage_get), FN(inode_storage_delete), FN(d_path), FN(copy_from_user), FN(snprintf_btf), FN(seq_printf_btf), FN(skb_cgroup_classid), FN(redirect_neigh), FN(per_cpu_ptr), FN(this_cpu_ptr), FN(redirect_peer), FN(task_storage_get), FN(task_storage_delete), FN(get_current_task_btf), FN(bprm_opts_set), FN(ktime_get_coarse_ns), FN(ima_inode_hash), FN(sock_from_file), FN(check_mtu), FN(for_each_map_elem), FN(snprintf), FN(sys_bpf), FN(btf_find_by_name_kind), FN(sys_close), FN(timer_init), FN(timer_set_callback), FN(timer_start), FN(timer_cancel), FN(get_func_ip), FN(get_attach_cookie), FN(task_pt_regs), FN(get_branch_snapshot), FN(trace_vprintk), FN(skc_to_unix_sock), FN(kallsyms_lookup_name), FN(find_vma), FN(loop), FN(strncmp), FN(get_func_arg), FN(get_func_ret), FN(get_func_arg_cnt),
#define __BPF_ENUM_FN(x) BPF_FUNC_ ##x
enum bpf_func_id {
__BPF_FUNC_MAPPER(__BPF_ENUM_FN) __BPF_FUNC_MAX_ID,
@ -1162,6 +1164,7 @@ struct bpf_sk_lookup {
__u32 local_ip4;
__u32 local_ip6[4];
__u32 local_port;
__u32 ingress_ifindex;
};
struct btf_ptr {
void * ptr;
@ -1174,4 +1177,24 @@ enum {
BTF_F_PTR_RAW = (1ULL << 2),
BTF_F_ZERO = (1ULL << 3),
};
enum bpf_core_relo_kind {
BPF_CORE_FIELD_BYTE_OFFSET = 0,
BPF_CORE_FIELD_BYTE_SIZE = 1,
BPF_CORE_FIELD_EXISTS = 2,
BPF_CORE_FIELD_SIGNED = 3,
BPF_CORE_FIELD_LSHIFT_U64 = 4,
BPF_CORE_FIELD_RSHIFT_U64 = 5,
BPF_CORE_TYPE_ID_LOCAL = 6,
BPF_CORE_TYPE_ID_TARGET = 7,
BPF_CORE_TYPE_EXISTS = 8,
BPF_CORE_TYPE_SIZE = 9,
BPF_CORE_ENUMVAL_EXISTS = 10,
BPF_CORE_ENUMVAL_VALUE = 11,
};
struct bpf_core_relo {
__u32 insn_off;
__u32 type_id;
__u32 access_str_off;
enum bpf_core_relo_kind kind;
};
#endif

1
libc/kernel/uapi/linux/btf.h
View file

@ -64,6 +64,7 @@ enum {
BTF_KIND_DATASEC = 15,
BTF_KIND_FLOAT = 16,
BTF_KIND_DECL_TAG = 17,
BTF_KIND_TYPE_TAG = 18,
NR_BTF_KINDS,
BTF_KIND_MAX = NR_BTF_KINDS - 1,
};

7
libc/kernel/uapi/linux/can/netlink.h
View file

@ -97,6 +97,7 @@ enum {
IFLA_CAN_DATA_BITRATE_CONST,
IFLA_CAN_BITRATE_MAX,
IFLA_CAN_TDC,
IFLA_CAN_CTRLMODE_EXT,
__IFLA_CAN_MAX,
IFLA_CAN_MAX = __IFLA_CAN_MAX - 1
};
@ -114,5 +115,11 @@ enum {
__IFLA_CAN_TDC,
IFLA_CAN_TDC_MAX = __IFLA_CAN_TDC - 1
};
enum {
IFLA_CAN_CTRLMODE_UNSPEC,
IFLA_CAN_CTRLMODE_SUPPORTED,
__IFLA_CAN_CTRLMODE,
IFLA_CAN_CTRLMODE_MAX = __IFLA_CAN_CTRLMODE - 1
};
#define CAN_TERMINATION_DISABLED 0
#endif

669
libc/kernel/uapi/linux/comedi.h Normal file
View file

@ -0,0 +1,669 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _COMEDI_H
#define _COMEDI_H
#define COMEDI_MAJORVERSION 0
#define COMEDI_MINORVERSION 7
#define COMEDI_MICROVERSION 76
#define VERSION "0.7.76"
#define COMEDI_MAJOR 98
#define COMEDI_NDEVICES 16
#define COMEDI_NDEVCONFOPTS 32
#define COMEDI_DEVCONF_AUX_DATA3_LENGTH 25
#define COMEDI_DEVCONF_AUX_DATA2_LENGTH 26
#define COMEDI_DEVCONF_AUX_DATA1_LENGTH 27
#define COMEDI_DEVCONF_AUX_DATA0_LENGTH 28
#define COMEDI_DEVCONF_AUX_DATA_HI 29
#define COMEDI_DEVCONF_AUX_DATA_LO 30
#define COMEDI_DEVCONF_AUX_DATA_LENGTH 31
#define COMEDI_NAMELEN 20
#define CR_PACK(chan,rng,aref) ((((aref) & 0x3) << 24) | (((rng) & 0xff) << 16) | (chan))
#define CR_PACK_FLAGS(chan,range,aref,flags) (CR_PACK(chan, range, aref) | ((flags) & CR_FLAGS_MASK))
#define CR_CHAN(a) ((a) & 0xffff)
#define CR_RANGE(a) (((a) >> 16) & 0xff)
#define CR_AREF(a) (((a) >> 24) & 0x03)
#define CR_FLAGS_MASK 0xfc000000
#define CR_ALT_FILTER 0x04000000
#define CR_DITHER CR_ALT_FILTER
#define CR_DEGLITCH CR_ALT_FILTER
#define CR_ALT_SOURCE 0x08000000
#define CR_EDGE 0x40000000
#define CR_INVERT 0x80000000
#define AREF_GROUND 0x00
#define AREF_COMMON 0x01
#define AREF_DIFF 0x02
#define AREF_OTHER 0x03
#define GPCT_RESET 0x0001
#define GPCT_SET_SOURCE 0x0002
#define GPCT_SET_GATE 0x0004
#define GPCT_SET_DIRECTION 0x0008
#define GPCT_SET_OPERATION 0x0010
#define GPCT_ARM 0x0020
#define GPCT_DISARM 0x0040
#define GPCT_GET_INT_CLK_FRQ 0x0080
#define GPCT_INT_CLOCK 0x0001
#define GPCT_EXT_PIN 0x0002
#define GPCT_NO_GATE 0x0004
#define GPCT_UP 0x0008
#define GPCT_DOWN 0x0010
#define GPCT_HWUD 0x0020
#define GPCT_SIMPLE_EVENT 0x0040
#define GPCT_SINGLE_PERIOD 0x0080
#define GPCT_SINGLE_PW 0x0100
#define GPCT_CONT_PULSE_OUT 0x0200
#define GPCT_SINGLE_PULSE_OUT 0x0400
#define INSN_MASK_WRITE 0x8000000
#define INSN_MASK_READ 0x4000000
#define INSN_MASK_SPECIAL 0x2000000
#define INSN_READ (0 | INSN_MASK_READ)
#define INSN_WRITE (1 | INSN_MASK_WRITE)
#define INSN_BITS (2 | INSN_MASK_READ | INSN_MASK_WRITE)
#define INSN_CONFIG (3 | INSN_MASK_READ | INSN_MASK_WRITE)
#define INSN_DEVICE_CONFIG (INSN_CONFIG | INSN_MASK_SPECIAL)
#define INSN_GTOD (4 | INSN_MASK_READ | INSN_MASK_SPECIAL)
#define INSN_WAIT (5 | INSN_MASK_WRITE | INSN_MASK_SPECIAL)
#define INSN_INTTRIG (6 | INSN_MASK_WRITE | INSN_MASK_SPECIAL)
#define CMDF_BOGUS 0x00000001
#define CMDF_PRIORITY 0x00000008
#define CMDF_WAKE_EOS 0x00000020
#define CMDF_WRITE 0x00000040
#define CMDF_RAWDATA 0x00000080
#define CMDF_ROUND_MASK 0x00030000
#define CMDF_ROUND_NEAREST 0x00000000
#define CMDF_ROUND_DOWN 0x00010000
#define CMDF_ROUND_UP 0x00020000
#define CMDF_ROUND_UP_NEXT 0x00030000
#define COMEDI_EV_START 0x00040000
#define COMEDI_EV_SCAN_BEGIN 0x00080000
#define COMEDI_EV_CONVERT 0x00100000
#define COMEDI_EV_SCAN_END 0x00200000
#define COMEDI_EV_STOP 0x00400000
#define TRIG_BOGUS CMDF_BOGUS
#define TRIG_RT CMDF_PRIORITY
#define TRIG_WAKE_EOS CMDF_WAKE_EOS
#define TRIG_WRITE CMDF_WRITE
#define TRIG_ROUND_MASK CMDF_ROUND_MASK
#define TRIG_ROUND_NEAREST CMDF_ROUND_NEAREST
#define TRIG_ROUND_DOWN CMDF_ROUND_DOWN
#define TRIG_ROUND_UP CMDF_ROUND_UP
#define TRIG_ROUND_UP_NEXT CMDF_ROUND_UP_NEXT
#define TRIG_ANY 0xffffffff
#define TRIG_INVALID 0x00000000
#define TRIG_NONE 0x00000001
#define TRIG_NOW 0x00000002
#define TRIG_FOLLOW 0x00000004
#define TRIG_TIME 0x00000008
#define TRIG_TIMER 0x00000010
#define TRIG_COUNT 0x00000020
#define TRIG_EXT 0x00000040
#define TRIG_INT 0x00000080
#define TRIG_OTHER 0x00000100
#define SDF_BUSY 0x0001
#define SDF_BUSY_OWNER 0x0002
#define SDF_LOCKED 0x0004
#define SDF_LOCK_OWNER 0x0008
#define SDF_MAXDATA 0x0010
#define SDF_FLAGS 0x0020
#define SDF_RANGETYPE 0x0040
#define SDF_PWM_COUNTER 0x0080
#define SDF_PWM_HBRIDGE 0x0100
#define SDF_CMD 0x1000
#define SDF_SOFT_CALIBRATED 0x2000
#define SDF_CMD_WRITE 0x4000
#define SDF_CMD_READ 0x8000
#define SDF_READABLE 0x00010000
#define SDF_WRITABLE 0x00020000
#define SDF_WRITEABLE SDF_WRITABLE
#define SDF_INTERNAL 0x00040000
#define SDF_GROUND 0x00100000
#define SDF_COMMON 0x00200000
#define SDF_DIFF 0x00400000
#define SDF_OTHER 0x00800000
#define SDF_DITHER 0x01000000
#define SDF_DEGLITCH 0x02000000
#define SDF_MMAP 0x04000000
#define SDF_RUNNING 0x08000000
#define SDF_LSAMPL 0x10000000
#define SDF_PACKED 0x20000000
enum comedi_subdevice_type {
COMEDI_SUBD_UNUSED,
COMEDI_SUBD_AI,
COMEDI_SUBD_AO,
COMEDI_SUBD_DI,
COMEDI_SUBD_DO,
COMEDI_SUBD_DIO,
COMEDI_SUBD_COUNTER,
COMEDI_SUBD_TIMER,
COMEDI_SUBD_MEMORY,
COMEDI_SUBD_CALIB,
COMEDI_SUBD_PROC,
COMEDI_SUBD_SERIAL,
COMEDI_SUBD_PWM
};
enum comedi_io_direction {
COMEDI_INPUT = 0,
COMEDI_OUTPUT = 1,
COMEDI_OPENDRAIN = 2
};
enum configuration_ids {
INSN_CONFIG_DIO_INPUT = COMEDI_INPUT,
INSN_CONFIG_DIO_OUTPUT = COMEDI_OUTPUT,
INSN_CONFIG_DIO_OPENDRAIN = COMEDI_OPENDRAIN,
INSN_CONFIG_ANALOG_TRIG = 16,
INSN_CONFIG_ALT_SOURCE = 20,
INSN_CONFIG_DIGITAL_TRIG = 21,
INSN_CONFIG_BLOCK_SIZE = 22,
INSN_CONFIG_TIMER_1 = 23,
INSN_CONFIG_FILTER = 24,
INSN_CONFIG_CHANGE_NOTIFY = 25,
INSN_CONFIG_SERIAL_CLOCK = 26,
INSN_CONFIG_BIDIRECTIONAL_DATA = 27,
INSN_CONFIG_DIO_QUERY = 28,
INSN_CONFIG_PWM_OUTPUT = 29,
INSN_CONFIG_GET_PWM_OUTPUT = 30,
INSN_CONFIG_ARM = 31,
INSN_CONFIG_DISARM = 32,
INSN_CONFIG_GET_COUNTER_STATUS = 33,
INSN_CONFIG_RESET = 34,
INSN_CONFIG_GPCT_SINGLE_PULSE_GENERATOR = 1001,
INSN_CONFIG_GPCT_PULSE_TRAIN_GENERATOR = 1002,
INSN_CONFIG_GPCT_QUADRATURE_ENCODER = 1003,
INSN_CONFIG_SET_GATE_SRC = 2001,
INSN_CONFIG_GET_GATE_SRC = 2002,
INSN_CONFIG_SET_CLOCK_SRC = 2003,
INSN_CONFIG_GET_CLOCK_SRC = 2004,
INSN_CONFIG_SET_OTHER_SRC = 2005,
INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE = 2006,
INSN_CONFIG_SET_COUNTER_MODE = 4097,
INSN_CONFIG_8254_SET_MODE = INSN_CONFIG_SET_COUNTER_MODE,
INSN_CONFIG_8254_READ_STATUS = 4098,
INSN_CONFIG_SET_ROUTING = 4099,
INSN_CONFIG_GET_ROUTING = 4109,
INSN_CONFIG_PWM_SET_PERIOD = 5000,
INSN_CONFIG_PWM_GET_PERIOD = 5001,
INSN_CONFIG_GET_PWM_STATUS = 5002,
INSN_CONFIG_PWM_SET_H_BRIDGE = 5003,
INSN_CONFIG_PWM_GET_H_BRIDGE = 5004,
INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS = 5005,
};
enum device_config_route_ids {
INSN_DEVICE_CONFIG_TEST_ROUTE = 0,
INSN_DEVICE_CONFIG_CONNECT_ROUTE = 1,
INSN_DEVICE_CONFIG_DISCONNECT_ROUTE = 2,
INSN_DEVICE_CONFIG_GET_ROUTES = 3,
};
enum comedi_digital_trig_op {
COMEDI_DIGITAL_TRIG_DISABLE = 0,
COMEDI_DIGITAL_TRIG_ENABLE_EDGES = 1,
COMEDI_DIGITAL_TRIG_ENABLE_LEVELS = 2
};
enum comedi_support_level {
COMEDI_UNKNOWN_SUPPORT = 0,
COMEDI_SUPPORTED,
COMEDI_UNSUPPORTED
};
enum comedi_counter_status_flags {
COMEDI_COUNTER_ARMED = 0x1,
COMEDI_COUNTER_COUNTING = 0x2,
COMEDI_COUNTER_TERMINAL_COUNT = 0x4,
};
#define CIO 'd'
#define COMEDI_DEVCONFIG _IOW(CIO, 0, struct comedi_devconfig)
#define COMEDI_DEVINFO _IOR(CIO, 1, struct comedi_devinfo)
#define COMEDI_SUBDINFO _IOR(CIO, 2, struct comedi_subdinfo)
#define COMEDI_CHANINFO _IOR(CIO, 3, struct comedi_chaninfo)
#define COMEDI_LOCK _IO(CIO, 5)
#define COMEDI_UNLOCK _IO(CIO, 6)
#define COMEDI_CANCEL _IO(CIO, 7)
#define COMEDI_RANGEINFO _IOR(CIO, 8, struct comedi_rangeinfo)
#define COMEDI_CMD _IOR(CIO, 9, struct comedi_cmd)
#define COMEDI_CMDTEST _IOR(CIO, 10, struct comedi_cmd)
#define COMEDI_INSNLIST _IOR(CIO, 11, struct comedi_insnlist)
#define COMEDI_INSN _IOR(CIO, 12, struct comedi_insn)
#define COMEDI_BUFCONFIG _IOR(CIO, 13, struct comedi_bufconfig)
#define COMEDI_BUFINFO _IOWR(CIO, 14, struct comedi_bufinfo)
#define COMEDI_POLL _IO(CIO, 15)
#define COMEDI_SETRSUBD _IO(CIO, 16)
#define COMEDI_SETWSUBD _IO(CIO, 17)
struct comedi_insn {
unsigned int insn;
unsigned int n;
unsigned int __user * data;
unsigned int subdev;
unsigned int chanspec;
unsigned int unused[3];
};
struct comedi_insnlist {
unsigned int n_insns;
struct comedi_insn __user * insns;
};
struct comedi_cmd {
unsigned int subdev;
unsigned int flags;
unsigned int start_src;
unsigned int start_arg;
unsigned int scan_begin_src;
unsigned int scan_begin_arg;
unsigned int convert_src;
unsigned int convert_arg;
unsigned int scan_end_src;
unsigned int scan_end_arg;
unsigned int stop_src;
unsigned int stop_arg;
unsigned int * chanlist;
unsigned int chanlist_len;
short __user * data;
unsigned int data_len;
};
struct comedi_chaninfo {
unsigned int subdev;
unsigned int __user * maxdata_list;
unsigned int __user * flaglist;
unsigned int __user * rangelist;
unsigned int unused[4];
};
struct comedi_rangeinfo {
unsigned int range_type;
void __user * range_ptr;
};
struct comedi_krange {
int min;
int max;
unsigned int flags;
};
struct comedi_subdinfo {
unsigned int type;
unsigned int n_chan;
unsigned int subd_flags;
unsigned int timer_type;
unsigned int len_chanlist;
unsigned int maxdata;
unsigned int flags;
unsigned int range_type;
unsigned int settling_time_0;
unsigned int insn_bits_support;
unsigned int unused[8];
};
struct comedi_devinfo {
unsigned int version_code;
unsigned int n_subdevs;
char driver_name[COMEDI_NAMELEN];
char board_name[COMEDI_NAMELEN];
int read_subdevice;
int write_subdevice;
int unused[30];
};
struct comedi_devconfig {
char board_name[COMEDI_NAMELEN];
int options[COMEDI_NDEVCONFOPTS];
};
struct comedi_bufconfig {
unsigned int subdevice;
unsigned int flags;
unsigned int maximum_size;
unsigned int size;
unsigned int unused[4];
};
struct comedi_bufinfo {
unsigned int subdevice;
unsigned int bytes_read;
unsigned int buf_write_ptr;
unsigned int buf_read_ptr;
unsigned int buf_write_count;
unsigned int buf_read_count;
unsigned int bytes_written;
unsigned int unused[4];
};
#define __RANGE(a,b) ((((a) & 0xffff) << 16) | ((b) & 0xffff))
#define RANGE_OFFSET(a) (((a) >> 16) & 0xffff)
#define RANGE_LENGTH(b) ((b) & 0xffff)
#define RF_UNIT(flags) ((flags) & 0xff)
#define RF_EXTERNAL 0x100
#define UNIT_volt 0
#define UNIT_mA 1
#define UNIT_none 2
#define COMEDI_MIN_SPEED 0xffffffffu
enum i8254_mode {
I8254_MODE0 = (0 << 1),
I8254_MODE1 = (1 << 1),
I8254_MODE2 = (2 << 1),
I8254_MODE3 = (3 << 1),
I8254_MODE4 = (4 << 1),
I8254_MODE5 = (5 << 1),
I8254_BCD = 1,
I8254_BINARY = 0
};
#define NI_NAMES_BASE 0x8000u
#define _TERM_N(base,n,x) ((base) + ((x) & ((n) - 1)))
#define NI_PFI(x) _TERM_N(NI_NAMES_BASE, 64, x)
#define TRIGGER_LINE(x) _TERM_N(NI_PFI(- 1) + 1, 8, x)
#define NI_RTSI_BRD(x) _TERM_N(TRIGGER_LINE(- 1) + 1, 4, x)
#define NI_MAX_COUNTERS 8
#define NI_COUNTER_NAMES_BASE (NI_RTSI_BRD(- 1) + 1)
#define NI_CtrSource(x) _TERM_N(NI_COUNTER_NAMES_BASE, NI_MAX_COUNTERS, x)
#define NI_GATES_NAMES_BASE (NI_CtrSource(- 1) + 1)
#define NI_CtrGate(x) _TERM_N(NI_GATES_NAMES_BASE, NI_MAX_COUNTERS, x)
#define NI_CtrAux(x) _TERM_N(NI_CtrGate(- 1) + 1, NI_MAX_COUNTERS, x)
#define NI_CtrA(x) _TERM_N(NI_CtrAux(- 1) + 1, NI_MAX_COUNTERS, x)
#define NI_CtrB(x) _TERM_N(NI_CtrA(- 1) + 1, NI_MAX_COUNTERS, x)
#define NI_CtrZ(x) _TERM_N(NI_CtrB(- 1) + 1, NI_MAX_COUNTERS, x)
#define NI_GATES_NAMES_MAX NI_CtrZ(- 1)
#define NI_CtrArmStartTrigger(x) _TERM_N(NI_CtrZ(- 1) + 1, NI_MAX_COUNTERS, x)
#define NI_CtrInternalOutput(x) _TERM_N(NI_CtrArmStartTrigger(- 1) + 1, NI_MAX_COUNTERS, x)
#define NI_CtrOut(x) _TERM_N(NI_CtrInternalOutput(- 1) + 1, NI_MAX_COUNTERS, x)
#define NI_CtrSampleClock(x) _TERM_N(NI_CtrOut(- 1) + 1, NI_MAX_COUNTERS, x)
#define NI_COUNTER_NAMES_MAX NI_CtrSampleClock(- 1)
enum ni_common_signal_names {
PXI_Star = NI_COUNTER_NAMES_MAX + 1,
PXI_Clk10,
PXIe_Clk100,
NI_AI_SampleClock,
NI_AI_SampleClockTimebase,
NI_AI_StartTrigger,
NI_AI_ReferenceTrigger,
NI_AI_ConvertClock,
NI_AI_ConvertClockTimebase,
NI_AI_PauseTrigger,
NI_AI_HoldCompleteEvent,
NI_AI_HoldComplete,
NI_AI_ExternalMUXClock,
NI_AI_STOP,
NI_AO_SampleClock,
NI_AO_SampleClockTimebase,
NI_AO_StartTrigger,
NI_AO_PauseTrigger,
NI_DI_SampleClock,
NI_DI_SampleClockTimebase,
NI_DI_StartTrigger,
NI_DI_ReferenceTrigger,
NI_DI_PauseTrigger,
NI_DI_InputBufferFull,
NI_DI_ReadyForStartEvent,
NI_DI_ReadyForTransferEventBurst,
NI_DI_ReadyForTransferEventPipelined,
NI_DO_SampleClock,
NI_DO_SampleClockTimebase,
NI_DO_StartTrigger,
NI_DO_PauseTrigger,
NI_DO_OutputBufferFull,
NI_DO_DataActiveEvent,
NI_DO_ReadyForStartEvent,
NI_DO_ReadyForTransferEvent,
NI_MasterTimebase,
NI_20MHzTimebase,
NI_80MHzTimebase,
NI_100MHzTimebase,
NI_200MHzTimebase,
NI_100kHzTimebase,
NI_10MHzRefClock,
NI_FrequencyOutput,
NI_ChangeDetectionEvent,
NI_AnalogComparisonEvent,
NI_WatchdogExpiredEvent,
NI_WatchdogExpirationTrigger,
NI_SCXI_Trig1,
NI_LogicLow,
NI_LogicHigh,
NI_ExternalStrobe,
NI_PFI_DO,
NI_CaseGround,
NI_RGOUT0,
_NI_NAMES_MAX_PLUS_1,
NI_NUM_NAMES = _NI_NAMES_MAX_PLUS_1 - NI_NAMES_BASE,
};
#define NI_USUAL_PFI_SELECT(x) (((x) < 10) ? (0x1 + (x)) : (0xb + (x)))
#define NI_USUAL_RTSI_SELECT(x) (((x) < 7) ? (0xb + (x)) : 0x1b)
#define NI_GPCT_COUNTING_MODE_SHIFT 16
#define NI_GPCT_INDEX_PHASE_BITSHIFT 20
#define NI_GPCT_COUNTING_DIRECTION_SHIFT 24
enum ni_gpct_mode_bits {
NI_GPCT_GATE_ON_BOTH_EDGES_BIT = 0x4,
NI_GPCT_EDGE_GATE_MODE_MASK = 0x18,
NI_GPCT_EDGE_GATE_STARTS_STOPS_BITS = 0x0,
NI_GPCT_EDGE_GATE_STOPS_STARTS_BITS = 0x8,
NI_GPCT_EDGE_GATE_STARTS_BITS = 0x10,
NI_GPCT_EDGE_GATE_NO_STARTS_NO_STOPS_BITS = 0x18,
NI_GPCT_STOP_MODE_MASK = 0x60,
NI_GPCT_STOP_ON_GATE_BITS = 0x00,
NI_GPCT_STOP_ON_GATE_OR_TC_BITS = 0x20,
NI_GPCT_STOP_ON_GATE_OR_SECOND_TC_BITS = 0x40,
NI_GPCT_LOAD_B_SELECT_BIT = 0x80,
NI_GPCT_OUTPUT_MODE_MASK = 0x300,
NI_GPCT_OUTPUT_TC_PULSE_BITS = 0x100,
NI_GPCT_OUTPUT_TC_TOGGLE_BITS = 0x200,
NI_GPCT_OUTPUT_TC_OR_GATE_TOGGLE_BITS = 0x300,
NI_GPCT_HARDWARE_DISARM_MASK = 0xc00,
NI_GPCT_NO_HARDWARE_DISARM_BITS = 0x000,
NI_GPCT_DISARM_AT_TC_BITS = 0x400,
NI_GPCT_DISARM_AT_GATE_BITS = 0x800,
NI_GPCT_DISARM_AT_TC_OR_GATE_BITS = 0xc00,
NI_GPCT_LOADING_ON_TC_BIT = 0x1000,
NI_GPCT_LOADING_ON_GATE_BIT = 0x4000,
NI_GPCT_COUNTING_MODE_MASK = 0x7 << NI_GPCT_COUNTING_MODE_SHIFT,
NI_GPCT_COUNTING_MODE_NORMAL_BITS = 0x0 << NI_GPCT_COUNTING_MODE_SHIFT,
NI_GPCT_COUNTING_MODE_QUADRATURE_X1_BITS = 0x1 << NI_GPCT_COUNTING_MODE_SHIFT,
NI_GPCT_COUNTING_MODE_QUADRATURE_X2_BITS = 0x2 << NI_GPCT_COUNTING_MODE_SHIFT,
NI_GPCT_COUNTING_MODE_QUADRATURE_X4_BITS = 0x3 << NI_GPCT_COUNTING_MODE_SHIFT,
NI_GPCT_COUNTING_MODE_TWO_PULSE_BITS = 0x4 << NI_GPCT_COUNTING_MODE_SHIFT,
NI_GPCT_COUNTING_MODE_SYNC_SOURCE_BITS = 0x6 << NI_GPCT_COUNTING_MODE_SHIFT,
NI_GPCT_INDEX_PHASE_MASK = 0x3 << NI_GPCT_INDEX_PHASE_BITSHIFT,
NI_GPCT_INDEX_PHASE_LOW_A_LOW_B_BITS = 0x0 << NI_GPCT_INDEX_PHASE_BITSHIFT,
NI_GPCT_INDEX_PHASE_LOW_A_HIGH_B_BITS = 0x1 << NI_GPCT_INDEX_PHASE_BITSHIFT,
NI_GPCT_INDEX_PHASE_HIGH_A_LOW_B_BITS = 0x2 << NI_GPCT_INDEX_PHASE_BITSHIFT,
NI_GPCT_INDEX_PHASE_HIGH_A_HIGH_B_BITS = 0x3 << NI_GPCT_INDEX_PHASE_BITSHIFT,
NI_GPCT_INDEX_ENABLE_BIT = 0x400000,
NI_GPCT_COUNTING_DIRECTION_MASK = 0x3 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
NI_GPCT_COUNTING_DIRECTION_DOWN_BITS = 0x00 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
NI_GPCT_COUNTING_DIRECTION_UP_BITS = 0x1 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
NI_GPCT_COUNTING_DIRECTION_HW_UP_DOWN_BITS = 0x2 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
NI_GPCT_COUNTING_DIRECTION_HW_GATE_BITS = 0x3 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
NI_GPCT_RELOAD_SOURCE_MASK = 0xc000000,
NI_GPCT_RELOAD_SOURCE_FIXED_BITS = 0x0,
NI_GPCT_RELOAD_SOURCE_SWITCHING_BITS = 0x4000000,
NI_GPCT_RELOAD_SOURCE_GATE_SELECT_BITS = 0x8000000,
NI_GPCT_OR_GATE_BIT = 0x10000000,
NI_GPCT_INVERT_OUTPUT_BIT = 0x20000000
};
enum ni_gpct_clock_source_bits {
NI_GPCT_CLOCK_SRC_SELECT_MASK = 0x3f,
NI_GPCT_TIMEBASE_1_CLOCK_SRC_BITS = 0x0,
NI_GPCT_TIMEBASE_2_CLOCK_SRC_BITS = 0x1,
NI_GPCT_TIMEBASE_3_CLOCK_SRC_BITS = 0x2,
NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS = 0x3,
NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS = 0x4,
NI_GPCT_NEXT_TC_CLOCK_SRC_BITS = 0x5,
NI_GPCT_SOURCE_PIN_i_CLOCK_SRC_BITS = 0x6,
NI_GPCT_PXI10_CLOCK_SRC_BITS = 0x7,
NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS = 0x8,
NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS = 0x9,
NI_GPCT_PRESCALE_MODE_CLOCK_SRC_MASK = 0x30000000,
NI_GPCT_NO_PRESCALE_CLOCK_SRC_BITS = 0x0,
NI_GPCT_PRESCALE_X2_CLOCK_SRC_BITS = 0x10000000,
NI_GPCT_PRESCALE_X8_CLOCK_SRC_BITS = 0x20000000,
NI_GPCT_INVERT_CLOCK_SRC_BIT = 0x80000000
};
#define NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(x) (0x10 + (x))
#define NI_GPCT_RTSI_CLOCK_SRC_BITS(x) (0x18 + (x))
#define NI_GPCT_PFI_CLOCK_SRC_BITS(x) (0x20 + (x))
enum ni_gpct_gate_select {
NI_GPCT_TIMESTAMP_MUX_GATE_SELECT = 0x0,
NI_GPCT_AI_START2_GATE_SELECT = 0x12,
NI_GPCT_PXI_STAR_TRIGGER_GATE_SELECT = 0x13,
NI_GPCT_NEXT_OUT_GATE_SELECT = 0x14,
NI_GPCT_AI_START1_GATE_SELECT = 0x1c,
NI_GPCT_NEXT_SOURCE_GATE_SELECT = 0x1d,
NI_GPCT_ANALOG_TRIGGER_OUT_GATE_SELECT = 0x1e,
NI_GPCT_LOGIC_LOW_GATE_SELECT = 0x1f,
NI_GPCT_SOURCE_PIN_i_GATE_SELECT = 0x100,
NI_GPCT_GATE_PIN_i_GATE_SELECT = 0x101,
NI_GPCT_UP_DOWN_PIN_i_GATE_SELECT = 0x201,
NI_GPCT_SELECTED_GATE_GATE_SELECT = 0x21e,
NI_GPCT_DISABLED_GATE_SELECT = 0x8000,
};
#define NI_GPCT_GATE_PIN_GATE_SELECT(x) (0x102 + (x))
#define NI_GPCT_RTSI_GATE_SELECT(x) NI_USUAL_RTSI_SELECT(x)
#define NI_GPCT_PFI_GATE_SELECT(x) NI_USUAL_PFI_SELECT(x)
#define NI_GPCT_UP_DOWN_PIN_GATE_SELECT(x) (0x202 + (x))
enum ni_gpct_other_index {
NI_GPCT_SOURCE_ENCODER_A,
NI_GPCT_SOURCE_ENCODER_B,
NI_GPCT_SOURCE_ENCODER_Z
};
enum ni_gpct_other_select {
NI_GPCT_DISABLED_OTHER_SELECT = 0x8000,
};
#define NI_GPCT_PFI_OTHER_SELECT(x) NI_USUAL_PFI_SELECT(x)
enum ni_gpct_arm_source {
NI_GPCT_ARM_IMMEDIATE = 0x0,
NI_GPCT_ARM_PAIRED_IMMEDIATE = 0x1,
NI_GPCT_HW_ARM = 0x1000,
NI_GPCT_ARM_UNKNOWN = NI_GPCT_HW_ARM,
};
enum ni_gpct_filter_select {
NI_GPCT_FILTER_OFF = 0x0,
NI_GPCT_FILTER_TIMEBASE_3_SYNC = 0x1,
NI_GPCT_FILTER_100x_TIMEBASE_1 = 0x2,
NI_GPCT_FILTER_20x_TIMEBASE_1 = 0x3,
NI_GPCT_FILTER_10x_TIMEBASE_1 = 0x4,
NI_GPCT_FILTER_2x_TIMEBASE_1 = 0x5,
NI_GPCT_FILTER_2x_TIMEBASE_3 = 0x6
};
enum ni_pfi_filter_select {
NI_PFI_FILTER_OFF = 0x0,
NI_PFI_FILTER_125ns = 0x1,
NI_PFI_FILTER_6425ns = 0x2,
NI_PFI_FILTER_2550us = 0x3
};
enum ni_mio_clock_source {
NI_MIO_INTERNAL_CLOCK = 0,
NI_MIO_RTSI_CLOCK = 1,
NI_MIO_PLL_PXI_STAR_TRIGGER_CLOCK = 2,
NI_MIO_PLL_PXI10_CLOCK = 3,
NI_MIO_PLL_RTSI0_CLOCK = 4
};
#define NI_MIO_PLL_RTSI_CLOCK(x) (NI_MIO_PLL_RTSI0_CLOCK + (x))
enum ni_rtsi_routing {
NI_RTSI_OUTPUT_ADR_START1 = 0,
NI_RTSI_OUTPUT_ADR_START2 = 1,
NI_RTSI_OUTPUT_SCLKG = 2,
NI_RTSI_OUTPUT_DACUPDN = 3,
NI_RTSI_OUTPUT_DA_START1 = 4,
NI_RTSI_OUTPUT_G_SRC0 = 5,
NI_RTSI_OUTPUT_G_GATE0 = 6,
NI_RTSI_OUTPUT_RGOUT0 = 7,
NI_RTSI_OUTPUT_RTSI_BRD_0 = 8,
NI_RTSI_OUTPUT_RTSI_OSC = 12
};
#define NI_RTSI_OUTPUT_RTSI_BRD(x) (NI_RTSI_OUTPUT_RTSI_BRD_0 + (x))
enum ni_pfi_routing {
NI_PFI_OUTPUT_PFI_DEFAULT = 0,
NI_PFI_OUTPUT_AI_START1 = 1,
NI_PFI_OUTPUT_AI_START2 = 2,
NI_PFI_OUTPUT_AI_CONVERT = 3,
NI_PFI_OUTPUT_G_SRC1 = 4,
NI_PFI_OUTPUT_G_GATE1 = 5,
NI_PFI_OUTPUT_AO_UPDATE_N = 6,
NI_PFI_OUTPUT_AO_START1 = 7,
NI_PFI_OUTPUT_AI_START_PULSE = 8,
NI_PFI_OUTPUT_G_SRC0 = 9,
NI_PFI_OUTPUT_G_GATE0 = 10,
NI_PFI_OUTPUT_EXT_STROBE = 11,
NI_PFI_OUTPUT_AI_EXT_MUX_CLK = 12,
NI_PFI_OUTPUT_GOUT0 = 13,
NI_PFI_OUTPUT_GOUT1 = 14,
NI_PFI_OUTPUT_FREQ_OUT = 15,
NI_PFI_OUTPUT_PFI_DO = 16,
NI_PFI_OUTPUT_I_ATRIG = 17,
NI_PFI_OUTPUT_RTSI0 = 18,
NI_PFI_OUTPUT_PXI_STAR_TRIGGER_IN = 26,
NI_PFI_OUTPUT_SCXI_TRIG1 = 27,
NI_PFI_OUTPUT_DIO_CHANGE_DETECT_RTSI = 28,
NI_PFI_OUTPUT_CDI_SAMPLE = 29,
NI_PFI_OUTPUT_CDO_UPDATE = 30
};
#define NI_PFI_OUTPUT_RTSI(x) (NI_PFI_OUTPUT_RTSI0 + (x))
enum ni_660x_pfi_routing {
NI_660X_PFI_OUTPUT_COUNTER = 1,
NI_660X_PFI_OUTPUT_DIO = 2,
};
#define NI_EXT_PFI(x) (NI_USUAL_PFI_SELECT(x) - 1)
#define NI_EXT_RTSI(x) (NI_USUAL_RTSI_SELECT(x) - 1)
enum ni_m_series_cdio_scan_begin_src {
NI_CDIO_SCAN_BEGIN_SRC_GROUND = 0,
NI_CDIO_SCAN_BEGIN_SRC_AI_START = 18,
NI_CDIO_SCAN_BEGIN_SRC_AI_CONVERT = 19,
NI_CDIO_SCAN_BEGIN_SRC_PXI_STAR_TRIGGER = 20,
NI_CDIO_SCAN_BEGIN_SRC_G0_OUT = 28,
NI_CDIO_SCAN_BEGIN_SRC_G1_OUT = 29,
NI_CDIO_SCAN_BEGIN_SRC_ANALOG_TRIGGER = 30,
NI_CDIO_SCAN_BEGIN_SRC_AO_UPDATE = 31,
NI_CDIO_SCAN_BEGIN_SRC_FREQ_OUT = 32,
NI_CDIO_SCAN_BEGIN_SRC_DIO_CHANGE_DETECT_IRQ = 33
};
#define NI_CDIO_SCAN_BEGIN_SRC_PFI(x) NI_USUAL_PFI_SELECT(x)
#define NI_CDIO_SCAN_BEGIN_SRC_RTSI(x) NI_USUAL_RTSI_SELECT(x)
#define NI_AO_SCAN_BEGIN_SRC_PFI(x) NI_USUAL_PFI_SELECT(x)
#define NI_AO_SCAN_BEGIN_SRC_RTSI(x) NI_USUAL_RTSI_SELECT(x)
enum ni_freq_out_clock_source_bits {
NI_FREQ_OUT_TIMEBASE_1_DIV_2_CLOCK_SRC,
NI_FREQ_OUT_TIMEBASE_2_CLOCK_SRC
};
enum amplc_dio_clock_source {
AMPLC_DIO_CLK_CLKN,
AMPLC_DIO_CLK_10MHZ,
AMPLC_DIO_CLK_1MHZ,
AMPLC_DIO_CLK_100KHZ,
AMPLC_DIO_CLK_10KHZ,
AMPLC_DIO_CLK_1KHZ,
AMPLC_DIO_CLK_OUTNM1,
AMPLC_DIO_CLK_EXT,
AMPLC_DIO_CLK_VCC,
AMPLC_DIO_CLK_GND,
AMPLC_DIO_CLK_PAT_PRESENT,
AMPLC_DIO_CLK_20MHZ
};
enum amplc_dio_ts_clock_src {
AMPLC_DIO_TS_CLK_1GHZ,
AMPLC_DIO_TS_CLK_1MHZ,
AMPLC_DIO_TS_CLK_1KHZ
};
enum amplc_dio_gate_source {
AMPLC_DIO_GAT_VCC,
AMPLC_DIO_GAT_GND,
AMPLC_DIO_GAT_GATN,
AMPLC_DIO_GAT_NOUTNM2,
AMPLC_DIO_GAT_RESERVED4,
AMPLC_DIO_GAT_RESERVED5,
AMPLC_DIO_GAT_RESERVED6,
AMPLC_DIO_GAT_RESERVED7,
AMPLC_DIO_GAT_NGATN = 6,
AMPLC_DIO_GAT_OUTNM2,
AMPLC_DIO_GAT_PAT_PRESENT,
AMPLC_DIO_GAT_PAT_OCCURRED,
AMPLC_DIO_GAT_PAT_GONE,
AMPLC_DIO_GAT_NPAT_PRESENT,
AMPLC_DIO_GAT_NPAT_OCCURRED,
AMPLC_DIO_GAT_NPAT_GONE
};
enum ke_counter_clock_source {
KE_CLK_20MHZ,
KE_CLK_4MHZ,
KE_CLK_EXT
};
#endif

47
libc/kernel/uapi/linux/cyclades.h Normal file
View file

@ -0,0 +1,47 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef _UAPI_LINUX_CYCLADES_H
#define _UAPI_LINUX_CYCLADES_H
#warning "Support for features provided by this header has been removed"
#warning "Please consider updating your code"
struct cyclades_monitor {
unsigned long int_count;
unsigned long char_count;
unsigned long char_max;
unsigned long char_last;
};
#define CYGETMON 0x435901
#define CYGETTHRESH 0x435902
#define CYSETTHRESH 0x435903
#define CYGETDEFTHRESH 0x435904
#define CYSETDEFTHRESH 0x435905
#define CYGETTIMEOUT 0x435906
#define CYSETTIMEOUT 0x435907
#define CYGETDEFTIMEOUT 0x435908
#define CYSETDEFTIMEOUT 0x435909
#define CYSETRFLOW 0x43590a
#define CYGETRFLOW 0x43590b
#define CYSETRTSDTR_INV 0x43590c
#define CYGETRTSDTR_INV 0x43590d
#define CYZSETPOLLCYCLE 0x43590e
#define CYZGETPOLLCYCLE 0x43590f
#define CYGETCD1400VER 0x435910
#define CYSETWAIT 0x435912
#define CYGETWAIT 0x435913
#endif

1
libc/kernel/uapi/linux/ethtool.h
View file

@ -78,6 +78,7 @@ enum tunable_id {
ETHTOOL_RX_COPYBREAK,
ETHTOOL_TX_COPYBREAK,
ETHTOOL_PFC_PREVENTION_TOUT,
ETHTOOL_TX_COPYBREAK_BUF_SIZE,
__ETHTOOL_TUNABLE_COUNT,
};
enum tunable_type_id {

1
libc/kernel/uapi/linux/ethtool_netlink.h
View file

@ -250,6 +250,7 @@ enum {
ETHTOOL_A_RINGS_RX_MINI,
ETHTOOL_A_RINGS_RX_JUMBO,
ETHTOOL_A_RINGS_TX,
ETHTOOL_A_RINGS_RX_BUF_LEN,
__ETHTOOL_A_RINGS_CNT,
ETHTOOL_A_RINGS_MAX = (__ETHTOOL_A_RINGS_CNT - 1)
};

5
libc/kernel/uapi/linux/fanotify.h
View file

@ -38,6 +38,7 @@
#define FAN_ACCESS_PERM 0x00020000
#define FAN_OPEN_EXEC_PERM 0x00040000
#define FAN_EVENT_ON_CHILD 0x08000000
#define FAN_RENAME 0x10000000
#define FAN_ONDIR 0x40000000
#define FAN_CLOSE (FAN_CLOSE_WRITE | FAN_CLOSE_NOWRITE)
#define FAN_MOVE (FAN_MOVED_FROM | FAN_MOVED_TO)
@ -55,7 +56,9 @@
#define FAN_REPORT_FID 0x00000200
#define FAN_REPORT_DIR_FID 0x00000400
#define FAN_REPORT_NAME 0x00000800
#define FAN_REPORT_TARGET_FID 0x00001000
#define FAN_REPORT_DFID_NAME (FAN_REPORT_DIR_FID | FAN_REPORT_NAME)
#define FAN_REPORT_DFID_NAME_TARGET (FAN_REPORT_DFID_NAME | FAN_REPORT_FID | FAN_REPORT_TARGET_FID)
#define FAN_ALL_INIT_FLAGS (FAN_CLOEXEC | FAN_NONBLOCK | FAN_ALL_CLASS_BITS | FAN_UNLIMITED_QUEUE | FAN_UNLIMITED_MARKS)
#define FAN_MARK_ADD 0x00000001
#define FAN_MARK_REMOVE 0x00000002
@ -86,6 +89,8 @@ struct fanotify_event_metadata {
#define FAN_EVENT_INFO_TYPE_DFID 3
#define FAN_EVENT_INFO_TYPE_PIDFD 4
#define FAN_EVENT_INFO_TYPE_ERROR 5
#define FAN_EVENT_INFO_TYPE_OLD_DFID_NAME 10
#define FAN_EVENT_INFO_TYPE_NEW_DFID_NAME 12
struct fanotify_event_info_header {
__u8 info_type;
__u8 pad;

29
libc/kernel/uapi/linux/fuse.h
View file

@ -20,7 +20,7 @@
#define _LINUX_FUSE_H
#include <stdint.h>
#define FUSE_KERNEL_VERSION 7
#define FUSE_KERNEL_MINOR_VERSION 35
#define FUSE_KERNEL_MINOR_VERSION 36
#define FUSE_ROOT_ID 1
struct fuse_attr {
uint64_t ino;
@ -106,7 +106,15 @@ struct fuse_file_lock {
#define FUSE_SUBMOUNTS (1 << 27)
#define FUSE_HANDLE_KILLPRIV_V2 (1 << 28)
#define FUSE_SETXATTR_EXT (1 << 29)
#define FUSE_INIT_EXT (1 << 30)
#define FUSE_INIT_RESERVED (1 << 31)
#define FUSE_SECURITY_CTX (1ULL << 32)
#define FUSE_HAS_INODE_DAX (1ULL << 33)
#if FUSE_KERNEL_VERSION > 7 || FUSE_KERNEL_VERSION == 7 && FUSE_KERNEL_MINOR_VERSION >= 36
#define FUSE_PASSTHROUGH (1ULL << 63)
#else
#define FUSE_PASSTHROUGH (1 << 31)
#endif
#define CUSE_UNRESTRICTED_IOCTL (1 << 0)
#define FUSE_RELEASE_FLUSH (1 << 0)
#define FUSE_RELEASE_FLOCK_UNLOCK (1 << 1)
@ -127,6 +135,7 @@ struct fuse_file_lock {
#define FUSE_POLL_SCHEDULE_NOTIFY (1 << 0)
#define FUSE_FSYNC_FDATASYNC (1 << 0)
#define FUSE_ATTR_SUBMOUNT (1 << 0)
#define FUSE_ATTR_DAX (1 << 1)
#define FUSE_OPEN_KILL_SUIDGID (1 << 0)
#define FUSE_SETXATTR_ACL_KILL_SGID (1 << 0)
enum fuse_opcode {
@ -359,6 +368,8 @@ struct fuse_init_in {
uint32_t minor;
uint32_t max_readahead;
uint32_t flags;
uint32_t flags2;
uint32_t unused[11];
};
#define FUSE_COMPAT_INIT_OUT_SIZE 8
#define FUSE_COMPAT_22_INIT_OUT_SIZE 24
@ -373,7 +384,8 @@ struct fuse_init_out {
uint32_t time_gran;
uint16_t max_pages;
uint16_t map_alignment;
uint32_t unused[8];
uint32_t flags2;
uint32_t unused[7];
};
#define CUSE_INIT_INFO_MAX 4096
struct cuse_init_in {
@ -464,8 +476,9 @@ struct fuse_dirent {
uint32_t type;
char name[];
};
#define FUSE_REC_ALIGN(x) (((x) + sizeof(uint64_t) - 1) & ~(sizeof(uint64_t) - 1))
#define FUSE_NAME_OFFSET offsetof(struct fuse_dirent, name)
#define FUSE_DIRENT_ALIGN(x) (((x) + sizeof(uint64_t) - 1) & ~(sizeof(uint64_t) - 1))
#define FUSE_DIRENT_ALIGN(x) FUSE_REC_ALIGN(x)
#define FUSE_DIRENT_SIZE(d) FUSE_DIRENT_ALIGN(FUSE_NAME_OFFSET + (d)->namelen)
struct fuse_direntplus {
struct fuse_entry_out entry_out;
@ -512,7 +525,7 @@ struct fuse_notify_retrieve_in {
};
#define FUSE_DEV_IOC_MAGIC 229
#define FUSE_DEV_IOC_CLONE _IOR(FUSE_DEV_IOC_MAGIC, 0, uint32_t)
#define FUSE_DEV_IOC_PASSTHROUGH_OPEN _IOW(FUSE_DEV_IOC_MAGIC, 126, __u32)
#define FUSE_DEV_IOC_PASSTHROUGH_OPEN _IOW(FUSE_DEV_IOC_MAGIC, 126, uint32_t)
struct fuse_lseek_in {
uint64_t fh;
uint64_t offset;
@ -551,4 +564,12 @@ struct fuse_removemapping_one {
struct fuse_syncfs_in {
uint64_t padding;
};
struct fuse_secctx {
uint32_t size;
uint32_t padding;
};
struct fuse_secctx_header {
uint32_t size;
uint32_t nr_secctx;
};
#endif

1
libc/kernel/uapi/linux/idxd.h
View file

@ -37,6 +37,7 @@ enum idxd_scmd_stat {
IDXD_SCMD_WQ_NONE_CONFIGURED = 0x800d0000,
IDXD_SCMD_WQ_NO_SIZE = 0x800e0000,
IDXD_SCMD_WQ_NO_PRIV = 0x800f0000,
IDXD_SCMD_WQ_IRQ_ERR = 0x80100000,
};
#define IDXD_SCMD_SOFTERR_MASK 0x80000000
#define IDXD_SCMD_SOFTERR_SHIFT 16

2
libc/kernel/uapi/linux/if_link.h
View file

@ -150,6 +150,7 @@ enum {
IFLA_PROTO_DOWN_REASON,
IFLA_PARENT_DEV_NAME,
IFLA_PARENT_DEV_BUS_NAME,
IFLA_GRO_MAX_SIZE,
__IFLA_MAX
};
#define IFLA_MAX (__IFLA_MAX - 1)
@ -556,6 +557,7 @@ enum {
IFLA_BOND_TLB_DYNAMIC_LB,
IFLA_BOND_PEER_NOTIF_DELAY,
IFLA_BOND_AD_LACP_ACTIVE,
IFLA_BOND_MISSED_MAX,
__IFLA_BOND_MAX,
};
#define IFLA_BOND_MAX (__IFLA_BOND_MAX - 1)

4
libc/kernel/uapi/linux/input-event-codes.h
View file

@ -248,7 +248,8 @@
#define KEY_PAUSECD 201
#define KEY_PROG3 202
#define KEY_PROG4 203
#define KEY_DASHBOARD 204
#define KEY_ALL_APPLICATIONS 204
#define KEY_DASHBOARD KEY_ALL_APPLICATIONS
#define KEY_SUSPEND 205
#define KEY_CLOSE 206
#define KEY_PLAY 207
@ -549,6 +550,7 @@
#define KEY_ASSISTANT 0x247
#define KEY_KBD_LAYOUT_NEXT 0x248
#define KEY_EMOJI_PICKER 0x249
#define KEY_DICTATE 0x24a
#define KEY_BRIGHTNESS_MIN 0x250
#define KEY_BRIGHTNESS_MAX 0x251
#define KEY_KBDINPUTASSIST_PREV 0x260

3
libc/kernel/uapi/linux/io_uring.h
View file

@ -71,6 +71,7 @@ enum {
IOSQE_IO_HARDLINK_BIT,
IOSQE_ASYNC_BIT,
IOSQE_BUFFER_SELECT_BIT,
IOSQE_CQE_SKIP_SUCCESS_BIT,
};
#define IOSQE_FIXED_FILE (1U << IOSQE_FIXED_FILE_BIT)
#define IOSQE_IO_DRAIN (1U << IOSQE_IO_DRAIN_BIT)
@ -78,6 +79,7 @@ enum {
#define IOSQE_IO_HARDLINK (1U << IOSQE_IO_HARDLINK_BIT)
#define IOSQE_ASYNC (1U << IOSQE_ASYNC_BIT)
#define IOSQE_BUFFER_SELECT (1U << IOSQE_BUFFER_SELECT_BIT)
#define IOSQE_CQE_SKIP_SUCCESS (1U << IOSQE_CQE_SKIP_SUCCESS_BIT)
#define IORING_SETUP_IOPOLL (1U << 0)
#define IORING_SETUP_SQPOLL (1U << 1)
#define IORING_SETUP_SQ_AFF (1U << 2)
@ -206,6 +208,7 @@ struct io_uring_params {
#define IORING_FEAT_EXT_ARG (1U << 8)
#define IORING_FEAT_NATIVE_WORKERS (1U << 9)
#define IORING_FEAT_RSRC_TAGS (1U << 10)
#define IORING_FEAT_CQE_SKIP (1U << 11)
enum {
IORING_REGISTER_BUFFERS = 0,
IORING_UNREGISTER_BUFFERS = 1,

83
libc/kernel/uapi/linux/kfd_sysfs.h Normal file
View file

@ -0,0 +1,83 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef KFD_SYSFS_H_INCLUDED
#define KFD_SYSFS_H_INCLUDED
#define HSA_CAP_HOT_PLUGGABLE 0x00000001
#define HSA_CAP_ATS_PRESENT 0x00000002
#define HSA_CAP_SHARED_WITH_GRAPHICS 0x00000004
#define HSA_CAP_QUEUE_SIZE_POW2 0x00000008
#define HSA_CAP_QUEUE_SIZE_32BIT 0x00000010
#define HSA_CAP_QUEUE_IDLE_EVENT 0x00000020
#define HSA_CAP_VA_LIMIT 0x00000040
#define HSA_CAP_WATCH_POINTS_SUPPORTED 0x00000080
#define HSA_CAP_WATCH_POINTS_TOTALBITS_MASK 0x00000f00
#define HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT 8
#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK 0x00003000
#define HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT 12
#define HSA_CAP_DOORBELL_TYPE_PRE_1_0 0x0
#define HSA_CAP_DOORBELL_TYPE_1_0 0x1
#define HSA_CAP_DOORBELL_TYPE_2_0 0x2
#define HSA_CAP_AQL_QUEUE_DOUBLE_MAP 0x00004000
#define HSA_CAP_RESERVED_WAS_SRAM_EDCSUPPORTED 0x00080000
#define HSA_CAP_MEM_EDCSUPPORTED 0x00100000
#define HSA_CAP_RASEVENTNOTIFY 0x00200000
#define HSA_CAP_ASIC_REVISION_MASK 0x03c00000
#define HSA_CAP_ASIC_REVISION_SHIFT 22
#define HSA_CAP_SRAM_EDCSUPPORTED 0x04000000
#define HSA_CAP_SVMAPI_SUPPORTED 0x08000000
#define HSA_CAP_FLAGS_COHERENTHOSTACCESS 0x10000000
#define HSA_CAP_RESERVED 0xe00f8000
#define HSA_MEM_HEAP_TYPE_SYSTEM 0
#define HSA_MEM_HEAP_TYPE_FB_PUBLIC 1
#define HSA_MEM_HEAP_TYPE_FB_PRIVATE 2
#define HSA_MEM_HEAP_TYPE_GPU_GDS 3
#define HSA_MEM_HEAP_TYPE_GPU_LDS 4
#define HSA_MEM_HEAP_TYPE_GPU_SCRATCH 5
#define HSA_MEM_FLAGS_HOT_PLUGGABLE 0x00000001
#define HSA_MEM_FLAGS_NON_VOLATILE 0x00000002
#define HSA_MEM_FLAGS_RESERVED 0xfffffffc
#define HSA_CACHE_TYPE_DATA 0x00000001
#define HSA_CACHE_TYPE_INSTRUCTION 0x00000002
#define HSA_CACHE_TYPE_CPU 0x00000004
#define HSA_CACHE_TYPE_HSACU 0x00000008
#define HSA_CACHE_TYPE_RESERVED 0xfffffff0
#define HSA_IOLINK_TYPE_UNDEFINED 0
#define HSA_IOLINK_TYPE_HYPERTRANSPORT 1
#define HSA_IOLINK_TYPE_PCIEXPRESS 2
#define HSA_IOLINK_TYPE_AMBA 3
#define HSA_IOLINK_TYPE_MIPI 4
#define HSA_IOLINK_TYPE_QPI_1_1 5
#define HSA_IOLINK_TYPE_RESERVED1 6
#define HSA_IOLINK_TYPE_RESERVED2 7
#define HSA_IOLINK_TYPE_RAPID_IO 8
#define HSA_IOLINK_TYPE_INFINIBAND 9
#define HSA_IOLINK_TYPE_RESERVED3 10
#define HSA_IOLINK_TYPE_XGMI 11
#define HSA_IOLINK_TYPE_XGOP 12
#define HSA_IOLINK_TYPE_GZ 13
#define HSA_IOLINK_TYPE_ETHERNET_RDMA 14
#define HSA_IOLINK_TYPE_RDMA_OTHER 15
#define HSA_IOLINK_TYPE_OTHER 16
#define HSA_IOLINK_FLAGS_ENABLED (1 << 0)
#define HSA_IOLINK_FLAGS_NON_COHERENT (1 << 1)
#define HSA_IOLINK_FLAGS_NO_ATOMICS_32_BIT (1 << 2)
#define HSA_IOLINK_FLAGS_NO_ATOMICS_64_BIT (1 << 3)
#define HSA_IOLINK_FLAGS_NO_PEER_TO_PEER_DMA (1 << 4)
#define HSA_IOLINK_FLAGS_RESERVED 0xffffffe0
#endif

14
libc/kernel/uapi/linux/kvm.h
View file

@ -886,6 +886,10 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_EXIT_ON_EMULATION_FAILURE 204
#define KVM_CAP_ARM_MTE 205
#define KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM 206
#define KVM_CAP_VM_GPA_BITS 207
#define KVM_CAP_XSAVE2 208
#define KVM_CAP_SYS_ATTRIBUTES 209
#define KVM_CAP_PPC_AIL_MODE_3 210
#ifdef KVM_CAP_IRQ_ROUTING
struct kvm_irq_routing_irqchip {
__u32 irqchip;
@ -911,10 +915,17 @@ struct kvm_irq_routing_hv_sint {
__u32 vcpu;
__u32 sint;
};
struct kvm_irq_routing_xen_evtchn {
__u32 port;
__u32 vcpu;
__u32 priority;
};
#define KVM_IRQ_ROUTING_XEN_EVTCHN_PRIO_2LEVEL ((__u32) (- 1))
#define KVM_IRQ_ROUTING_IRQCHIP 1
#define KVM_IRQ_ROUTING_MSI 2
#define KVM_IRQ_ROUTING_S390_ADAPTER 3
#define KVM_IRQ_ROUTING_HV_SINT 4
#define KVM_IRQ_ROUTING_XEN_EVTCHN 5
struct kvm_irq_routing_entry {
__u32 gsi;
__u32 type;
@ -925,6 +936,7 @@ struct kvm_irq_routing_entry {
struct kvm_irq_routing_msi msi;
struct kvm_irq_routing_s390_adapter adapter;
struct kvm_irq_routing_hv_sint hv_sint;
struct kvm_irq_routing_xen_evtchn xen_evtchn;
__u32 pad[8];
} u;
};
@ -950,6 +962,7 @@ struct kvm_x86_mce {
#define KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL (1 << 1)
#define KVM_XEN_HVM_CONFIG_SHARED_INFO (1 << 2)
#define KVM_XEN_HVM_CONFIG_RUNSTATE (1 << 3)
#define KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL (1 << 4)
struct kvm_xen_hvm_config {
__u32 flags;
__u32 msr;
@ -1504,4 +1517,5 @@ struct kvm_stats_desc {
char name[];
};
#define KVM_GET_STATS_FD _IO(KVMIO, 0xce)
#define KVM_GET_XSAVE2 _IOR(KVMIO, 0xcf, struct kvm_xsave)
#endif

5
libc/kernel/uapi/linux/magic.h
View file

@ -22,6 +22,7 @@
#define AFFS_SUPER_MAGIC 0xadff
#define AFS_SUPER_MAGIC 0x5346414F
#define AUTOFS_SUPER_MAGIC 0x0187
#define CEPH_SUPER_MAGIC 0x00c36400
#define CODA_SUPER_MAGIC 0x73757245
#define CRAMFS_MAGIC 0x28cd3d45
#define CRAMFS_MAGIC_WEND 0x453dcd28
@ -51,12 +52,14 @@
#define EFIVARFS_MAGIC 0xde5e81e4
#define HOSTFS_SUPER_MAGIC 0x00c0ffee
#define OVERLAYFS_SUPER_MAGIC 0x794c7630
#define FUSE_SUPER_MAGIC 0x65735546
#define MINIX_SUPER_MAGIC 0x137F
#define MINIX_SUPER_MAGIC2 0x138F
#define MINIX2_SUPER_MAGIC 0x2468
#define MINIX2_SUPER_MAGIC2 0x2478
#define MINIX3_SUPER_MAGIC 0x4d5a
#define MSDOS_SUPER_MAGIC 0x4d44
#define EXFAT_SUPER_MAGIC 0x2011BAB0
#define NCP_SUPER_MAGIC 0x564c
#define NFS_SUPER_MAGIC 0x6969
#define OCFS2_SUPER_MAGIC 0x7461636f
@ -69,6 +72,8 @@
#define REISER2FS_SUPER_MAGIC_STRING "ReIsEr2Fs"
#define REISER2FS_JR_SUPER_MAGIC_STRING "ReIsEr3Fs"
#define SMB_SUPER_MAGIC 0x517B
#define CIFS_SUPER_MAGIC 0xFF534D42
#define SMB2_SUPER_MAGIC 0xFE534D42
#define CGROUP_SUPER_MAGIC 0x27e0eb
#define CGROUP2_SUPER_MAGIC 0x63677270
#define RDTGROUP_SUPER_MAGIC 0x7655821

1
libc/kernel/uapi/linux/module.h
View file

@ -20,4 +20,5 @@
#define _UAPI_LINUX_MODULE_H
#define MODULE_INIT_IGNORE_MODVERSIONS 1
#define MODULE_INIT_IGNORE_VERMAGIC 2
#define MODULE_INIT_COMPRESSED_FILE 4
#endif

6
libc/kernel/uapi/linux/net_tstamp.h
View file

@ -50,6 +50,12 @@ struct hwtstamp_config {
int tx_type;
int rx_filter;
};
enum hwtstamp_flags {
HWTSTAMP_FLAG_BONDED_PHC_INDEX = (1 << 0),
#define HWTSTAMP_FLAG_BONDED_PHC_INDEX HWTSTAMP_FLAG_BONDED_PHC_INDEX
HWTSTAMP_FLAG_LAST = HWTSTAMP_FLAG_BONDED_PHC_INDEX,
HWTSTAMP_FLAG_MASK = (HWTSTAMP_FLAG_LAST - 1) | HWTSTAMP_FLAG_LAST
};
enum hwtstamp_tx_types {
HWTSTAMP_TX_OFF,
HWTSTAMP_TX_ON,

11
libc/kernel/uapi/linux/nl80211.h
View file

@ -184,6 +184,7 @@ enum nl80211_commands {
NL80211_CMD_COLOR_CHANGE_ABORTED,
NL80211_CMD_COLOR_CHANGE_COMPLETED,
NL80211_CMD_SET_FILS_AAD,
NL80211_CMD_ASSOC_COMEBACK,
__NL80211_CMD_AFTER_LAST,
NL80211_CMD_MAX = __NL80211_CMD_AFTER_LAST - 1
};
@ -508,6 +509,8 @@ enum nl80211_attrs {
NL80211_ATTR_COLOR_CHANGE_ELEMS,
NL80211_ATTR_MBSSID_CONFIG,
NL80211_ATTR_MBSSID_ELEMS,
NL80211_ATTR_RADAR_BACKGROUND,
NL80211_ATTR_AP_SETTINGS_FLAGS,
__NL80211_ATTR_AFTER_LAST,
NUM_NL80211_ATTR = __NL80211_ATTR_AFTER_LAST,
NL80211_ATTR_MAX = __NL80211_ATTR_AFTER_LAST - 1
@ -1373,6 +1376,9 @@ enum nl80211_tdls_operation {
NL80211_TDLS_ENABLE_LINK,
NL80211_TDLS_DISABLE_LINK,
};
enum nl80211_ap_sme_features {
NL80211_AP_SME_SA_QUERY_OFFLOAD = 1 << 0,
};
enum nl80211_feature_flags {
NL80211_FEATURE_SK_TX_STATUS = 1 << 0,
NL80211_FEATURE_HT_IBSS = 1 << 1,
@ -1468,6 +1474,7 @@ enum nl80211_ext_feature_index {
NL80211_EXT_FEATURE_PROT_RANGE_NEGO_AND_MEASURE,
NL80211_EXT_FEATURE_BSS_COLOR,
NL80211_EXT_FEATURE_FILS_CRYPTO_OFFLOAD,
NL80211_EXT_FEATURE_RADAR_BACKGROUND,
NUM_NL80211_EXT_FEATURES,
MAX_NL80211_EXT_FEATURES = NUM_NL80211_EXT_FEATURES - 1
};
@ -1859,4 +1866,8 @@ enum nl80211_mbssid_config_attributes {
__NL80211_MBSSID_CONFIG_ATTR_LAST,
NL80211_MBSSID_CONFIG_ATTR_MAX = __NL80211_MBSSID_CONFIG_ATTR_LAST - 1,
};
enum nl80211_ap_settings_flags {
NL80211_AP_SETTINGS_EXTERNAL_AUTH_SUPPORT = 1 << 0,
NL80211_AP_SETTINGS_SA_QUERY_OFFLOAD_SUPPORT = 1 << 1,
};
#endif

136
libc/kernel/uapi/linux/pci_regs.h
View file

@ -245,21 +245,21 @@
#define PCI_SID_ESR_NSLOTS 0x1f
#define PCI_SID_ESR_FIC 0x20
#define PCI_SID_CHASSIS_NR 3
#define PCI_MSI_FLAGS 2
#define PCI_MSI_FLAGS 0x02
#define PCI_MSI_FLAGS_ENABLE 0x0001
#define PCI_MSI_FLAGS_QMASK 0x000e
#define PCI_MSI_FLAGS_QSIZE 0x0070
#define PCI_MSI_FLAGS_64BIT 0x0080
#define PCI_MSI_FLAGS_MASKBIT 0x0100
#define PCI_MSI_RFU 3
#define PCI_MSI_ADDRESS_LO 4
#define PCI_MSI_ADDRESS_HI 8
#define PCI_MSI_DATA_32 8
#define PCI_MSI_MASK_32 12
#define PCI_MSI_PENDING_32 16
#define PCI_MSI_DATA_64 12
#define PCI_MSI_MASK_64 16
#define PCI_MSI_PENDING_64 20
#define PCI_MSI_ADDRESS_LO 0x04
#define PCI_MSI_ADDRESS_HI 0x08
#define PCI_MSI_DATA_32 0x08
#define PCI_MSI_MASK_32 0x0c
#define PCI_MSI_PENDING_32 0x10
#define PCI_MSI_DATA_64 0x0c
#define PCI_MSI_MASK_64 0x10
#define PCI_MSI_PENDING_64 0x14
#define PCI_MSIX_FLAGS 2
#define PCI_MSIX_FLAGS_QSIZE 0x07FF
#define PCI_MSIX_FLAGS_MASKALL 0x4000
@ -273,10 +273,10 @@
#define PCI_MSIX_FLAGS_BIRMASK PCI_MSIX_PBA_BIR
#define PCI_CAP_MSIX_SIZEOF 12
#define PCI_MSIX_ENTRY_SIZE 16
#define PCI_MSIX_ENTRY_LOWER_ADDR 0
#define PCI_MSIX_ENTRY_UPPER_ADDR 4
#define PCI_MSIX_ENTRY_DATA 8
#define PCI_MSIX_ENTRY_VECTOR_CTRL 12
#define PCI_MSIX_ENTRY_LOWER_ADDR 0x0
#define PCI_MSIX_ENTRY_UPPER_ADDR 0x4
#define PCI_MSIX_ENTRY_DATA 0x8
#define PCI_MSIX_ENTRY_VECTOR_CTRL 0xc
#define PCI_MSIX_ENTRY_CTRL_MASKBIT 0x00000001
#define PCI_CHSWP_CSR 2
#define PCI_CHSWP_DHA 0x01
@ -379,7 +379,7 @@
#define PCI_X_BRIDGE_STATUS 4
#define PCI_SSVID_VENDOR_ID 4
#define PCI_SSVID_DEVICE_ID 6
#define PCI_EXP_FLAGS 2
#define PCI_EXP_FLAGS 0x02
#define PCI_EXP_FLAGS_VERS 0x000f
#define PCI_EXP_FLAGS_TYPE 0x00f0
#define PCI_EXP_TYPE_ENDPOINT 0x0
@ -393,7 +393,7 @@
#define PCI_EXP_TYPE_RC_EC 0xa
#define PCI_EXP_FLAGS_SLOT 0x0100
#define PCI_EXP_FLAGS_IRQ 0x3e00
#define PCI_EXP_DEVCAP 4
#define PCI_EXP_DEVCAP 0x04
#define PCI_EXP_DEVCAP_PAYLOAD 0x00000007
#define PCI_EXP_DEVCAP_PHANTOM 0x00000018
#define PCI_EXP_DEVCAP_EXT_TAG 0x00000020
@ -406,7 +406,7 @@
#define PCI_EXP_DEVCAP_PWR_VAL 0x03fc0000
#define PCI_EXP_DEVCAP_PWR_SCL 0x0c000000
#define PCI_EXP_DEVCAP_FLR 0x10000000
#define PCI_EXP_DEVCTL 8
#define PCI_EXP_DEVCTL 0x08
#define PCI_EXP_DEVCTL_CERE 0x0001
#define PCI_EXP_DEVCTL_NFERE 0x0002
#define PCI_EXP_DEVCTL_FERE 0x0004
@ -431,7 +431,7 @@
#define PCI_EXP_DEVCTL_READRQ_2048B 0x4000
#define PCI_EXP_DEVCTL_READRQ_4096B 0x5000
#define PCI_EXP_DEVCTL_BCR_FLR 0x8000
#define PCI_EXP_DEVSTA 10
#define PCI_EXP_DEVSTA 0x0a
#define PCI_EXP_DEVSTA_CED 0x0001
#define PCI_EXP_DEVSTA_NFED 0x0002
#define PCI_EXP_DEVSTA_FED 0x0004
@ -439,7 +439,7 @@
#define PCI_EXP_DEVSTA_AUXPD 0x0010
#define PCI_EXP_DEVSTA_TRPND 0x0020
#define PCI_CAP_EXP_RC_ENDPOINT_SIZEOF_V1 12
#define PCI_EXP_LNKCAP 12
#define PCI_EXP_LNKCAP 0x0c
#define PCI_EXP_LNKCAP_SLS 0x0000000f
#define PCI_EXP_LNKCAP_SLS_2_5GB 0x00000001
#define PCI_EXP_LNKCAP_SLS_5_0GB 0x00000002
@ -458,7 +458,7 @@
#define PCI_EXP_LNKCAP_DLLLARC 0x00100000
#define PCI_EXP_LNKCAP_LBNC 0x00200000
#define PCI_EXP_LNKCAP_PN 0xff000000
#define PCI_EXP_LNKCTL 16
#define PCI_EXP_LNKCTL 0x10
#define PCI_EXP_LNKCTL_ASPMC 0x0003
#define PCI_EXP_LNKCTL_ASPM_L0S 0x0001
#define PCI_EXP_LNKCTL_ASPM_L1 0x0002
@ -471,7 +471,7 @@
#define PCI_EXP_LNKCTL_HAWD 0x0200
#define PCI_EXP_LNKCTL_LBMIE 0x0400
#define PCI_EXP_LNKCTL_LABIE 0x0800
#define PCI_EXP_LNKSTA 18
#define PCI_EXP_LNKSTA 0x12
#define PCI_EXP_LNKSTA_CLS 0x000f
#define PCI_EXP_LNKSTA_CLS_2_5GB 0x0001
#define PCI_EXP_LNKSTA_CLS_5_0GB 0x0002
@ -491,7 +491,7 @@
#define PCI_EXP_LNKSTA_LBMS 0x4000
#define PCI_EXP_LNKSTA_LABS 0x8000
#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V1 20
#define PCI_EXP_SLTCAP 20
#define PCI_EXP_SLTCAP 0x14
#define PCI_EXP_SLTCAP_ABP 0x00000001
#define PCI_EXP_SLTCAP_PCP 0x00000002
#define PCI_EXP_SLTCAP_MRLSP 0x00000004
@ -504,7 +504,7 @@
#define PCI_EXP_SLTCAP_EIP 0x00020000
#define PCI_EXP_SLTCAP_NCCS 0x00040000
#define PCI_EXP_SLTCAP_PSN 0xfff80000
#define PCI_EXP_SLTCTL 24
#define PCI_EXP_SLTCTL 0x18
#define PCI_EXP_SLTCTL_ABPE 0x0001
#define PCI_EXP_SLTCTL_PFDE 0x0002
#define PCI_EXP_SLTCTL_MRLSCE 0x0004
@ -526,7 +526,7 @@
#define PCI_EXP_SLTCTL_EIC 0x0800
#define PCI_EXP_SLTCTL_DLLSCE 0x1000
#define PCI_EXP_SLTCTL_IBPD_DISABLE 0x4000
#define PCI_EXP_SLTSTA 26
#define PCI_EXP_SLTSTA 0x1a
#define PCI_EXP_SLTSTA_ABP 0x0001
#define PCI_EXP_SLTSTA_PFD 0x0002
#define PCI_EXP_SLTSTA_MRLSC 0x0004
@ -536,18 +536,18 @@
#define PCI_EXP_SLTSTA_PDS 0x0040
#define PCI_EXP_SLTSTA_EIS 0x0080
#define PCI_EXP_SLTSTA_DLLSC 0x0100
#define PCI_EXP_RTCTL 28
#define PCI_EXP_RTCTL 0x1c
#define PCI_EXP_RTCTL_SECEE 0x0001
#define PCI_EXP_RTCTL_SENFEE 0x0002
#define PCI_EXP_RTCTL_SEFEE 0x0004
#define PCI_EXP_RTCTL_PMEIE 0x0008
#define PCI_EXP_RTCTL_CRSSVE 0x0010
#define PCI_EXP_RTCAP 30
#define PCI_EXP_RTCAP 0x1e
#define PCI_EXP_RTCAP_CRSVIS 0x0001
#define PCI_EXP_RTSTA 32
#define PCI_EXP_RTSTA 0x20
#define PCI_EXP_RTSTA_PME 0x00010000
#define PCI_EXP_RTSTA_PENDING 0x00020000
#define PCI_EXP_DEVCAP2 36
#define PCI_EXP_DEVCAP2 0x24
#define PCI_EXP_DEVCAP2_COMP_TMOUT_DIS 0x00000010
#define PCI_EXP_DEVCAP2_ARI 0x00000020
#define PCI_EXP_DEVCAP2_ATOMIC_ROUTE 0x00000040
@ -559,7 +559,7 @@
#define PCI_EXP_DEVCAP2_OBFF_MSG 0x00040000
#define PCI_EXP_DEVCAP2_OBFF_WAKE 0x00080000
#define PCI_EXP_DEVCAP2_EE_PREFIX 0x00200000
#define PCI_EXP_DEVCTL2 40
#define PCI_EXP_DEVCTL2 0x28
#define PCI_EXP_DEVCTL2_COMP_TIMEOUT 0x000f
#define PCI_EXP_DEVCTL2_COMP_TMOUT_DIS 0x0010
#define PCI_EXP_DEVCTL2_ARI 0x0020
@ -571,9 +571,9 @@
#define PCI_EXP_DEVCTL2_OBFF_MSGA_EN 0x2000
#define PCI_EXP_DEVCTL2_OBFF_MSGB_EN 0x4000
#define PCI_EXP_DEVCTL2_OBFF_WAKE_EN 0x6000
#define PCI_EXP_DEVSTA2 42
#define PCI_CAP_EXP_RC_ENDPOINT_SIZEOF_V2 44
#define PCI_EXP_LNKCAP2 44
#define PCI_EXP_DEVSTA2 0x2a
#define PCI_CAP_EXP_RC_ENDPOINT_SIZEOF_V2 0x2c
#define PCI_EXP_LNKCAP2 0x2c
#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x00000002
#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x00000004
#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x00000008
@ -581,7 +581,7 @@
#define PCI_EXP_LNKCAP2_SLS_32_0GB 0x00000020
#define PCI_EXP_LNKCAP2_SLS_64_0GB 0x00000040
#define PCI_EXP_LNKCAP2_CROSSLINK 0x00000100
#define PCI_EXP_LNKCTL2 48
#define PCI_EXP_LNKCTL2 0x30
#define PCI_EXP_LNKCTL2_TLS 0x000f
#define PCI_EXP_LNKCTL2_TLS_2_5GT 0x0001
#define PCI_EXP_LNKCTL2_TLS_5_0GT 0x0002
@ -592,12 +592,12 @@
#define PCI_EXP_LNKCTL2_ENTER_COMP 0x0010
#define PCI_EXP_LNKCTL2_TX_MARGIN 0x0380
#define PCI_EXP_LNKCTL2_HASD 0x0020
#define PCI_EXP_LNKSTA2 50
#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 52
#define PCI_EXP_SLTCAP2 52
#define PCI_EXP_LNKSTA2 0x32
#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 0x32
#define PCI_EXP_SLTCAP2 0x34
#define PCI_EXP_SLTCAP2_IBPD 0x00000001
#define PCI_EXP_SLTCTL2 56
#define PCI_EXP_SLTSTA2 58
#define PCI_EXP_SLTCTL2 0x38
#define PCI_EXP_SLTSTA2 0x3a
#define PCI_EXT_CAP_ID(header) (header & 0x0000ffff)
#define PCI_EXT_CAP_VER(header) ((header >> 16) & 0xf)
#define PCI_EXT_CAP_NEXT(header) ((header >> 20) & 0xffc)
@ -637,7 +637,7 @@
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PL_16GT
#define PCI_EXT_CAP_DSN_SIZEOF 12
#define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40
#define PCI_ERR_UNCOR_STATUS 4
#define PCI_ERR_UNCOR_STATUS 0x04
#define PCI_ERR_UNC_UND 0x00000001
#define PCI_ERR_UNC_DLP 0x00000010
#define PCI_ERR_UNC_SURPDN 0x00000020
@ -655,9 +655,9 @@
#define PCI_ERR_UNC_MCBTLP 0x00800000
#define PCI_ERR_UNC_ATOMEG 0x01000000
#define PCI_ERR_UNC_TLPPRE 0x02000000
#define PCI_ERR_UNCOR_MASK 8
#define PCI_ERR_UNCOR_SEVER 12
#define PCI_ERR_COR_STATUS 16
#define PCI_ERR_UNCOR_MASK 0x08
#define PCI_ERR_UNCOR_SEVER 0x0c
#define PCI_ERR_COR_STATUS 0x10
#define PCI_ERR_COR_RCVR 0x00000001
#define PCI_ERR_COR_BAD_TLP 0x00000040
#define PCI_ERR_COR_BAD_DLLP 0x00000080
@ -666,19 +666,19 @@
#define PCI_ERR_COR_ADV_NFAT 0x00002000
#define PCI_ERR_COR_INTERNAL 0x00004000
#define PCI_ERR_COR_LOG_OVER 0x00008000
#define PCI_ERR_COR_MASK 20
#define PCI_ERR_CAP 24
#define PCI_ERR_CAP_FEP(x) ((x) & 31)
#define PCI_ERR_COR_MASK 0x14
#define PCI_ERR_CAP 0x18
#define PCI_ERR_CAP_FEP(x) ((x) & 0x1f)
#define PCI_ERR_CAP_ECRC_GENC 0x00000020
#define PCI_ERR_CAP_ECRC_GENE 0x00000040
#define PCI_ERR_CAP_ECRC_CHKC 0x00000080
#define PCI_ERR_CAP_ECRC_CHKE 0x00000100
#define PCI_ERR_HEADER_LOG 28
#define PCI_ERR_ROOT_COMMAND 44
#define PCI_ERR_HEADER_LOG 0x1c
#define PCI_ERR_ROOT_COMMAND 0x2c
#define PCI_ERR_ROOT_CMD_COR_EN 0x00000001
#define PCI_ERR_ROOT_CMD_NONFATAL_EN 0x00000002
#define PCI_ERR_ROOT_CMD_FATAL_EN 0x00000004
#define PCI_ERR_ROOT_STATUS 48
#define PCI_ERR_ROOT_STATUS 0x30
#define PCI_ERR_ROOT_COR_RCV 0x00000001
#define PCI_ERR_ROOT_MULTI_COR_RCV 0x00000002
#define PCI_ERR_ROOT_UNCOR_RCV 0x00000004
@ -687,48 +687,48 @@
#define PCI_ERR_ROOT_NONFATAL_RCV 0x00000020
#define PCI_ERR_ROOT_FATAL_RCV 0x00000040
#define PCI_ERR_ROOT_AER_IRQ 0xf8000000
#define PCI_ERR_ROOT_ERR_SRC 52
#define PCI_VC_PORT_CAP1 4
#define PCI_ERR_ROOT_ERR_SRC 0x34
#define PCI_VC_PORT_CAP1 0x04
#define PCI_VC_CAP1_EVCC 0x00000007
#define PCI_VC_CAP1_LPEVCC 0x00000070
#define PCI_VC_CAP1_ARB_SIZE 0x00000c00
#define PCI_VC_PORT_CAP2 8
#define PCI_VC_PORT_CAP2 0x08
#define PCI_VC_CAP2_32_PHASE 0x00000002
#define PCI_VC_CAP2_64_PHASE 0x00000004
#define PCI_VC_CAP2_128_PHASE 0x00000008
#define PCI_VC_CAP2_ARB_OFF 0xff000000
#define PCI_VC_PORT_CTRL 12
#define PCI_VC_PORT_CTRL 0x0c
#define PCI_VC_PORT_CTRL_LOAD_TABLE 0x00000001
#define PCI_VC_PORT_STATUS 14
#define PCI_VC_PORT_STATUS 0x0e
#define PCI_VC_PORT_STATUS_TABLE 0x00000001
#define PCI_VC_RES_CAP 16
#define PCI_VC_RES_CAP 0x10
#define PCI_VC_RES_CAP_32_PHASE 0x00000002
#define PCI_VC_RES_CAP_64_PHASE 0x00000004
#define PCI_VC_RES_CAP_128_PHASE 0x00000008
#define PCI_VC_RES_CAP_128_PHASE_TB 0x00000010
#define PCI_VC_RES_CAP_256_PHASE 0x00000020
#define PCI_VC_RES_CAP_ARB_OFF 0xff000000
#define PCI_VC_RES_CTRL 20
#define PCI_VC_RES_CTRL 0x14
#define PCI_VC_RES_CTRL_LOAD_TABLE 0x00010000
#define PCI_VC_RES_CTRL_ARB_SELECT 0x000e0000
#define PCI_VC_RES_CTRL_ID 0x07000000
#define PCI_VC_RES_CTRL_ENABLE 0x80000000
#define PCI_VC_RES_STATUS 26
#define PCI_VC_RES_STATUS 0x1a
#define PCI_VC_RES_STATUS_TABLE 0x00000001
#define PCI_VC_RES_STATUS_NEGO 0x00000002
#define PCI_CAP_VC_BASE_SIZEOF 0x10
#define PCI_CAP_VC_PER_VC_SIZEOF 0x0C
#define PCI_PWR_DSR 4
#define PCI_PWR_DATA 8
#define PCI_CAP_VC_PER_VC_SIZEOF 0x0c
#define PCI_PWR_DSR 0x04
#define PCI_PWR_DATA 0x08
#define PCI_PWR_DATA_BASE(x) ((x) & 0xff)
#define PCI_PWR_DATA_SCALE(x) (((x) >> 8) & 3)
#define PCI_PWR_DATA_PM_SUB(x) (((x) >> 10) & 7)
#define PCI_PWR_DATA_PM_STATE(x) (((x) >> 13) & 3)
#define PCI_PWR_DATA_TYPE(x) (((x) >> 15) & 7)
#define PCI_PWR_DATA_RAIL(x) (((x) >> 18) & 7)
#define PCI_PWR_CAP 12
#define PCI_PWR_CAP 0x0c
#define PCI_PWR_CAP_BUDGET(x) ((x) & 1)
#define PCI_EXT_CAP_PWR_SIZEOF 16
#define PCI_EXT_CAP_PWR_SIZEOF 0x10
#define PCI_RCEC_RCIEP_BITMAP 4
#define PCI_RCEC_BUSN 8
#define PCI_RCEC_BUSN_REG_VER 0x02
@ -828,7 +828,7 @@
#define PCI_SRIOV_VFM_MI 0x1
#define PCI_SRIOV_VFM_MO 0x2
#define PCI_SRIOV_VFM_AV 0x3
#define PCI_EXT_CAP_SRIOV_SIZEOF 64
#define PCI_EXT_CAP_SRIOV_SIZEOF 0x40
#define PCI_LTR_MAX_SNOOP_LAT 0x4
#define PCI_LTR_MAX_NOSNOOP_LAT 0x6
#define PCI_LTR_VALUE_MASK 0x000003ff
@ -871,25 +871,25 @@
#define PCI_TPH_LOC_MSIX 0x400
#define PCI_TPH_CAP_ST_MASK 0x07FF0000
#define PCI_TPH_CAP_ST_SHIFT 16
#define PCI_TPH_BASE_SIZEOF 12
#define PCI_EXP_DPC_CAP 4
#define PCI_TPH_BASE_SIZEOF 0xc
#define PCI_EXP_DPC_CAP 0x04
#define PCI_EXP_DPC_IRQ 0x001F
#define PCI_EXP_DPC_CAP_RP_EXT 0x0020
#define PCI_EXP_DPC_CAP_POISONED_TLP 0x0040
#define PCI_EXP_DPC_CAP_SW_TRIGGER 0x0080
#define PCI_EXP_DPC_RP_PIO_LOG_SIZE 0x0F00
#define PCI_EXP_DPC_CAP_DL_ACTIVE 0x1000
#define PCI_EXP_DPC_CTL 6
#define PCI_EXP_DPC_CTL 0x06
#define PCI_EXP_DPC_CTL_EN_FATAL 0x0001
#define PCI_EXP_DPC_CTL_EN_NONFATAL 0x0002
#define PCI_EXP_DPC_CTL_INT_EN 0x0008
#define PCI_EXP_DPC_STATUS 8
#define PCI_EXP_DPC_STATUS 0x08
#define PCI_EXP_DPC_STATUS_TRIGGER 0x0001
#define PCI_EXP_DPC_STATUS_TRIGGER_RSN 0x0006
#define PCI_EXP_DPC_STATUS_INTERRUPT 0x0008
#define PCI_EXP_DPC_RP_BUSY 0x0010
#define PCI_EXP_DPC_STATUS_TRIGGER_RSN_EXT 0x0060
#define PCI_EXP_DPC_SOURCE_ID 10
#define PCI_EXP_DPC_SOURCE_ID 0x0A
#define PCI_EXP_DPC_RP_PIO_STATUS 0x0C
#define PCI_EXP_DPC_RP_PIO_MASK 0x10
#define PCI_EXP_DPC_RP_PIO_SEVERITY 0x14
@ -926,7 +926,11 @@
#define PCI_L1SS_CTL1_LTR_L12_TH_SCALE 0xe0000000
#define PCI_L1SS_CTL2 0x0c
#define PCI_DVSEC_HEADER1 0x4
#define PCI_DVSEC_HEADER1_VID(x) ((x) & 0xffff)
#define PCI_DVSEC_HEADER1_REV(x) (((x) >> 16) & 0xf)
#define PCI_DVSEC_HEADER1_LEN(x) (((x) >> 20) & 0xfff)
#define PCI_DVSEC_HEADER2 0x8
#define PCI_DVSEC_HEADER2_ID(x) ((x) & 0xffff)
#define PCI_DLF_CAP 0x04
#define PCI_DLF_EXCHANGE_ENABLE 0x80000000
#define PCI_PL_16GT_LE_CTRL 0x20

3
libc/kernel/uapi/linux/perf_event.h
View file

@ -462,6 +462,9 @@ union perf_mem_data_src {
#define PERF_MEM_BLK_ADDR 0x04
#define PERF_MEM_BLK_SHIFT 40
#define PERF_MEM_HOPS_0 0x01
#define PERF_MEM_HOPS_1 0x02
#define PERF_MEM_HOPS_2 0x03
#define PERF_MEM_HOPS_3 0x04
#define PERF_MEM_HOPS_SHIFT 43
#define PERF_MEM_S(a,s) (((__u64) PERF_MEM_ ##a ##_ ##s) << PERF_MEM_ ##a ##_SHIFT)
struct perf_branch_entry {

2
libc/kernel/uapi/linux/pfkeyv2.h
View file

@ -243,6 +243,7 @@ struct sadb_x_filter {
#define SADB_X_AALG_SHA2_512HMAC 7
#define SADB_X_AALG_RIPEMD160HMAC 8
#define SADB_X_AALG_AES_XCBC_MAC 9
#define SADB_X_AALG_SM3_256HMAC 10
#define SADB_X_AALG_NULL 251
#define SADB_AALG_MAX 251
#define SADB_EALG_NONE 0
@ -261,6 +262,7 @@ struct sadb_x_filter {
#define SADB_X_EALG_AES_GCM_ICV16 20
#define SADB_X_EALG_CAMELLIACBC 22
#define SADB_X_EALG_NULL_AES_GMAC 23
#define SADB_X_EALG_SM4CBC 24
#define SADB_EALG_MAX 253
#define SADB_X_EALG_SERPENTCBC 252
#define SADB_X_EALG_TWOFISHCBC 253

95
libc/kernel/uapi/linux/pfrut.h Normal file
View file

@ -0,0 +1,95 @@
/****************************************************************************
****************************************************************************
***
*** This header was automatically generated from a Linux kernel header
*** of the same name, to make information necessary for userspace to
*** call into the kernel available to libc. It contains only constants,
*** structures, and macros generated from the original header, and thus,
*** contains no copyrightable information.
***
*** To edit the content of this header, modify the corresponding
*** source file (e.g. under external/kernel-headers/original/) then
*** run bionic/libc/kernel/tools/update_all.py
***
*** Any manual change here will be lost the next time this script will
*** be run. You've been warned!
***
****************************************************************************
****************************************************************************/
#ifndef __PFRUT_H__
#define __PFRUT_H__
#include <linux/ioctl.h>
#include <linux/types.h>
#define PFRUT_IOCTL_MAGIC 0xEE
#define PFRU_IOC_SET_REV _IOW(PFRUT_IOCTL_MAGIC, 0x01, unsigned int)
#define PFRU_IOC_STAGE _IOW(PFRUT_IOCTL_MAGIC, 0x02, unsigned int)
#define PFRU_IOC_ACTIVATE _IOW(PFRUT_IOCTL_MAGIC, 0x03, unsigned int)
#define PFRU_IOC_STAGE_ACTIVATE _IOW(PFRUT_IOCTL_MAGIC, 0x04, unsigned int)
#define PFRU_IOC_QUERY_CAP _IOR(PFRUT_IOCTL_MAGIC, 0x05, struct pfru_update_cap_info)
struct pfru_payload_hdr {
__u32 sig;
__u32 hdr_version;
__u32 hdr_size;
__u32 hw_ver;
__u32 rt_ver;
__u8 platform_id[16];
};
enum pfru_dsm_status {
DSM_SUCCEED = 0,
DSM_FUNC_NOT_SUPPORT = 1,
DSM_INVAL_INPUT = 2,
DSM_HARDWARE_ERR = 3,
DSM_RETRY_SUGGESTED = 4,
DSM_UNKNOWN = 5,
DSM_FUNC_SPEC_ERR = 6,
};
struct pfru_update_cap_info {
__u32 status;
__u32 update_cap;
__u8 code_type[16];
__u32 fw_version;
__u32 code_rt_version;
__u8 drv_type[16];
__u32 drv_rt_version;
__u32 drv_svn;
__u8 platform_id[16];
__u8 oem_id[16];
__u32 oem_info_len;
};
struct pfru_com_buf_info {
__u32 status;
__u32 ext_status;
__u64 addr_lo;
__u64 addr_hi;
__u32 buf_size;
};
struct pfru_updated_result {
__u32 status;
__u32 ext_status;
__u64 low_auth_time;
__u64 high_auth_time;
__u64 low_exec_time;
__u64 high_exec_time;
};
struct pfrt_log_data_info {
__u32 status;
__u32 ext_status;
__u64 chunk1_addr_lo;
__u64 chunk1_addr_hi;
__u64 chunk2_addr_lo;
__u64 chunk2_addr_hi;
__u32 max_data_size;
__u32 chunk1_size;
__u32 chunk2_size;
__u32 rollover_cnt;
__u32 reset_cnt;
};
struct pfrt_log_info {
__u32 log_level;
__u32 log_type;
__u32 log_revid;
};
#define PFRT_LOG_IOC_SET_INFO _IOW(PFRUT_IOCTL_MAGIC, 0x06, struct pfrt_log_info)
#define PFRT_LOG_IOC_GET_INFO _IOR(PFRUT_IOCTL_MAGIC, 0x07, struct pfrt_log_info)
#define PFRT_LOG_IOC_GET_DATA_INFO _IOR(PFRUT_IOCTL_MAGIC, 0x08, struct pfrt_log_data_info)
#endif

5
libc/kernel/uapi/linux/pkt_cls.h
View file

@ -32,9 +32,12 @@ enum {
TCA_ACT_FLAGS,
TCA_ACT_HW_STATS,
TCA_ACT_USED_HW_STATS,
TCA_ACT_IN_HW_COUNT,
__TCA_ACT_MAX
};
#define TCA_ACT_FLAGS_NO_PERCPU_STATS 1
#define TCA_ACT_FLAGS_NO_PERCPU_STATS (1 << 0)
#define TCA_ACT_FLAGS_SKIP_HW (1 << 1)
#define TCA_ACT_FLAGS_SKIP_SW (1 << 2)
#define TCA_ACT_HW_STATS_IMMEDIATE (1 << 0)
#define TCA_ACT_HW_STATS_DELAYED (1 << 1)
#define TCA_ACT_MAX __TCA_ACT_MAX

2
libc/kernel/uapi/linux/rtnetlink.h
View file

@ -559,6 +559,8 @@ enum rtnetlink_groups {
#define RTNLGRP_NEXTHOP RTNLGRP_NEXTHOP
RTNLGRP_BRVLAN,
#define RTNLGRP_BRVLAN RTNLGRP_BRVLAN
RTNLGRP_MCTP_IFADDR,
#define RTNLGRP_MCTP_IFADDR RTNLGRP_MCTP_IFADDR
__RTNLGRP_MAX
};
#define RTNLGRP_MAX (__RTNLGRP_MAX - 1)

2
libc/kernel/uapi/linux/smc.h
View file

@ -107,6 +107,8 @@ enum {
SMC_NLA_LGR_R_CONNS_NUM,
SMC_NLA_LGR_R_V2_COMMON,
SMC_NLA_LGR_R_V2,
SMC_NLA_LGR_R_NET_COOKIE,
SMC_NLA_LGR_R_PAD,
__SMC_NLA_LGR_R_MAX,
SMC_NLA_LGR_R_MAX = __SMC_NLA_LGR_R_MAX - 1
};

4
libc/kernel/uapi/linux/taskstats.h
View file

@ -19,7 +19,7 @@
#ifndef _LINUX_TASKSTATS_H
#define _LINUX_TASKSTATS_H
#include <linux/types.h>
#define TASKSTATS_VERSION 10
#define TASKSTATS_VERSION 11
#define TS_COMM_LEN 32
struct taskstats {
__u16 version;
@ -69,6 +69,8 @@ struct taskstats {
__u64 thrashing_count;
__u64 thrashing_delay_total;
__u64 ac_btime64;
__u64 compact_count;
__u64 compact_delay_total;
};
enum {
TASKSTATS_CMD_UNSPEC = 0,

1
libc/kernel/uapi/linux/tty.h
View file

@ -47,4 +47,5 @@
#define N_NCI 25
#define N_SPEAKUP 26
#define N_NULL 27
#define N_MCTP 28
#endif

128
libc/kernel/uapi/linux/v4l2-controls.h
View file

@ -90,6 +90,7 @@ enum v4l2_colorfx {
V4L2_COLORFX_SOLARIZATION = 13,
V4L2_COLORFX_ANTIQUE = 14,
V4L2_COLORFX_SET_CBCR = 15,
V4L2_COLORFX_SET_RGB = 16,
};
#define V4L2_CID_AUTOBRIGHTNESS (V4L2_CID_BASE + 32)
#define V4L2_CID_BAND_STOP_FILTER (V4L2_CID_BASE + 33)
@ -102,7 +103,8 @@ enum v4l2_colorfx {
#define V4L2_CID_MIN_BUFFERS_FOR_OUTPUT (V4L2_CID_BASE + 40)
#define V4L2_CID_ALPHA_COMPONENT (V4L2_CID_BASE + 41)
#define V4L2_CID_COLORFX_CBCR (V4L2_CID_BASE + 42)
#define V4L2_CID_LASTP1 (V4L2_CID_BASE + 43)
#define V4L2_CID_COLORFX_RGB (V4L2_CID_BASE + 43)
#define V4L2_CID_LASTP1 (V4L2_CID_BASE + 44)
#define V4L2_CID_USER_MEYE_BASE (V4L2_CID_USER_BASE + 0x1000)
#define V4L2_CID_USER_BTTV_BASE (V4L2_CID_USER_BASE + 0x1010)
#define V4L2_CID_USER_S2255_BASE (V4L2_CID_USER_BASE + 0x1030)
@ -1349,6 +1351,130 @@ struct v4l2_ctrl_hdr10_mastering_display {
__u32 max_display_mastering_luminance;
__u32 min_display_mastering_luminance;
};
#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED 0x1
#define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE 0x2
struct v4l2_vp9_loop_filter {
__s8 ref_deltas[4];
__s8 mode_deltas[2];
__u8 level;
__u8 sharpness;
__u8 flags;
__u8 reserved[7];
};
struct v4l2_vp9_quantization {
__u8 base_q_idx;
__s8 delta_q_y_dc;
__s8 delta_q_uv_dc;
__s8 delta_q_uv_ac;
__u8 reserved[4];
};
#define V4L2_VP9_SEGMENTATION_FLAG_ENABLED 0x01
#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_MAP 0x02
#define V4L2_VP9_SEGMENTATION_FLAG_TEMPORAL_UPDATE 0x04
#define V4L2_VP9_SEGMENTATION_FLAG_UPDATE_DATA 0x08
#define V4L2_VP9_SEGMENTATION_FLAG_ABS_OR_DELTA_UPDATE 0x10
#define V4L2_VP9_SEG_LVL_ALT_Q 0
#define V4L2_VP9_SEG_LVL_ALT_L 1
#define V4L2_VP9_SEG_LVL_REF_FRAME 2
#define V4L2_VP9_SEG_LVL_SKIP 3
#define V4L2_VP9_SEG_LVL_MAX 4
#define V4L2_VP9_SEGMENT_FEATURE_ENABLED(id) (1 << (id))
#define V4L2_VP9_SEGMENT_FEATURE_ENABLED_MASK 0xf
struct v4l2_vp9_segmentation {
__s16 feature_data[8][4];
__u8 feature_enabled[8];
__u8 tree_probs[7];
__u8 pred_probs[3];
__u8 flags;
__u8 reserved[5];
};
#define V4L2_VP9_FRAME_FLAG_KEY_FRAME 0x001
#define V4L2_VP9_FRAME_FLAG_SHOW_FRAME 0x002
#define V4L2_VP9_FRAME_FLAG_ERROR_RESILIENT 0x004
#define V4L2_VP9_FRAME_FLAG_INTRA_ONLY 0x008
#define V4L2_VP9_FRAME_FLAG_ALLOW_HIGH_PREC_MV 0x010
#define V4L2_VP9_FRAME_FLAG_REFRESH_FRAME_CTX 0x020
#define V4L2_VP9_FRAME_FLAG_PARALLEL_DEC_MODE 0x040
#define V4L2_VP9_FRAME_FLAG_X_SUBSAMPLING 0x080
#define V4L2_VP9_FRAME_FLAG_Y_SUBSAMPLING 0x100
#define V4L2_VP9_FRAME_FLAG_COLOR_RANGE_FULL_SWING 0x200
#define V4L2_VP9_SIGN_BIAS_LAST 0x1
#define V4L2_VP9_SIGN_BIAS_GOLDEN 0x2
#define V4L2_VP9_SIGN_BIAS_ALT 0x4
#define V4L2_VP9_RESET_FRAME_CTX_NONE 0
#define V4L2_VP9_RESET_FRAME_CTX_SPEC 1
#define V4L2_VP9_RESET_FRAME_CTX_ALL 2
#define V4L2_VP9_INTERP_FILTER_EIGHTTAP 0
#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SMOOTH 1
#define V4L2_VP9_INTERP_FILTER_EIGHTTAP_SHARP 2
#define V4L2_VP9_INTERP_FILTER_BILINEAR 3
#define V4L2_VP9_INTERP_FILTER_SWITCHABLE 4
#define V4L2_VP9_REFERENCE_MODE_SINGLE_REFERENCE 0
#define V4L2_VP9_REFERENCE_MODE_COMPOUND_REFERENCE 1
#define V4L2_VP9_REFERENCE_MODE_SELECT 2
#define V4L2_VP9_PROFILE_MAX 3
#define V4L2_CID_STATELESS_VP9_FRAME (V4L2_CID_CODEC_STATELESS_BASE + 300)
struct v4l2_ctrl_vp9_frame {
struct v4l2_vp9_loop_filter lf;
struct v4l2_vp9_quantization quant;
struct v4l2_vp9_segmentation seg;
__u32 flags;
__u16 compressed_header_size;
__u16 uncompressed_header_size;
__u16 frame_width_minus_1;
__u16 frame_height_minus_1;
__u16 render_width_minus_1;
__u16 render_height_minus_1;
__u64 last_frame_ts;
__u64 golden_frame_ts;
__u64 alt_frame_ts;
__u8 ref_frame_sign_bias;
__u8 reset_frame_context;
__u8 frame_context_idx;
__u8 profile;
__u8 bit_depth;
__u8 interpolation_filter;
__u8 tile_cols_log2;
__u8 tile_rows_log2;
__u8 reference_mode;
__u8 reserved[7];
};
#define V4L2_VP9_NUM_FRAME_CTX 4
struct v4l2_vp9_mv_probs {
__u8 joint[3];
__u8 sign[2];
__u8 classes[2][10];
__u8 class0_bit[2];
__u8 bits[2][10];
__u8 class0_fr[2][2][3];
__u8 fr[2][3];
__u8 class0_hp[2];
__u8 hp[2];
};
#define V4L2_CID_STATELESS_VP9_COMPRESSED_HDR (V4L2_CID_CODEC_STATELESS_BASE + 301)
#define V4L2_VP9_TX_MODE_ONLY_4X4 0
#define V4L2_VP9_TX_MODE_ALLOW_8X8 1
#define V4L2_VP9_TX_MODE_ALLOW_16X16 2
#define V4L2_VP9_TX_MODE_ALLOW_32X32 3
#define V4L2_VP9_TX_MODE_SELECT 4
struct v4l2_ctrl_vp9_compressed_hdr {
__u8 tx_mode;
__u8 tx8[2][1];
__u8 tx16[2][2];
__u8 tx32[2][3];
__u8 coef[4][2][2][6][6][3];
__u8 skip[3];
__u8 inter_mode[7][3];
__u8 interp_filter[4][2];
__u8 is_inter[4];
__u8 comp_mode[5];
__u8 single_ref[5][2];
__u8 comp_ref[5];
__u8 y_mode[4][9];
__u8 uv_mode[10][9];
__u8 partition[16][3];
struct v4l2_vp9_mv_probs mv;
};
#define V4L2_CTRL_CLASS_MPEG V4L2_CTRL_CLASS_CODEC
#define V4L2_CID_MPEG_CLASS V4L2_CID_CODEC_CLASS
#define V4L2_CID_MPEG_BASE V4L2_CID_CODEC_BASE

4
libc/kernel/uapi/linux/vdpa.h
View file

@ -31,6 +31,7 @@ enum vdpa_command {
};
enum vdpa_attr {
VDPA_ATTR_UNSPEC,
VDPA_ATTR_PAD = VDPA_ATTR_UNSPEC,
VDPA_ATTR_MGMTDEV_BUS_NAME,
VDPA_ATTR_MGMTDEV_DEV_NAME,
VDPA_ATTR_MGMTDEV_SUPPORTED_CLASSES,
@ -44,6 +45,9 @@ enum vdpa_attr {
VDPA_ATTR_DEV_NET_STATUS,
VDPA_ATTR_DEV_NET_CFG_MAX_VQP,
VDPA_ATTR_DEV_NET_CFG_MTU,
VDPA_ATTR_DEV_NEGOTIATED_FEATURES,
VDPA_ATTR_DEV_MGMTDEV_MAX_VQS,
VDPA_ATTR_DEV_SUPPORTED_FEATURES,
VDPA_ATTR_MAX,
};
#endif

4
libc/kernel/uapi/linux/version.h
View file

@ -16,8 +16,8 @@
***
****************************************************************************
****************************************************************************/
#define LINUX_VERSION_CODE 331776
#define LINUX_VERSION_CODE 332032
#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + ((c) > 255 ? 255 : (c)))
#define LINUX_VERSION_MAJOR 5
#define LINUX_VERSION_PATCHLEVEL 16
#define LINUX_VERSION_PATCHLEVEL 17
#define LINUX_VERSION_SUBLEVEL 0

5
libc/kernel/uapi/linux/videodev2.h
View file

@ -360,6 +360,7 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0')
#define V4L2_PIX_FMT_VP8_FRAME v4l2_fourcc('V', 'P', '8', 'F')
#define V4L2_PIX_FMT_VP9 v4l2_fourcc('V', 'P', '9', '0')
#define V4L2_PIX_FMT_VP9_FRAME v4l2_fourcc('V', 'P', '9', 'F')
#define V4L2_PIX_FMT_HEVC v4l2_fourcc('H', 'E', 'V', 'C')
#define V4L2_PIX_FMT_FWHT v4l2_fourcc('F', 'W', 'H', 'T')
#define V4L2_PIX_FMT_FWHT_STATELESS v4l2_fourcc('S', 'F', 'W', 'H')
@ -898,6 +899,8 @@ struct v4l2_ext_control {
struct v4l2_ctrl_mpeg2_sequence __user * p_mpeg2_sequence;
struct v4l2_ctrl_mpeg2_picture __user * p_mpeg2_picture;
struct v4l2_ctrl_mpeg2_quantisation __user * p_mpeg2_quantisation;
struct v4l2_ctrl_vp9_compressed_hdr __user * p_vp9_compressed_hdr_probs;
struct v4l2_ctrl_vp9_frame __user * p_vp9_frame;
void __user * ptr;
};
} __attribute__((packed));
@ -948,6 +951,8 @@ enum v4l2_ctrl_type {
V4L2_CTRL_TYPE_MPEG2_QUANTISATION = 0x0250,
V4L2_CTRL_TYPE_MPEG2_SEQUENCE = 0x0251,
V4L2_CTRL_TYPE_MPEG2_PICTURE = 0x0252,
V4L2_CTRL_TYPE_VP9_COMPRESSED_HDR = 0x0260,
V4L2_CTRL_TYPE_VP9_FRAME = 0x0261,
};
struct v4l2_queryctrl {
__u32 id;

7
libc/kernel/uapi/linux/virtio_iommu.h
View file

@ -25,6 +25,7 @@
#define VIRTIO_IOMMU_F_BYPASS 3
#define VIRTIO_IOMMU_F_PROBE 4
#define VIRTIO_IOMMU_F_MMIO 5
#define VIRTIO_IOMMU_F_BYPASS_CONFIG 6
struct virtio_iommu_range_64 {
__le64 start;
__le64 end;
@ -38,6 +39,8 @@ struct virtio_iommu_config {
struct virtio_iommu_range_64 input_range;
struct virtio_iommu_range_32 domain_range;
__le32 probe_size;
__u8 bypass;
__u8 reserved[3];
};
#define VIRTIO_IOMMU_T_ATTACH 0x01
#define VIRTIO_IOMMU_T_DETACH 0x02
@ -61,11 +64,13 @@ struct virtio_iommu_req_tail {
__u8 status;
__u8 reserved[3];
};
#define VIRTIO_IOMMU_ATTACH_F_BYPASS (1 << 0)
struct virtio_iommu_req_attach {
struct virtio_iommu_req_head head;
__le32 domain;
__le32 endpoint;
__u8 reserved[8];
__le32 flags;
__u8 reserved[4];
struct virtio_iommu_req_tail tail;
};
struct virtio_iommu_req_detach {

1
libc/kernel/uapi/linux/xfrm.h
View file

@ -265,6 +265,7 @@ enum xfrm_attr_type_t {
XFRMA_SET_MARK,
XFRMA_SET_MARK_MASK,
XFRMA_IF_ID,
XFRMA_MTIMER_THRESH,
__XFRMA_MAX
#define XFRMA_OUTPUT_MARK XFRMA_SET_MARK
#define XFRMA_MAX (__XFRMA_MAX - 1)

64
libc/kernel/uapi/misc/habanalabs.h
View file

@ -264,6 +264,11 @@ enum hl_server_type {
#define HL_INFO_PLL_FREQUENCY 16
#define HL_INFO_POWER 17
#define HL_INFO_OPEN_STATS 18
#define HL_INFO_DRAM_REPLACED_ROWS 21
#define HL_INFO_DRAM_PENDING_ROWS 22
#define HL_INFO_LAST_ERR_OPEN_DEV_TIME 23
#define HL_INFO_CS_TIMEOUT_EVENT 24
#define HL_INFO_RAZWI_EVENT 25
#define HL_INFO_VERSION_MAX_LEN 128
#define HL_INFO_CARD_NAME_MAX_LEN 16
struct hl_info_hw_ip_info {
@ -325,10 +330,18 @@ struct hl_info_pci_counters {
__u64 tx_throughput;
__u64 replay_cnt;
};
#define HL_CLK_THROTTLE_POWER 0x1
#define HL_CLK_THROTTLE_THERMAL 0x2
enum hl_clk_throttling_type {
HL_CLK_THROTTLE_TYPE_POWER,
HL_CLK_THROTTLE_TYPE_THERMAL,
HL_CLK_THROTTLE_TYPE_MAX
};
#define HL_CLK_THROTTLE_POWER (1 << HL_CLK_THROTTLE_TYPE_POWER)
#define HL_CLK_THROTTLE_THERMAL (1 << HL_CLK_THROTTLE_TYPE_THERMAL)
struct hl_info_clk_throttle {
__u32 clk_throttling_reason;
__u32 pad;
__u64 clk_throttling_timestamp_us[HL_CLK_THROTTLE_TYPE_MAX];
__u64 clk_throttling_duration_ns[HL_CLK_THROTTLE_TYPE_MAX];
};
struct hl_info_energy {
__u64 total_energy_consumption;
@ -364,6 +377,24 @@ struct hl_info_cs_counters {
__u64 total_validation_drop_cnt;
__u64 ctx_validation_drop_cnt;
};
struct hl_info_last_err_open_dev_time {
__s64 timestamp;
};
struct hl_info_cs_timeout_event {
__s64 timestamp;
__u64 seq;
};
#define HL_RAZWI_PAGE_FAULT 0
#define HL_RAZWI_MMU_ACCESS_ERROR 1
struct hl_info_razwi_event {
__s64 timestamp;
__u64 addr;
__u16 engine_id_1;
__u16 engine_id_2;
__u8 no_engine_id;
__u8 error_type;
__u8 pad[2];
};
enum gaudi_dcores {
HL_GAUDI_WS_DCORE,
HL_GAUDI_WN_DCORE,
@ -387,6 +418,7 @@ struct hl_info_args {
#define HL_CB_OP_INFO 2
#define HL_MAX_CB_SIZE (0x200000 - 32)
#define HL_CB_FLAGS_MAP 0x1
#define HL_CB_FLAGS_GET_DEVICE_VA 0x2
struct hl_cb_in {
__u64 cb_handle;
__u32 op;
@ -397,9 +429,12 @@ struct hl_cb_in {
struct hl_cb_out {
union {
__u64 cb_handle;
struct {
__u32 usage_cnt;
__u32 pad;
union {
struct {
__u32 usage_cnt;
__u32 pad;
};
__u64 device_va;
};
};
};
@ -466,6 +501,8 @@ struct hl_cs_out {
};
__u32 status;
__u32 sob_base_addr_offset;
__u16 sob_count_before_submission;
__u16 pad[3];
};
union hl_cs_args {
struct hl_cs_in in;
@ -474,6 +511,7 @@ union hl_cs_args {
#define HL_WAIT_CS_FLAGS_INTERRUPT 0x2
#define HL_WAIT_CS_FLAGS_INTERRUPT_MASK 0xFFF00000
#define HL_WAIT_CS_FLAGS_MULTI_CS 0x4
#define HL_WAIT_CS_FLAGS_INTERRUPT_KERNEL_CQ 0x10
#define HL_WAIT_MULTI_CS_LIST_MAX_LEN 32
struct hl_wait_cs_in {
union {
@ -482,15 +520,23 @@ struct hl_wait_cs_in {
__u64 timeout_us;
};
struct {
__u64 addr;
union {
__u64 addr;
__u64 cq_counters_handle;
};
__u64 target;
};
};
__u32 ctx_id;
__u32 flags;
__u8 seq_arr_len;
__u8 pad[3];
__u32 interrupt_timeout_us;
union {
struct {
__u8 seq_arr_len;
__u8 pad[7];
};
__u64 interrupt_timeout_us;
};
__u64 cq_counters_offset;
};
#define HL_WAIT_CS_STATUS_COMPLETED 0
#define HL_WAIT_CS_STATUS_BUSY 1

2
libc/kernel/uapi/rdma/hns-abi.h
View file

@ -54,9 +54,11 @@ enum hns_roce_qp_cap_flags {
HNS_ROCE_QP_CAP_RQ_RECORD_DB = 1 << 0,
HNS_ROCE_QP_CAP_SQ_RECORD_DB = 1 << 1,
HNS_ROCE_QP_CAP_OWNER_DB = 1 << 2,
HNS_ROCE_QP_CAP_DIRECT_WQE = 1 << 5,
};
struct hns_roce_ib_create_qp_resp {
__aligned_u64 cap_flags;
__aligned_u64 dwqe_mmap_key;
};
struct hns_roce_ib_alloc_ucontext_resp {
__u32 qp_tab_size;

2
libc/kernel/uapi/rdma/mlx5_user_ioctl_cmds.h
View file

@ -198,7 +198,7 @@ enum mlx5_ib_flow_matcher_methods {
enum mlx5_ib_device_query_context_attrs {
MLX5_IB_ATTR_QUERY_CONTEXT_RESP_UCTX = (1U << UVERBS_ID_NS_SHIFT),
};
#define MLX5_IB_DW_MATCH_PARAM 0x90
#define MLX5_IB_DW_MATCH_PARAM 0xA0
struct mlx5_ib_match_params {
__u32 match_params[MLX5_IB_DW_MATCH_PARAM];
};

4
libc/kernel/uapi/sound/asound.h
View file

@ -32,8 +32,9 @@
#define SNDRV_PROTOCOL_MINOR(version) (((version) >> 8) & 0xff)
#define SNDRV_PROTOCOL_MICRO(version) ((version) & 0xff)
#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion,uversion) (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
#define AES_IEC958_STATUS_SIZE 24
struct snd_aes_iec958 {
unsigned char status[24];
unsigned char status[AES_IEC958_STATUS_SIZE];
unsigned char subcode[147];
unsigned char pad;
unsigned char dig_subframe[4];
@ -235,6 +236,7 @@ typedef int __bitwise snd_pcm_subformat_t;
#define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000
#define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000
#define SNDRV_PCM_INFO_EXPLICIT_SYNC 0x10000000
#define SNDRV_PCM_INFO_NO_REWINDS 0x20000000
#define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000
#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000
#if __BITS_PER_LONG == 32 && defined(__USE_TIME_BITS64)

3
libc/kernel/uapi/sound/sof/tokens.h
View file

@ -87,4 +87,7 @@
#define SOF_TKN_INTEL_ALH_CH 1401
#define SOF_TKN_INTEL_HDA_RATE 1500
#define SOF_TKN_INTEL_HDA_CH 1501
#define SOF_TKN_MEDIATEK_AFE_RATE 1600
#define SOF_TKN_MEDIATEK_AFE_CH 1601
#define SOF_TKN_MEDIATEK_AFE_FORMAT 1602
#endif