Merge "libc: ARM: Add 32-bit Kryo memcpy"
This commit is contained in:
Christopher Ferris
Gerrit Code Review
commit
da08de89b4
3 changed files with 169 additions and 1 deletions
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@ -1018,7 +1018,7 @@ cc_library_static {
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},
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},
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kryo: {
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kryo: {
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srcs: [
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srcs: [
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"arch-arm/krait/bionic/memcpy.S",
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"arch-arm/kryo/bionic/memcpy.S",
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"arch-arm/cortex-a7/bionic/memset.S",
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"arch-arm/cortex-a7/bionic/memset.S",
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"arch-arm/krait/bionic/strcmp.S",
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"arch-arm/krait/bionic/strcmp.S",
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"arch-arm/krait/bionic/__strcat_chk.S",
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"arch-arm/krait/bionic/__strcat_chk.S",
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30
libc/NOTICE
30
libc/NOTICE
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@ -998,6 +998,36 @@ limitations under the License.
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Copyright (C) 2017 The Android Open Source Project
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Copyright (C) 2017 The Android Open Source Project
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All rights reserved.
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All rights reserved.
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Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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SUCH DAMAGE.
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-------------------------------------------------------------------
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Copyright (C) 2017 The Android Open Source Project
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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modification, are permitted provided that the following conditions
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are met:
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are met:
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138
libc/arch-arm/kryo/bionic/memcpy.S
Normal file
138
libc/arch-arm/kryo/bionic/memcpy.S
Normal file
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@ -0,0 +1,138 @@
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/*
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* Copyright (C) 2017 The Android Open Source Project
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* All rights reserved.
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*
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* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <private/bionic_asm.h>
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#define PLDOFFS (16)
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#define PLDSIZE (128) /* L2 cache line size */
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.code 32
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ENTRY(__memcpy_chk)
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cmp r2, r3
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bls memcpy
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// Preserve lr for backtrace.
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push {lr}
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.cfi_def_cfa_offset 4
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.cfi_rel_offset lr, 0
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bl __memcpy_chk_fail
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END(__memcpy_chk)
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ENTRY(memcpy)
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push {r0}
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.cfi_def_cfa_offset 4
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.cfi_rel_offset r0, 0
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cmp r2, #4
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blt .Lneon_lt4
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cmp r2, #16
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blt .Lneon_lt16
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cmp r2, #32
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blt .Lneon_16
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cmp r2, #128
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blt .Lneon_copy_32_a
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/* Copy blocks of 128-bytes (word-aligned) at a time*/
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/* Code below is optimized for PLDSIZE=128 only */
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mov r12, r2, lsr #7
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cmp r12, #PLDOFFS
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ble .Lneon_copy_128_loop_nopld
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sub r12, #PLDOFFS
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pld [r1, #(PLDOFFS-1)*PLDSIZE]
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.Lneon_copy_128_loop_outer:
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pld [r1, #(PLDOFFS*PLDSIZE)]
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pld [r1, #(PLDOFFS)*(PLDSIZE)+64]
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vld1.32 {q0, q1}, [r1]!
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vld1.32 {q2, q3}, [r1]!
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vld1.32 {q8, q9}, [r1]!
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vld1.32 {q10, q11}, [r1]!
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subs r12, r12, #1
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vst1.32 {q0, q1}, [r0]!
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vst1.32 {q2, q3}, [r0]!
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vst1.32 {q8, q9}, [r0]!
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vst1.32 {q10, q11}, [r0]!
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bne .Lneon_copy_128_loop_outer
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mov r12, #PLDOFFS
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.Lneon_copy_128_loop_nopld:
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vld1.32 {q0, q1}, [r1]!
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vld1.32 {q2, q3}, [r1]!
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vld1.32 {q8, q9}, [r1]!
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vld1.32 {q10, q11}, [r1]!
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subs r12, r12, #1
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vst1.32 {q0, q1}, [r0]!
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vst1.32 {q2, q3}, [r0]!
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vst1.32 {q8, q9}, [r0]!
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vst1.32 {q10, q11}, [r0]!
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bne .Lneon_copy_128_loop_nopld
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ands r2, r2, #0x7f
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beq .Lneon_exit
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cmp r2, #32
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blt .Lneon_16
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nop
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/* Copy blocks of 32-bytes (word aligned) at a time*/
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.Lneon_copy_32_a:
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mov r12, r2, lsr #5
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.Lneon_copy_32_loop_a:
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vld1.32 {q0,q1}, [r1]!
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subs r12, r12, #1
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vst1.32 {q0,q1}, [r0]!
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bne .Lneon_copy_32_loop_a
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ands r2, r2, #0x1f
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beq .Lneon_exit
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.Lneon_16:
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subs r2, r2, #16
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blt .Lneon_lt16
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vld1.32 {q8}, [r1]!
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vst1.32 {q8}, [r0]!
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beq .Lneon_exit
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.Lneon_lt16:
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movs r12, r2, lsl #29
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bcc .Lneon_skip8
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ldr r3, [r1], #4
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ldr r12, [r1], #4
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str r3, [r0], #4
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str r12, [r0], #4
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.Lneon_skip8:
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bpl .Lneon_lt4
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ldr r3, [r1], #4
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str r3, [r0], #4
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.Lneon_lt4:
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movs r2, r2, lsl #31
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bcc .Lneon_lt2
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ldrh r3, [r1], #2
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strh r3, [r0], #2
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.Lneon_lt2:
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bpl .Lneon_exit
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ldrb r12, [r1]
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strb r12, [r0]
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.Lneon_exit:
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pop {r0}
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bx lr
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END(memcpy)
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