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Arm32 dynamic function dispatch

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Previous change was reverted in 9690b121e3.
This change added .arch directive to kryo/ to avoid invalid instruction error.

Test: Run bionic unit test.
Test: Use gdb to make sure the right function is selected.
Test: Build previously failed target: make PRODUCT-sdk_phone_arm64-sdk
Change-Id: I14de41851121fc1a0b38c98fda5eb844b6a9695c
This commit is contained in:
Haibo Huang 2018-11-19 11:00:32 -08:00
parent 9ab3e4015d
commit ea9957a72a
40 changed files with 737 additions and 239 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

208
libc/Android.bp
View file

@ -551,13 +551,9 @@ cc_library_static {
arm: {
exclude_srcs: [
"upstream-openbsd/lib/libc/string/strcpy.c",
"upstream-openbsd/lib/libc/string/stpcpy.c",
"upstream-openbsd/lib/libc/string/strcat.c",
],
neon: {
exclude_srcs: [
"upstream-openbsd/lib/libc/string/stpcpy.c",
"upstream-openbsd/lib/libc/string/strcat.c",
],
},
},
arm64: {
exclude_srcs: [
@ -849,6 +845,8 @@ cc_library_static {
"arch-arm/generic/bionic/memcmp.S",
"arch-arm/generic/bionic/memmove.S",
"arch-arm/generic/bionic/memset.S",
"arch-arm/generic/bionic/stpcpy.c",
"arch-arm/generic/bionic/strcat.c",
"arch-arm/generic/bionic/strcmp.S",
"arch-arm/generic/bionic/strcpy.S",
"arch-arm/generic/bionic/strlen.c",
@ -862,162 +860,44 @@ cc_library_static {
"arch-arm/bionic/setjmp.S",
"arch-arm/bionic/syscall.S",
"arch-arm/bionic/vfork.S",
"arch-arm/cortex-a15/bionic/memcpy.S",
"arch-arm/cortex-a15/bionic/memmove.S",
"arch-arm/cortex-a15/bionic/memset.S",
"arch-arm/cortex-a15/bionic/stpcpy.S",
"arch-arm/cortex-a15/bionic/strcat.S",
"arch-arm/cortex-a15/bionic/strcmp.S",
"arch-arm/cortex-a15/bionic/strcpy.S",
"arch-arm/cortex-a15/bionic/strlen.S",
"arch-arm/cortex-a7/bionic/memcpy.S",
"arch-arm/cortex-a7/bionic/memmove.S",
"arch-arm/cortex-a7/bionic/memset.S",
"arch-arm/cortex-a9/bionic/memcpy.S",
"arch-arm/cortex-a9/bionic/memmove.S",
"arch-arm/cortex-a9/bionic/memset.S",
"arch-arm/cortex-a9/bionic/stpcpy.S",
"arch-arm/cortex-a9/bionic/strcat.S",
"arch-arm/cortex-a9/bionic/strcmp.S",
"arch-arm/cortex-a9/bionic/strcpy.S",
"arch-arm/cortex-a9/bionic/strlen.S",
"arch-arm/krait/bionic/memcpy.S",
"arch-arm/krait/bionic/memmove.S",
"arch-arm/krait/bionic/memset.S",
"arch-arm/krait/bionic/strcmp.S",
"arch-arm/cortex-a53/bionic/memcpy.S",
"arch-arm/cortex-a53/bionic/memmove.S",
"arch-arm/denver/bionic/memcpy.S",
"arch-arm/denver/bionic/memmove.S",
"arch-arm/denver/bionic/memset.S",
"arch-arm/kryo/bionic/memcpy.S",
"arch-arm/kryo/bionic/memmove.S",
],
cortex_a7: {
srcs: [
"arch-arm/cortex-a7/bionic/memcpy.S",
"arch-arm/cortex-a7/bionic/memset.S",
],
exclude_srcs: [
"arch-arm/cortex-a15/bionic/memcpy.S",
"arch-arm/cortex-a15/bionic/memset.S",
],
},
cortex_a9: {
srcs: [
"arch-arm/cortex-a9/bionic/memcpy.S",
"arch-arm/cortex-a9/bionic/memset.S",
"arch-arm/cortex-a9/bionic/stpcpy.S",
"arch-arm/cortex-a9/bionic/strcat.S",
"arch-arm/cortex-a9/bionic/strcmp.S",
"arch-arm/cortex-a9/bionic/strcpy.S",
"arch-arm/cortex-a9/bionic/strlen.S",
],
exclude_srcs: [
"arch-arm/cortex-a15/bionic/memcpy.S",
"arch-arm/cortex-a15/bionic/memset.S",
"arch-arm/cortex-a15/bionic/stpcpy.S",
"arch-arm/cortex-a15/bionic/strcat.S",
"arch-arm/cortex-a15/bionic/strcmp.S",
"arch-arm/cortex-a15/bionic/strcpy.S",
"arch-arm/cortex-a15/bionic/strlen.S",
],
},
krait: {
srcs: [
"arch-arm/krait/bionic/memcpy.S",
"arch-arm/krait/bionic/memset.S",
"arch-arm/krait/bionic/strcmp.S",
],
exclude_srcs: [
"arch-arm/cortex-a15/bionic/memset.S",
"arch-arm/cortex-a15/bionic/memcpy.S",
"arch-arm/cortex-a15/bionic/strcmp.S",
],
},
cortex_a53: {
srcs: [
"arch-arm/cortex-a53/bionic/memcpy.S",
"arch-arm/cortex-a7/bionic/memset.S",
],
exclude_srcs: [
"arch-arm/cortex-a15/bionic/memset.S",
"arch-arm/cortex-a15/bionic/memcpy.S",
],
},
cortex_a55: {
srcs: [
"arch-arm/cortex-a7/bionic/memset.S",
"arch-arm/denver/bionic/memcpy.S",
"arch-arm/krait/bionic/strcmp.S",
],
exclude_srcs: [
"arch-arm/cortex-a15/bionic/memset.S",
"arch-arm/cortex-a15/bionic/memcpy.S",
"arch-arm/cortex-a15/bionic/strcmp.S",
],
},
cortex_a73: {
srcs: [
"arch-arm/cortex-a7/bionic/memset.S",
"arch-arm/denver/bionic/memcpy.S",
"arch-arm/krait/bionic/strcmp.S",
],
exclude_srcs: [
"arch-arm/cortex-a15/bionic/memset.S",
"arch-arm/cortex-a15/bionic/memcpy.S",
"arch-arm/cortex-a15/bionic/strcmp.S",
],
},
cortex_a75: {
srcs: [
"arch-arm/cortex-a7/bionic/memset.S",
"arch-arm/denver/bionic/memcpy.S",
"arch-arm/krait/bionic/strcmp.S",
],
exclude_srcs: [
"arch-arm/cortex-a15/bionic/memset.S",
"arch-arm/cortex-a15/bionic/memcpy.S",
"arch-arm/cortex-a15/bionic/strcmp.S",
],
},
cortex_a76: {
srcs: [
"arch-arm/cortex-a7/bionic/memset.S",
"arch-arm/denver/bionic/memcpy.S",
"arch-arm/krait/bionic/strcmp.S",
],
exclude_srcs: [
"arch-arm/cortex-a15/bionic/memset.S",
"arch-arm/cortex-a15/bionic/memcpy.S",
"arch-arm/cortex-a15/bionic/strcmp.S",
],
},
denver: {
srcs: [
"arch-arm/denver/bionic/memcpy.S",
"arch-arm/denver/bionic/memset.S",
],
exclude_srcs: [
"arch-arm/cortex-a15/bionic/memset.S",
"arch-arm/cortex-a15/bionic/memcpy.S",
],
},
kryo: {
srcs: [
"arch-arm/kryo/bionic/memcpy.S",
"arch-arm/cortex-a7/bionic/memset.S",
"arch-arm/krait/bionic/strcmp.S",
],
exclude_srcs: [
"arch-arm/cortex-a15/bionic/memset.S",
"arch-arm/cortex-a15/bionic/memcpy.S",
"arch-arm/cortex-a15/bionic/strcmp.S",
],
},
// Cores not listed above (like cortex-a8, cortex-a15) or
// "generic" core will use the following implementation.
neon: {
srcs: [
"arch-arm/cortex-a15/bionic/memcpy.S",
"arch-arm/cortex-a15/bionic/memset.S",
"arch-arm/cortex-a15/bionic/stpcpy.S",
"arch-arm/cortex-a15/bionic/strcat.S",
"arch-arm/cortex-a15/bionic/strcmp.S",
"arch-arm/cortex-a15/bionic/strcpy.S",
"arch-arm/cortex-a15/bionic/strlen.S",
"arch-arm/denver/bionic/memmove.S",
],
exclude_srcs: [
"arch-arm/generic/bionic/memcpy.S",
"arch-arm/generic/bionic/memmove.S",
"arch-arm/generic/bionic/memset.S",
"arch-arm/generic/bionic/strcmp.S",
"arch-arm/generic/bionic/strcpy.S",
"arch-arm/generic/bionic/strlen.c",
],
},
},
arm64: {
srcs: [
@ -1636,6 +1516,9 @@ cc_library_static {
x86: {
srcs: ["arch-x86/static_function_dispatch.S"],
},
arm: {
srcs: ["arch-arm/static_function_dispatch.S"],
},
},
whole_static_libs: [
@ -1658,6 +1541,9 @@ cc_library_static {
x86: {
srcs: ["arch-x86/dynamic_function_dispatch.cpp"],
},
arm: {
srcs: ["arch-arm/dynamic_function_dispatch.cpp"],
},
},
whole_static_libs: [

4
libc/arch-arm/cortex-a15/bionic/memcpy.S
View file

@ -64,7 +64,7 @@
.arch armv7-a
// Prototype: void *memcpy (void *dst, const void *src, size_t count).
ENTRY(__memcpy)
ENTRY(__memcpy_a15)
pld [r1, #64]
push {r0, lr}
.cfi_def_cfa_offset 8
@ -72,4 +72,4 @@ ENTRY(__memcpy)
.cfi_rel_offset lr, 4
#include "memcpy_base.S"
END(__memcpy)
END(__memcpy_a15)

32
libc/arch-arm/cortex-a15/bionic/memmove.S Normal file
View file

@ -0,0 +1,32 @@
/*
* Copyright (C) 2018 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#define MEMMOVE memmove_a15
#define MEMCPY __memcpy_a15
#include <arch-arm/denver/bionic/memmove.S>

8
libc/arch-arm/cortex-a15/bionic/memset.S
View file

@ -41,7 +41,7 @@
// arch. The code generated is exactly the same.
.arch armv7-a
ENTRY(__memset_chk)
ENTRY(__memset_chk_a15)
cmp r2, r3
bls memset
@ -51,9 +51,9 @@ ENTRY(__memset_chk)
.cfi_rel_offset lr, 0
bl __memset_chk_fail
END(__memset_chk)
END(__memset_chk_a15)
ENTRY(memset)
ENTRY(memset_a15)
stmfd sp!, {r0}
.cfi_def_cfa_offset 4
.cfi_rel_offset r0, 0
@ -171,4 +171,4 @@ ENTRY(memset)
strbcs r1, [r0], #1
ldmfd sp!, {r0}
bx lr
END(memset)
END(memset_a15)

4
libc/arch-arm/cortex-a15/bionic/strcat.S
View file

@ -80,7 +80,7 @@
\cmd \reg, \label
.endm // m_copy_byte
ENTRY(strcat)
ENTRY(strcat_a15)
// Quick check to see if src is empty.
ldrb r2, [r1]
pld [r1, #0]
@ -572,4 +572,4 @@ ENTRY(strcat)
.L_strcat_sub2:
sub r0, r0, #2
b .L_strcat_r0_scan_done
END(strcat)
END(strcat_a15)

4
libc/arch-arm/cortex-a15/bionic/strcmp.S
View file

@ -61,7 +61,7 @@
// arch. The code generated is exactly the same.
.arch armv7-a
ENTRY(strcmp)
ENTRY(strcmp_a15)
/* Use LDRD whenever possible. */
/* The main thing to look out for when comparing large blocks is that
@ -376,4 +376,4 @@ ENTRY(strcmp)
it ls
sbcls r0, r0, r0
bx lr
END(strcmp)
END(strcmp_a15)

8
libc/arch-arm/cortex-a15/bionic/string_copy.S
View file

@ -100,9 +100,9 @@
.endm // m_copy_byte
#if defined(STPCPY)
ENTRY(stpcpy)
ENTRY(stpcpy_a15)
#else
ENTRY(strcpy)
ENTRY(strcpy_a15)
#endif
// For short copies, hard-code checking the first 8 bytes since this
// new code doesn't win until after about 8 bytes.
@ -514,7 +514,7 @@ ENTRY(strcpy)
strb r4, [r0]
m_pop
#if defined(STPCPY)
END(stpcpy)
END(stpcpy_a15)
#else
END(strcpy)
END(strcpy_a15)
#endif

4
libc/arch-arm/cortex-a15/bionic/strlen.S
View file

@ -60,7 +60,7 @@
.thumb
.thumb_func
ENTRY(strlen)
ENTRY(strlen_a15)
pld [r0, #0]
mov r1, r0
@ -162,4 +162,4 @@ ENTRY(strlen)
.L_sub2_and_return:
sub r0, r0, #2
bx lr
END(strlen)
END(strlen_a15)

4
libc/arch-arm/cortex-a53/bionic/memcpy.S
View file

@ -64,7 +64,7 @@
.arch armv7-a
// Prototype: void *memcpy (void *dst, const void *src, size_t count).
ENTRY(__memcpy)
ENTRY(__memcpy_a53)
pld [r1, #64]
push {r0, lr}
.cfi_def_cfa_offset 8
@ -72,4 +72,4 @@ ENTRY(__memcpy)
.cfi_rel_offset lr, 4
#include "memcpy_base.S"
END(__memcpy)
END(__memcpy_a53)

32
libc/arch-arm/cortex-a53/bionic/memmove.S Normal file
View file

@ -0,0 +1,32 @@
/*
* Copyright (C) 2018 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#define MEMMOVE memmove_a53
#define MEMCPY __memcpy_a53
#include <arch-arm/denver/bionic/memmove.S>

4
libc/arch-arm/cortex-a7/bionic/memcpy.S
View file

@ -64,7 +64,7 @@
.arch armv7-a
// Prototype: void *memcpy (void *dst, const void *src, size_t count).
ENTRY(__memcpy)
ENTRY(__memcpy_a7)
pld [r1, #64]
push {r0, lr}
.cfi_def_cfa_offset 8
@ -72,4 +72,4 @@ ENTRY(__memcpy)
.cfi_rel_offset lr, 4
#include "memcpy_base.S"
END(__memcpy)
END(__memcpy_a7)

32
libc/arch-arm/cortex-a7/bionic/memmove.S Normal file
View file

@ -0,0 +1,32 @@
/*
* Copyright (C) 2018 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#define MEMMOVE memmove_a7
#define MEMCPY __memcpy_a7
#include <arch-arm/denver/bionic/memmove.S>

8
libc/arch-arm/cortex-a7/bionic/memset.S
View file

@ -41,7 +41,7 @@
// arch. The code generated is exactly the same.
.arch armv7-a
ENTRY(__memset_chk)
ENTRY(__memset_chk_a7)
cmp r2, r3
bls memset
@ -51,9 +51,9 @@ ENTRY(__memset_chk)
.cfi_rel_offset lr, 0
bl __memset_chk_fail
END(__memset_chk)
END(__memset_chk_a7)
ENTRY(memset)
ENTRY(memset_a7)
mov r3, r0
// At this point only d0, d1 are going to be used below.
vdup.8 q0, r1
@ -160,4 +160,4 @@ ENTRY(memset)
strbcs r1, [r3], #1
strbcs r1, [r3], #1
bx lr
END(memset)
END(memset_a7)

8
libc/arch-arm/cortex-a9/bionic/memcpy.S
View file

@ -39,15 +39,15 @@
.thumb
.thumb_func
ENTRY(__memcpy)
ENTRY(__memcpy_a9)
pld [r1, #0]
stmfd sp!, {r0, lr}
.cfi_def_cfa_offset 8
.cfi_rel_offset r0, 0
.cfi_rel_offset lr, 4
pld [r1, #64]
END(__memcpy)
END(__memcpy_a9)
#define MEMCPY_BASE __memcpy_base
#define MEMCPY_BASE_ALIGNED __memcpy_base_aligned
#define MEMCPY_BASE __memcpy_base_a9
#define MEMCPY_BASE_ALIGNED __memcpy_base_aligned_a9
#include "memcpy_base.S"

6
libc/arch-arm/cortex-a9/bionic/memcpy_base.S
View file

@ -32,6 +32,12 @@
* cache line.
*/
.syntax unified
// To avoid warning about deprecated instructions, add an explicit
// arch. The code generated is exactly the same.
.arch armv7-a
ENTRY_PRIVATE(MEMCPY_BASE)
.cfi_def_cfa_offset 8
.cfi_rel_offset r0, 0

32
libc/arch-arm/cortex-a9/bionic/memmove.S Normal file
View file

@ -0,0 +1,32 @@
/*
* Copyright (C) 2018 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#define MEMMOVE memmove_a9
#define MEMCPY __memcpy_a9
#include <arch-arm/denver/bionic/memmove.S>

8
libc/arch-arm/cortex-a9/bionic/memset.S
View file

@ -36,7 +36,7 @@
.fpu neon
.syntax unified
ENTRY(__memset_chk)
ENTRY(__memset_chk_a9)
cmp r2, r3
bls memset
@ -46,10 +46,10 @@ ENTRY(__memset_chk)
.cfi_rel_offset lr, 0
bl __memset_chk_fail
END(__memset_chk)
END(__memset_chk_a9)
/* memset() returns its first argument. */
ENTRY(memset)
ENTRY(memset_a9)
// The neon memset only wins for less than 132.
cmp r2, #132
bhi .L_memset_large_copy
@ -158,4 +158,4 @@ ENTRY(memset)
movs r2, r2, lsl #2
strbcs r1, [r0]
ldmfd sp!, {r0, r4-r7, pc}
END(memset)
END(memset_a9)

8
libc/arch-arm/cortex-a9/bionic/strcat.S
View file

@ -57,6 +57,10 @@
.syntax unified
// To avoid warning about deprecated instructions, add an explicit
// arch. The code generated is exactly the same.
.arch armv7-a
.thumb
.thumb_func
@ -80,7 +84,7 @@
\cmd \reg, \label
.endm // m_copy_byte
ENTRY(strcat)
ENTRY(strcat_a9)
// Quick check to see if src is empty.
ldrb r2, [r1]
pld [r1, #0]
@ -552,4 +556,4 @@ ENTRY(strcat)
.Lstrcat_r0_update:
sub r0, r0, #1
b .Lstrcat_r0_scan_done
END(strcat)
END(strcat_a9)

8
libc/arch-arm/cortex-a9/bionic/strcmp.S
View file

@ -52,12 +52,16 @@
.syntax unified
// To avoid warning about deprecated instructions, add an explicit
// arch. The code generated is exactly the same.
.arch armv7-a
#if defined (__thumb__)
.thumb
.thumb_func
#endif
ENTRY(strcmp)
ENTRY(strcmp_a9)
/* Use LDRD whenever possible. */
/* The main thing to look out for when comparing large blocks is that
@ -544,4 +548,4 @@ ENTRY(strcmp)
adds sp, sp, #16
bx lr
END(strcmp)
END(strcmp_a9)

12
libc/arch-arm/cortex-a9/bionic/string_copy.S
View file

@ -64,6 +64,10 @@
.thumb
.thumb_func
// To avoid warning about deprecated instructions, add an explicit
// arch. The code generated is exactly the same.
.arch armv7-a
#if defined(STPCPY)
.macro m_push
push {r4, r5, lr}
@ -100,9 +104,9 @@
.endm // m_copy_byte
#if defined(STPCPY)
ENTRY(stpcpy)
ENTRY(stpcpy_a9)
#else
ENTRY(strcpy)
ENTRY(strcpy_a9)
#endif
// Unroll the first 8 bytes that will be copied.
m_push
@ -536,7 +540,7 @@ ENTRY(strcpy)
#endif
m_ret inst=pop
#if defined(STPCPY)
END(stpcpy)
END(stpcpy_a9)
#else
END(strcpy)
END(strcpy_a9)
#endif

8
libc/arch-arm/cortex-a9/bionic/strlen.S
View file

@ -57,10 +57,14 @@
.syntax unified
// To avoid warning about deprecated instructions, add an explicit
// arch. The code generated is exactly the same.
.arch armv7-a
.thumb
.thumb_func
ENTRY(strlen)
ENTRY(strlen_a9)
pld [r0, #0]
mov r1, r0
@ -164,4 +168,4 @@ done:
sub r0, r1, r0
sub r0, r0, #1
bx lr
END(strlen)
END(strlen_a9)

8
libc/arch-arm/denver/bionic/memcpy.S
View file

@ -65,14 +65,14 @@
// arch. The code generated is exactly the same.
.arch armv7-a
ENTRY(__memcpy)
ENTRY(__memcpy_denver)
pld [r1, #64]
push {r0, lr}
.cfi_def_cfa_offset 8
.cfi_rel_offset r0, 0
.cfi_rel_offset lr, 4
END(__memcpy)
END(__memcpy_denver)
#define MEMCPY_BASE __memcpy_base
#define MEMCPY_BASE_ALIGNED __memcpy_base_aligned
#define MEMCPY_BASE __memcpy_base_denver
#define MEMCPY_BASE_ALIGNED __memcpy_base_aligned_denver
#include "memcpy_base.S"

16
libc/arch-arm/denver/bionic/memmove.S
View file

@ -29,6 +29,14 @@
#include <private/bionic_asm.h>
#ifndef MEMMOVE
# define MEMMOVE memmove_denver
#endif
#ifndef MEMCPY
# define MEMCPY __memcpy_denver
#endif
.text
.syntax unified
.fpu neon
@ -40,7 +48,7 @@
#define PREFETCH_DISTANCE_MID (CACHE_LINE_SIZE*4)
#define PREFETCH_DISTANCE_FAR (CACHE_LINE_SIZE*16)
ENTRY(memmove)
ENTRY(MEMMOVE)
cmp r2, #0
cmpne r0, r1
bxeq lr
@ -50,7 +58,7 @@ ENTRY(memmove)
bhi .L_reversed_memcpy
.L_jump_to_memcpy:
b __memcpy
b MEMCPY
.L_reversed_memcpy:
push {r0, lr}
@ -277,6 +285,4 @@ ENTRY(memmove)
pop {r0, pc}
END(memmove)
ALIAS_SYMBOL(memcpy, memmove)
END(MEMMOVE)

8
libc/arch-arm/denver/bionic/memset.S
View file

@ -39,7 +39,7 @@
.fpu neon
.syntax unified
ENTRY(__memset_chk)
ENTRY(__memset_chk_denver)
cmp r2, r3
bls memset
@ -49,9 +49,9 @@ ENTRY(__memset_chk)
.cfi_rel_offset lr, 0
bl __memset_chk_fail
END(__memset_chk)
END(__memset_chk_denver)
ENTRY(memset)
ENTRY(memset_denver)
pldw [r0]
mov r3, r0
@ -183,4 +183,4 @@ ENTRY(memset)
strbcs r1, [r3]
2:
bx lr
END(memset)
END(memset_denver)

267
libc/arch-arm/dynamic_function_dispatch.cpp Normal file
View file

@ -0,0 +1,267 @@
/*
* Copyright (C) 2018 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <fcntl.h>
#include <sys/syscall.h>
extern "C" {
enum CpuVariant {
kUnknown = 0,
kGeneric,
kCortexA7,
kCortexA9,
kCortexA53,
kCortexA55,
kDenver,
kKrait,
kKryo,
};
static constexpr int MAX_CPU_NAME_LEN = 12;
struct CpuVariantNames {
char name[MAX_CPU_NAME_LEN];
CpuVariant variant;
};
static constexpr CpuVariantNames cpu_variant_names[] = {
{"cortex-a76", kCortexA55},
{"cortex-a75", kCortexA55},
{"kryo", kKryo},
{"cortex-a73", kCortexA55},
{"cortex-a55", kCortexA55},
{"cortex-a53", kCortexA53},
{"krait", kKrait},
{"cortex-a9", kCortexA9},
{"cortex-a7", kCortexA7},
{"denver", kDenver},
// kUnknown indicates the end of this array.
{"", kUnknown},
};
static long ifunc_open(const char* pathname) {
register long r0 __asm__("r0") = AT_FDCWD;
register long r1 __asm__("r1") = reinterpret_cast<long>(pathname);
register long r2 __asm__("r2") = O_RDONLY;
register long r3 __asm__("r3") = 0;
register long r7 __asm__("r7") = __NR_openat;
__asm__ volatile("swi #0" : "=r"(r0) : "r"(r0), "r"(r1), "r"(r2), "r"(r3), "r"(r7));
return r0;
}
static ssize_t ifunc_read(int fd, void* buf, size_t count) {
register long r0 __asm__("r0") = fd;
register long r1 __asm__("r1") = reinterpret_cast<long>(buf);
register long r2 __asm__("r2") = count;
register long r7 __asm__("r7") = __NR_read;
__asm__ volatile("swi #0" : "=r"(r0) : "r"(r0), "r"(r1), "r"(r2), "r"(r7) : "memory");
return r0;
}
static int ifunc_close(int fd) {
register long r0 __asm__("r0") = fd;
register long r7 __asm__("r7") = __NR_close;
__asm__ volatile("swi #0" : "=r"(r0) : "r"(r0), "r"(r7));
return r0;
}
#define DEFINE_IFUNC(name) \
name##_func name __attribute__((ifunc(#name "_resolver"))); \
__attribute__((visibility("hidden"))) \
name##_func* name##_resolver()
#define DECLARE_FUNC(type, name) \
__attribute__((visibility("hidden"))) \
type name
#define RETURN_FUNC(type, name) { \
DECLARE_FUNC(type, name); \
return name; \
}
static CpuVariant init_cpu_variant() {
int fd = ifunc_open("/dev/cpu_variant:arm");
if (fd < 0) return kGeneric;
char name[MAX_CPU_NAME_LEN];
int bytes_read, total_read = 0;
while (total_read < MAX_CPU_NAME_LEN - 1 &&
(bytes_read = ifunc_read(fd, name + total_read,
MAX_CPU_NAME_LEN - 1 - total_read)) > 0) {
total_read += bytes_read;
}
ifunc_close(fd);
if (bytes_read != 0) {
// The file is too big. We haven't reach the end. Or maybe there is an
// error when reading.
return kGeneric;
}
name[total_read] = 0;
typedef int strcmp_func(const char* __lhs, const char* __rhs);
DECLARE_FUNC(strcmp_func, strcmp_a15);
const CpuVariantNames* cpu_variant = cpu_variant_names;
while (cpu_variant->variant != kUnknown) {
if (strcmp_a15(cpu_variant->name, name) == 0) {
return cpu_variant->variant;
}
cpu_variant++;
}
return kGeneric;
}
static CpuVariant get_cpu_variant() {
static CpuVariant cpu_variant = kUnknown;
if (cpu_variant == kUnknown) {
cpu_variant = init_cpu_variant();
}
return cpu_variant;
}
typedef void* memmove_func(void* __dst, const void* __src, size_t __n);
DEFINE_IFUNC(memmove) {
switch(get_cpu_variant()) {
case kCortexA7:
RETURN_FUNC(memmove_func, memmove_a7);
case kCortexA9:
RETURN_FUNC(memmove_func, memmove_a9);
case kKrait:
RETURN_FUNC(memmove_func, memmove_krait);
case kCortexA53:
RETURN_FUNC(memmove_func, memmove_a53);
case kCortexA55:
case kDenver:
RETURN_FUNC(memmove_func, memmove_denver);
case kKryo:
RETURN_FUNC(memmove_func, memmove_kryo);
default:
RETURN_FUNC(memmove_func, memmove_a15);
}
}
typedef void* memcpy_func(void*, const void*, size_t);
DEFINE_IFUNC(memcpy) {
return memmove_resolver();
}
typedef void* __memset_chk_func(void* s, int c, size_t n, size_t n2);
DEFINE_IFUNC(__memset_chk) {
switch(get_cpu_variant()) {
case kCortexA7:
case kCortexA53:
case kCortexA55:
case kKryo:
RETURN_FUNC(__memset_chk_func, __memset_chk_a7);
case kCortexA9:
RETURN_FUNC(__memset_chk_func, __memset_chk_a9);
case kKrait:
RETURN_FUNC(__memset_chk_func, __memset_chk_krait);
case kDenver:
RETURN_FUNC(__memset_chk_func, __memset_chk_denver);
default:
RETURN_FUNC(__memset_chk_func, __memset_chk_a15);
}
}
typedef void* memset_func(void* __dst, int __ch, size_t __n);
DEFINE_IFUNC(memset) {
switch(get_cpu_variant()) {
case kCortexA7:
case kCortexA53:
case kCortexA55:
case kKryo:
RETURN_FUNC(memset_func, memset_a7);
case kCortexA9:
RETURN_FUNC(memset_func, memset_a9);
case kKrait:
RETURN_FUNC(memset_func, memset_krait);
case kDenver:
RETURN_FUNC(memset_func, memset_denver);
default:
RETURN_FUNC(memset_func, memset_a15);
}
}
typedef char* strcpy_func(char* __dst, const char* __src);
DEFINE_IFUNC(strcpy) {
switch(get_cpu_variant()) {
case kCortexA9:
RETURN_FUNC(strcpy_func, strcpy_a9);
default:
RETURN_FUNC(strcpy_func, strcpy_a15);
}
}
typedef char* stpcpy_func(char* __dst, const char* __src);
DEFINE_IFUNC(stpcpy) {
switch(get_cpu_variant()) {
case kCortexA9:
RETURN_FUNC(stpcpy_func, stpcpy_a9);
default:
RETURN_FUNC(stpcpy_func, stpcpy_a15);
}
}
typedef char* strcat_func(char* __dst, const char* __src);
DEFINE_IFUNC(strcat) {
switch(get_cpu_variant()) {
case kCortexA9:
RETURN_FUNC(strcat_func, strcat_a9);
default:
RETURN_FUNC(strcat_func, strcat_a15);
}
}
typedef int strcmp_func(const char* __lhs, const char* __rhs);
DEFINE_IFUNC(strcmp) {
switch(get_cpu_variant()) {
case kCortexA9:
RETURN_FUNC(strcmp_func, strcmp_a9);
case kCortexA55:
case kKrait:
case kKryo:
RETURN_FUNC(strcmp_func, strcmp_krait);
default:
RETURN_FUNC(strcmp_func, strcmp_a15);
}
}
typedef size_t strlen_func(const char* __s);
DEFINE_IFUNC(strlen) {
switch(get_cpu_variant()) {
case kCortexA9:
RETURN_FUNC(strlen_func, strlen_a9);
default:
RETURN_FUNC(strlen_func, strlen_a15);
}
}
} // extern "C"

6
libc/arch-arm/generic/bionic/memmove.S
View file

@ -464,10 +464,8 @@ ENTRY_PRIVATE(bsd_safe_memcpy)
b .Lmemcpy_bl4
END(bsd_safe_memcpy)
ENTRY(memmove)
ENTRY(memmove_generic)
stmfd sp!, {r0, lr}
bl bsd_safe_memcpy
ldmfd sp!, {r0, pc}
END(memmove)
ALIAS_SYMBOL(memcpy, memmove)
END(memmove_generic)

8
libc/arch-arm/generic/bionic/memset.S
View file

@ -36,14 +36,14 @@
.syntax unified
ENTRY(__memset_chk)
ENTRY(__memset_chk_generic)
cmp r2, r3
bls memset
bl __memset_chk_fail
END(__memset_chk)
END(__memset_chk_generic)
ENTRY(memset)
ENTRY(memset_generic)
/* compute the offset to align the destination
* offset = (4-(src&3))&3 = -src & 3
*/
@ -108,4 +108,4 @@ ENTRY(memset)
movs r2, r2, lsl #2
strbcs r1, [r0]
ldmfd sp!, {r0, r4-r7, pc}
END(memset)
END(memset_generic)

30
libc/arch-arm/generic/bionic/stpcpy.c Normal file
View file

@ -0,0 +1,30 @@
/*
* Copyright (C) 2018 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#define stpcpy stpcpy_generic
#include <upstream-openbsd/lib/libc/string/stpcpy.c>

30
libc/arch-arm/generic/bionic/strcat.c Normal file
View file

@ -0,0 +1,30 @@
/*
* Copyright (C) 2018 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#define strcat strcat_generic
#include <upstream-openbsd/lib/libc/string/strcat.c>

8
libc/arch-arm/generic/bionic/strcmp.S
View file

@ -31,6 +31,10 @@
.text
// To avoid warning about deprecated instructions, add an explicit
// arch. The code generated is exactly the same.
.arch armv7-a
#ifdef __ARMEB__
#define SHFT2LSB lsl
#define SHFT2LSBEQ lsleq
@ -50,7 +54,7 @@
#define magic1(REG) REG
#define magic2(REG) REG, lsl #7
ENTRY(strcmp)
ENTRY(strcmp_generic)
pld [r0, #0]
pld [r1, #0]
eor r2, r0, r1
@ -313,4 +317,4 @@ ENTRY(strcmp)
ldr r4, [sp], #4
ldr r5, [sp], #4
bx lr
END(strcmp)
END(strcmp_generic)

8
libc/arch-arm/generic/bionic/strcpy.S
View file

@ -33,7 +33,11 @@
.syntax unified
ENTRY(strcpy)
// To avoid warning about deprecated instructions, add an explicit
// arch. The code generated is exactly the same.
.arch armv7-a
ENTRY(strcpy_generic)
pld [r1, #0]
eor r2, r0, r1
mov ip, r0
@ -131,4 +135,4 @@ ENTRY(strcpy)
cmp r2, #0
bne 4b
bx lr
END(strcpy)
END(strcpy_generic)

2
libc/arch-arm/generic/bionic/strlen.c
View file

@ -29,7 +29,7 @@
#include <string.h>
#include <stdint.h>
size_t strlen(const char *s)
size_t strlen_generic(const char *s)
{
__builtin_prefetch(s);
__builtin_prefetch(s+32);

4
libc/arch-arm/krait/bionic/memcpy.S
View file

@ -42,7 +42,7 @@
.thumb
.thumb_func
ENTRY(__memcpy)
ENTRY(__memcpy_krait)
pld [r1, #64]
stmfd sp!, {r0, lr}
.cfi_adjust_cfa_offset 8
@ -50,4 +50,4 @@ ENTRY(__memcpy)
.cfi_rel_offset lr, 4
#include "memcpy_base.S"
END(__memcpy)
END(__memcpy_krait)

5
libc/arch-arm/krait/bionic/memcpy_base.S
View file

@ -41,8 +41,13 @@
#endif
.text
.syntax unified
.fpu neon
// To avoid warning about deprecated instructions, add an explicit
// arch. The code generated is exactly the same.
.arch armv7-a
.L_memcpy_base:
cmp r2, #4
blt .L_neon_lt4

32
libc/arch-arm/krait/bionic/memmove.S Normal file
View file

@ -0,0 +1,32 @@
/*
* Copyright (C) 2018 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#define MEMMOVE memmove_krait
#define MEMCPY __memcpy_krait
#include <arch-arm/denver/bionic/memmove.S>

8
libc/arch-arm/krait/bionic/memset.S
View file

@ -37,7 +37,7 @@
.fpu neon
.syntax unified
ENTRY(__memset_chk)
ENTRY(__memset_chk_krait)
cmp r2, r3
bls memset
@ -47,10 +47,10 @@ ENTRY(__memset_chk)
.cfi_rel_offset lr, 0
bl __memset_chk_fail
END(__memset_chk)
END(__memset_chk_krait)
/* memset() returns its first argument. */
ENTRY(memset)
ENTRY(memset_krait)
mov r3, r0
vdup.8 q0, r1
@ -82,4 +82,4 @@ ENTRY(memset)
strbcs r1, [r3], #1
strbcs r1, [r3], #1
bx lr
END(memset)
END(memset_krait)

8
libc/arch-arm/krait/bionic/strcmp.S
View file

@ -52,12 +52,16 @@
.syntax unified
// To avoid warning about deprecated instructions, add an explicit
// arch. The code generated is exactly the same.
.arch armv7-a
#if defined (__thumb__)
.thumb
.thumb_func
#endif
ENTRY(strcmp)
ENTRY(strcmp_krait)
/* Use LDRD whenever possible. */
/* The main thing to look out for when comparing large blocks is that
@ -482,4 +486,4 @@ ENTRY(strcmp)
.cfi_restore r7
bx lr
END(strcmp)
END(strcmp_krait)

10
libc/arch-arm/kryo/bionic/memcpy.S
View file

@ -33,8 +33,14 @@
#define PLDOFFS (16)
#define PLDSIZE (128) /* L2 cache line size */
.syntax unified
// To avoid warning about deprecated instructions, add an explicit
// arch. The code generated is exactly the same.
.arch armv7-a
.code 32
ENTRY(__memcpy)
ENTRY(__memcpy_kryo)
push {r0}
.cfi_def_cfa_offset 4
.cfi_rel_offset r0, 0
@ -123,4 +129,4 @@ ENTRY(__memcpy)
pop {r0}
bx lr
END(__memcpy)
END(__memcpy_kryo)

32
libc/arch-arm/kryo/bionic/memmove.S Normal file
View file

@ -0,0 +1,32 @@
/*
* Copyright (C) 2018 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#define MEMMOVE memmove_kryo
#define MEMCPY __memcpy_kryo
#include <arch-arm/denver/bionic/memmove.S>

44
libc/arch-arm/static_function_dispatch.S Normal file
View file

@ -0,0 +1,44 @@
/*
* Copyright (C) 2018 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <private/bionic_asm.h>
#define FUNCTION_DELEGATE(name, impl) \
ENTRY(name); \
b impl; \
END(name)
FUNCTION_DELEGATE(memmove, memmove_generic)
FUNCTION_DELEGATE(memcpy, memmove_generic)
FUNCTION_DELEGATE(memset, memset_generic)
FUNCTION_DELEGATE(__memset_chk, __memset_chk_generic)
FUNCTION_DELEGATE(strcpy, strcpy_generic)
FUNCTION_DELEGATE(stpcpy, stpcpy_generic)
FUNCTION_DELEGATE(strcat, strcat_generic)
FUNCTION_DELEGATE(strcmp, strcmp_generic)
FUNCTION_DELEGATE(strlen, strlen_generic)