Tidy up the x86 atom/silvermont stuff similar to x86-64.

Get rid of the bad precedent of having the architecture variant in the
file name *and* directory name.

Test: treehugger
Change-Id: I78582c12b4390578c51d52d4dd86f57470129abf
This commit is contained in:
Elliott Hughes 2022-07-25 16:25:11 +00:00
parent 61a42bf1ee
commit ed777145e7
37 changed files with 49 additions and 80 deletions

View file

@ -927,22 +927,41 @@ cc_library_static {
"arch-x86/generic/string/wcscpy.c",
"arch-x86/generic/string/wmemcmp.c",
"arch-x86/atom/string/sse2-memchr-atom.S",
"arch-x86/atom/string/sse2-memrchr-atom.S",
"arch-x86/atom/string/sse2-strchr-atom.S",
"arch-x86/atom/string/sse2-strnlen-atom.S",
"arch-x86/atom/string/sse2-strrchr-atom.S",
"arch-x86/atom/string/sse2-wcschr-atom.S",
"arch-x86/atom/string/sse2-wcsrchr-atom.S",
"arch-x86/atom/string/sse2-wcslen-atom.S",
"arch-x86/atom/string/sse2-wcscmp-atom.S",
"arch-x86/silvermont/string/sse2-memmove-slm.S",
"arch-x86/silvermont/string/sse2-memset-slm.S",
"arch-x86/silvermont/string/sse2-stpcpy-slm.S",
"arch-x86/silvermont/string/sse2-stpncpy-slm.S",
"arch-x86/silvermont/string/sse2-strcpy-slm.S",
"arch-x86/silvermont/string/sse2-strlen-slm.S",
"arch-x86/silvermont/string/sse2-strncpy-slm.S",
"arch-x86/string/sse2-memchr-atom.S",
"arch-x86/string/sse2-memmove-slm.S",
"arch-x86/string/sse2-memrchr-atom.S",
"arch-x86/string/sse2-memset-atom.S",
"arch-x86/string/sse2-memset-slm.S",
"arch-x86/string/sse2-stpcpy-slm.S",
"arch-x86/string/sse2-stpncpy-slm.S",
"arch-x86/string/sse2-strchr-atom.S",
"arch-x86/string/sse2-strcpy-slm.S",
"arch-x86/string/sse2-strlen-slm.S",
"arch-x86/string/sse2-strncpy-slm.S",
"arch-x86/string/sse2-strnlen-atom.S",
"arch-x86/string/sse2-strrchr-atom.S",
"arch-x86/string/sse2-wcschr-atom.S",
"arch-x86/string/sse2-wcsrchr-atom.S",
"arch-x86/string/sse2-wcslen-atom.S",
"arch-x86/string/sse2-wcscmp-atom.S",
"arch-x86/string/sse2-strlen-atom.S",
"arch-x86/string/ssse3-memcmp-atom.S",
"arch-x86/string/ssse3-memmove-atom.S",
"arch-x86/string/ssse3-strcat-atom.S",
"arch-x86/string/ssse3-strcmp-atom.S",
"arch-x86/string/ssse3-strcpy-atom.S",
"arch-x86/string/ssse3-strlcat-atom.S",
"arch-x86/string/ssse3-strlcpy-atom.S",
"arch-x86/string/ssse3-strncat-atom.S",
"arch-x86/string/ssse3-strncmp-atom.S",
"arch-x86/string/ssse3-strncpy-atom.S",
"arch-x86/string/ssse3-wcscat-atom.S",
"arch-x86/string/ssse3-wcscpy-atom.S",
"arch-x86/string/ssse3-wmemcmp-atom.S",
"arch-x86/string/sse4-memcmp-slm.S",
"arch-x86/string/sse4-wmemcmp-slm.S",
"arch-x86/bionic/__bionic_clone.S",
"arch-x86/bionic/_exit_with_stack_teardown.S",
@ -952,29 +971,6 @@ cc_library_static {
"arch-x86/bionic/syscall.S",
"arch-x86/bionic/vfork.S",
"arch-x86/bionic/__x86.get_pc_thunk.S",
// ssse3 functions
"arch-x86/atom/string/ssse3-strcat-atom.S",
"arch-x86/atom/string/ssse3-strcmp-atom.S",
"arch-x86/atom/string/ssse3-strlcat-atom.S",
"arch-x86/atom/string/ssse3-strlcpy-atom.S",
"arch-x86/atom/string/ssse3-strncat-atom.S",
"arch-x86/atom/string/ssse3-strncmp-atom.S",
"arch-x86/atom/string/ssse3-wcscat-atom.S",
"arch-x86/atom/string/ssse3-wcscpy-atom.S",
// sse4 functions
"arch-x86/silvermont/string/sse4-memcmp-slm.S",
"arch-x86/silvermont/string/sse4-wmemcmp-slm.S",
// atom functions
"arch-x86/atom/string/sse2-memset-atom.S",
"arch-x86/atom/string/sse2-strlen-atom.S",
"arch-x86/atom/string/ssse3-memcmp-atom.S",
"arch-x86/atom/string/ssse3-memmove-atom.S",
"arch-x86/atom/string/ssse3-strcpy-atom.S",
"arch-x86/atom/string/ssse3-strncpy-atom.S",
"arch-x86/atom/string/ssse3-wmemcmp-atom.S",
],
exclude_srcs: [

View file

@ -1,36 +0,0 @@
/*
Copyright (c) 2010, Intel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* Neither the name of Intel Corporation nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* Values are optimized for Atom */
#define SHARED_CACHE_SIZE (512*1024) /* Atom L2 Cache */
#define DATA_CACHE_SIZE (24*1024) /* Atom L1 Data Cache */
#define SHARED_CACHE_SIZE_HALF (SHARED_CACHE_SIZE / 2)
#define DATA_CACHE_SIZE_HALF (DATA_CACHE_SIZE / 2)

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@ -28,9 +28,14 @@ ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/* Values are optimized for Silvermont */
#define SHARED_CACHE_SIZE (1024*1024) /* Silvermont L2 Cache */
#define DATA_CACHE_SIZE (24*1024) /* Silvermont L1 Data Cache */
#ifdef FOR_ATOM
#define SHARED_CACHE_SIZE (512 * 1024) /* Atom L2 Cache */
#endif
#ifdef FOR_SILVERMONT
#define SHARED_CACHE_SIZE (1024 * 1024) /* Silvermont L2 Cache */
#endif
#define SHARED_CACHE_SIZE_HALF (SHARED_CACHE_SIZE / 2)
#define DATA_CACHE_SIZE_HALF (DATA_CACHE_SIZE / 2)
#define DATA_CACHE_SIZE (24 * 1024) /* Atom and Silvermont L1 Data Cache */
#define SHARED_CACHE_SIZE_HALF (SHARED_CACHE_SIZE / 2)
#define DATA_CACHE_SIZE_HALF (DATA_CACHE_SIZE / 2)

View file

@ -28,6 +28,7 @@ ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#define FOR_SILVERMONT
#include "cache.h"
#ifndef MEMMOVE

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@ -30,6 +30,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include <private/bionic_asm.h>
#define FOR_ATOM
#include "cache.h"
#ifndef L

View file

@ -30,6 +30,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include <private/bionic_asm.h>
#define FOR_SILVERMONT
#include "cache.h"
#ifndef L

View file

@ -28,6 +28,7 @@ ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#define FOR_ATOM
#include "cache.h"
#ifndef MEMCPY