Merge "Update to v6.6 kernel headers." into main am: 85dd55530a am: 511a846c42 am: 8094b84e28
Original change: https://android-review.googlesource.com/c/platform/bionic/+/2812362 Change-Id: I15e1aa6bec3fa89568ff4ba1242c25978884999f Signed-off-by: Automerger Merge Worker <android-build-automerger-merge-worker@system.gserviceaccount.com>
This commit is contained in:
Christopher Ferris
Automerger Merge Worker
commit
f9a2674094
67 changed files with 684 additions and 76 deletions
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@ -222,6 +222,9 @@
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#if defined(__NR_fchmodat)
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#define SYS_fchmodat __NR_fchmodat
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#endif
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#if defined(__NR_fchmodat2)
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#define SYS_fchmodat2 __NR_fchmodat2
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#endif
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#if defined(__NR_fchown)
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#define SYS_fchown __NR_fchown
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#endif
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@ -573,6 +576,9 @@
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#if defined(__NR_madvise)
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#define SYS_madvise __NR_madvise
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#endif
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#if defined(__NR_map_shadow_stack)
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#define SYS_map_shadow_stack __NR_map_shadow_stack
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#endif
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#if defined(__NR_mbind)
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#define SYS_mbind __NR_mbind
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#endif
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@ -422,4 +422,5 @@
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#define __NR_futex_waitv (__NR_SYSCALL_BASE + 449)
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#define __NR_set_mempolicy_home_node (__NR_SYSCALL_BASE + 450)
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#define __NR_cachestat (__NR_SYSCALL_BASE + 451)
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#define __NR_fchmodat2 (__NR_SYSCALL_BASE + 452)
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#endif
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@ -434,4 +434,5 @@
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#define __NR_futex_waitv (__NR_SYSCALL_BASE + 449)
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#define __NR_set_mempolicy_home_node (__NR_SYSCALL_BASE + 450)
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#define __NR_cachestat (__NR_SYSCALL_BASE + 451)
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#define __NR_fchmodat2 (__NR_SYSCALL_BASE + 452)
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#endif
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@ -94,4 +94,5 @@
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#define HWCAP2_SME_B16B16 (1UL << 41)
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#define HWCAP2_SME_F16F16 (1UL << 42)
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#define HWCAP2_MOPS (1UL << 43)
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#define HWCAP2_HBC (1UL << 44)
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#endif
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@ -185,7 +185,8 @@ typedef struct siginfo {
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#define SEGV_ADIPERR 7
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#define SEGV_MTEAERR 8
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#define SEGV_MTESERR 9
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#define NSIGSEGV 9
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#define SEGV_CPERR 10
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#define NSIGSEGV 10
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#define BUS_ADRALN 1
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#define BUS_ADRERR 2
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#define BUS_OBJERR 3
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@ -414,8 +414,9 @@
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#define __NR_futex_waitv 449
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#define __NR_set_mempolicy_home_node 450
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#define __NR_cachestat 451
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#define __NR_fchmodat2 452
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#undef __NR_syscalls
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#define __NR_syscalls 452
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#define __NR_syscalls 453
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#if __BITS_PER_LONG == 64 && !defined(__SYSCALL_COMPAT)
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#define __NR_fcntl __NR3264_fcntl
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#define __NR_statfs __NR3264_statfs
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@ -46,6 +46,7 @@ struct kvm_riscv_config {
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unsigned long marchid;
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unsigned long mimpid;
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unsigned long zicboz_block_size;
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unsigned long satp_mode;
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};
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struct kvm_riscv_core {
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struct user_regs_struct regs;
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@ -98,6 +99,12 @@ enum KVM_RISCV_ISA_EXT_ID {
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KVM_RISCV_ISA_EXT_SSAIA,
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KVM_RISCV_ISA_EXT_V,
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KVM_RISCV_ISA_EXT_SVNAPOT,
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KVM_RISCV_ISA_EXT_ZBA,
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KVM_RISCV_ISA_EXT_ZBS,
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KVM_RISCV_ISA_EXT_ZICNTR,
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KVM_RISCV_ISA_EXT_ZICSR,
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KVM_RISCV_ISA_EXT_ZIFENCEI,
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KVM_RISCV_ISA_EXT_ZIHPM,
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KVM_RISCV_ISA_EXT_MAX,
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};
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enum KVM_RISCV_SBI_EXT_ID {
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@ -135,6 +142,12 @@ enum KVM_RISCV_SBI_EXT_ID {
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#define KVM_REG_RISCV_FP_D (0x06 << KVM_REG_RISCV_TYPE_SHIFT)
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#define KVM_REG_RISCV_FP_D_REG(name) (offsetof(struct __riscv_d_ext_state, name) / sizeof(__u64))
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#define KVM_REG_RISCV_ISA_EXT (0x07 << KVM_REG_RISCV_TYPE_SHIFT)
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#define KVM_REG_RISCV_ISA_SINGLE (0x0 << KVM_REG_RISCV_SUBTYPE_SHIFT)
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#define KVM_REG_RISCV_ISA_MULTI_EN (0x1 << KVM_REG_RISCV_SUBTYPE_SHIFT)
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#define KVM_REG_RISCV_ISA_MULTI_DIS (0x2 << KVM_REG_RISCV_SUBTYPE_SHIFT)
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#define KVM_REG_RISCV_ISA_MULTI_REG(__ext_id) ((__ext_id) / __BITS_PER_LONG)
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#define KVM_REG_RISCV_ISA_MULTI_MASK(__ext_id) (1UL << ((__ext_id) % __BITS_PER_LONG))
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#define KVM_REG_RISCV_ISA_MULTI_REG_LAST KVM_REG_RISCV_ISA_MULTI_REG(KVM_RISCV_ISA_EXT_MAX - 1)
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#define KVM_REG_RISCV_SBI_EXT (0x08 << KVM_REG_RISCV_TYPE_SHIFT)
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#define KVM_REG_RISCV_SBI_SINGLE (0x0 << KVM_REG_RISCV_SUBTYPE_SHIFT)
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#define KVM_REG_RISCV_SBI_MULTI_EN (0x1 << KVM_REG_RISCV_SUBTYPE_SHIFT)
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@ -20,6 +20,9 @@
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#define _UAPI_ASM_RISCV_PTRACE_H
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#ifndef __ASSEMBLY__
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#include <linux/types.h>
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#define PTRACE_GETFDPIC 33
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#define PTRACE_GETFDPIC_EXEC 0
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#define PTRACE_GETFDPIC_INTERP 1
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struct user_regs_struct {
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unsigned long pc;
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unsigned long ra;
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@ -89,6 +92,14 @@ struct __riscv_v_ext_state {
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unsigned long vlenb;
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void * datap;
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};
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struct __riscv_v_regset_state {
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unsigned long vstart;
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unsigned long vl;
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unsigned long vtype;
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unsigned long vcsr;
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unsigned long vlenb;
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char vreg[];
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};
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#define RISCV_MAX_VLENB (8192)
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#endif
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#endif
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@ -19,5 +19,7 @@
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#ifndef _ASM_X86_MMAN_H
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#define _ASM_X86_MMAN_H
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#define MAP_32BIT 0x40
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#define MAP_ABOVE4G 0x80
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#define SHADOW_STACK_SET_TOKEN (1ULL << 0)
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#include <asm-generic/mman.h>
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#endif
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@ -38,4 +38,11 @@
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#define ARCH_ENABLE_TAGGED_ADDR 0x4002
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#define ARCH_GET_MAX_TAG_BITS 0x4003
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#define ARCH_FORCE_TAGGED_SVA 0x4004
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#define ARCH_SHSTK_ENABLE 0x5001
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#define ARCH_SHSTK_DISABLE 0x5002
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#define ARCH_SHSTK_LOCK 0x5003
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#define ARCH_SHSTK_UNLOCK 0x5004
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#define ARCH_SHSTK_STATUS 0x5005
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#define ARCH_SHSTK_SHSTK (1ULL << 0)
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#define ARCH_SHSTK_WRSS (1ULL << 1)
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#endif
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@ -459,4 +459,5 @@
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#define __NR_futex_waitv 449
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#define __NR_set_mempolicy_home_node 450
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#define __NR_cachestat 451
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#define __NR_fchmodat2 452
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#endif
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@ -381,4 +381,6 @@
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#define __NR_futex_waitv 449
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#define __NR_set_mempolicy_home_node 450
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#define __NR_cachestat 451
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#define __NR_fchmodat2 452
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#define __NR_map_shadow_stack 453
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#endif
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@ -334,6 +334,7 @@
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#define __NR_futex_waitv (__X32_SYSCALL_BIT + 449)
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#define __NR_set_mempolicy_home_node (__X32_SYSCALL_BIT + 450)
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#define __NR_cachestat (__X32_SYSCALL_BIT + 451)
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#define __NR_fchmodat2 (__X32_SYSCALL_BIT + 452)
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#define __NR_rt_sigaction (__X32_SYSCALL_BIT + 512)
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#define __NR_rt_sigreturn (__X32_SYSCALL_BIT + 513)
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#define __NR_ioctl (__X32_SYSCALL_BIT + 514)
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@ -60,7 +60,8 @@ extern "C" {
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#define AMDGPU_GEM_DOMAIN_GDS 0x8
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#define AMDGPU_GEM_DOMAIN_GWS 0x10
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#define AMDGPU_GEM_DOMAIN_OA 0x20
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#define AMDGPU_GEM_DOMAIN_MASK (AMDGPU_GEM_DOMAIN_CPU | AMDGPU_GEM_DOMAIN_GTT | AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)
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#define AMDGPU_GEM_DOMAIN_DOORBELL 0x40
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#define AMDGPU_GEM_DOMAIN_MASK (AMDGPU_GEM_DOMAIN_CPU | AMDGPU_GEM_DOMAIN_GTT | AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA | AMDGPU_GEM_DOMAIN_DOORBELL)
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#define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED (1 << 0)
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#define AMDGPU_GEM_CREATE_NO_CPU_ACCESS (1 << 1)
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#define AMDGPU_GEM_CREATE_CPU_GTT_USWC (1 << 2)
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@ -430,6 +430,13 @@ struct drm_syncobj_timeline_wait {
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__u32 first_signaled;
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__u32 pad;
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};
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struct drm_syncobj_eventfd {
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__u32 handle;
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__u32 flags;
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__u64 point;
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__s32 fd;
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__u32 pad;
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};
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struct drm_syncobj_array {
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__u64 handles;
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__u32 count_handles;
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@ -574,6 +581,7 @@ extern "C" {
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#define DRM_IOCTL_SYNCOBJ_TRANSFER DRM_IOWR(0xCC, struct drm_syncobj_transfer)
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#define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL DRM_IOWR(0xCD, struct drm_syncobj_timeline_array)
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#define DRM_IOCTL_MODE_GETFB2 DRM_IOWR(0xCE, struct drm_mode_fb_cmd2)
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#define DRM_IOCTL_SYNCOBJ_EVENTFD DRM_IOWR(0xCF, struct drm_syncobj_eventfd)
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#define DRM_COMMAND_BASE 0x40
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#define DRM_COMMAND_END 0xA0
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struct drm_event {
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@ -59,10 +59,10 @@ enum drm_i915_pmu_engine_sample {
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#define I915_PMU_SAMPLE_MASK (0xf)
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#define I915_PMU_SAMPLE_INSTANCE_BITS (8)
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#define I915_PMU_CLASS_SHIFT (I915_PMU_SAMPLE_BITS + I915_PMU_SAMPLE_INSTANCE_BITS)
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#define __I915_PMU_ENGINE(class,instance,sample) ((class) << I915_PMU_CLASS_SHIFT | (instance) << I915_PMU_SAMPLE_BITS | (sample))
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#define I915_PMU_ENGINE_BUSY(class,instance) __I915_PMU_ENGINE(class, instance, I915_SAMPLE_BUSY)
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#define I915_PMU_ENGINE_WAIT(class,instance) __I915_PMU_ENGINE(class, instance, I915_SAMPLE_WAIT)
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#define I915_PMU_ENGINE_SEMA(class,instance) __I915_PMU_ENGINE(class, instance, I915_SAMPLE_SEMA)
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#define __I915_PMU_ENGINE(__linux_class,instance,sample) ((__linux_class) << I915_PMU_CLASS_SHIFT | (instance) << I915_PMU_SAMPLE_BITS | (sample))
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#define I915_PMU_ENGINE_BUSY(__linux_class,instance) __I915_PMU_ENGINE(__linux_class, instance, I915_SAMPLE_BUSY)
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#define I915_PMU_ENGINE_WAIT(__linux_class,instance) __I915_PMU_ENGINE(__linux_class, instance, I915_SAMPLE_WAIT)
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#define I915_PMU_ENGINE_SEMA(__linux_class,instance) __I915_PMU_ENGINE(__linux_class, instance, I915_SAMPLE_SEMA)
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#define __I915_PMU_GT_SHIFT (60)
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#define ___I915_PMU_OTHER(gt,x) (((__u64) __I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x)) | ((__u64) (gt) << __I915_PMU_GT_SHIFT))
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#define __I915_PMU_OTHER(x) ___I915_PMU_OTHER(0, x)
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@ -49,23 +49,28 @@ extern "C" {
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#define DRM_IVPU_PARAM_UNIQUE_INFERENCE_ID 10
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#define DRM_IVPU_PARAM_TILE_CONFIG 11
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#define DRM_IVPU_PARAM_SKU 12
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#define DRM_IVPU_PARAM_CAPABILITIES 13
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#define DRM_IVPU_PLATFORM_TYPE_SILICON 0
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#define DRM_IVPU_CONTEXT_PRIORITY_IDLE 0
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#define DRM_IVPU_CONTEXT_PRIORITY_NORMAL 1
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#define DRM_IVPU_CONTEXT_PRIORITY_FOCUS 2
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#define DRM_IVPU_CONTEXT_PRIORITY_REALTIME 3
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#define DRM_IVPU_CAP_METRIC_STREAMER 1
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#define DRM_IVPU_CAP_DMA_MEMORY_RANGE 2
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struct drm_ivpu_param {
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__u32 param;
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__u32 index;
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__u64 value;
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};
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#define DRM_IVPU_BO_HIGH_MEM 0x00000001
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#define DRM_IVPU_BO_SHAVE_MEM 0x00000001
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#define DRM_IVPU_BO_HIGH_MEM DRM_IVPU_BO_SHAVE_MEM
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#define DRM_IVPU_BO_MAPPABLE 0x00000002
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#define DRM_IVPU_BO_DMA_MEM 0x00000004
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#define DRM_IVPU_BO_CACHED 0x00000000
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#define DRM_IVPU_BO_UNCACHED 0x00010000
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#define DRM_IVPU_BO_WC 0x00020000
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#define DRM_IVPU_BO_CACHE_MASK 0x00030000
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#define DRM_IVPU_BO_FLAGS (DRM_IVPU_BO_HIGH_MEM | DRM_IVPU_BO_MAPPABLE | DRM_IVPU_BO_CACHE_MASK)
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#define DRM_IVPU_BO_FLAGS (DRM_IVPU_BO_HIGH_MEM | DRM_IVPU_BO_MAPPABLE | DRM_IVPU_BO_DMA_MEM | DRM_IVPU_BO_CACHE_MASK)
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struct drm_ivpu_bo_create {
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__u64 size;
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__u32 flags;
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@ -23,11 +23,43 @@
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define NOUVEAU_GETPARAM_PCI_VENDOR 3
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#define NOUVEAU_GETPARAM_PCI_DEVICE 4
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#define NOUVEAU_GETPARAM_BUS_TYPE 5
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#define NOUVEAU_GETPARAM_FB_SIZE 8
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#define NOUVEAU_GETPARAM_AGP_SIZE 9
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#define NOUVEAU_GETPARAM_CHIPSET_ID 11
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#define NOUVEAU_GETPARAM_VM_VRAM_BASE 12
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#define NOUVEAU_GETPARAM_GRAPH_UNITS 13
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#define NOUVEAU_GETPARAM_PTIMER_TIME 14
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#define NOUVEAU_GETPARAM_HAS_BO_USAGE 15
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#define NOUVEAU_GETPARAM_HAS_PAGEFLIP 16
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#define NOUVEAU_GETPARAM_EXEC_PUSH_MAX 17
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struct drm_nouveau_getparam {
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__u64 param;
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__u64 value;
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};
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struct drm_nouveau_channel_alloc {
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__u32 fb_ctxdma_handle;
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__u32 tt_ctxdma_handle;
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__s32 channel;
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__u32 pushbuf_domains;
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__u32 notifier_handle;
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struct {
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__u32 handle;
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__u32 grclass;
|
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} subchan[8];
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__u32 nr_subchan;
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};
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struct drm_nouveau_channel_free {
|
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__s32 channel;
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};
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#define NOUVEAU_GEM_DOMAIN_CPU (1 << 0)
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#define NOUVEAU_GEM_DOMAIN_VRAM (1 << 1)
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#define NOUVEAU_GEM_DOMAIN_GART (1 << 2)
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#define NOUVEAU_GEM_DOMAIN_MAPPABLE (1 << 3)
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#define NOUVEAU_GEM_DOMAIN_COHERENT (1 << 4)
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#define NOUVEAU_GEM_DOMAIN_NO_SHARE (1 << 5)
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#define NOUVEAU_GEM_TILE_COMP 0x00030000
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#define NOUVEAU_GEM_TILE_LAYOUT_MASK 0x0000ff00
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#define NOUVEAU_GEM_TILE_16BPP 0x00000001
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@ -81,6 +113,7 @@ struct drm_nouveau_gem_pushbuf_push {
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__u32 pad;
|
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__u64 offset;
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__u64 length;
|
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#define NOUVEAU_GEM_PUSHBUF_NO_PREFETCH (1 << 23)
|
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};
|
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struct drm_nouveau_gem_pushbuf {
|
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__u32 channel;
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|
@ -105,6 +138,55 @@ struct drm_nouveau_gem_cpu_prep {
|
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struct drm_nouveau_gem_cpu_fini {
|
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__u32 handle;
|
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};
|
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struct drm_nouveau_sync {
|
||||
__u32 flags;
|
||||
#define DRM_NOUVEAU_SYNC_SYNCOBJ 0x0
|
||||
#define DRM_NOUVEAU_SYNC_TIMELINE_SYNCOBJ 0x1
|
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#define DRM_NOUVEAU_SYNC_TYPE_MASK 0xf
|
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__u32 handle;
|
||||
__u64 timeline_value;
|
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};
|
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struct drm_nouveau_vm_init {
|
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__u64 kernel_managed_addr;
|
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__u64 kernel_managed_size;
|
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};
|
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struct drm_nouveau_vm_bind_op {
|
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__u32 op;
|
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#define DRM_NOUVEAU_VM_BIND_OP_MAP 0x0
|
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#define DRM_NOUVEAU_VM_BIND_OP_UNMAP 0x1
|
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__u32 flags;
|
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#define DRM_NOUVEAU_VM_BIND_SPARSE (1 << 8)
|
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__u32 handle;
|
||||
__u32 pad;
|
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__u64 addr;
|
||||
__u64 bo_offset;
|
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__u64 range;
|
||||
};
|
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struct drm_nouveau_vm_bind {
|
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__u32 op_count;
|
||||
__u32 flags;
|
||||
#define DRM_NOUVEAU_VM_BIND_RUN_ASYNC 0x1
|
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__u32 wait_count;
|
||||
__u32 sig_count;
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||||
__u64 wait_ptr;
|
||||
__u64 sig_ptr;
|
||||
__u64 op_ptr;
|
||||
};
|
||||
struct drm_nouveau_exec_push {
|
||||
__u64 va;
|
||||
__u32 va_len;
|
||||
__u32 flags;
|
||||
#define DRM_NOUVEAU_EXEC_PUSH_NO_PREFETCH 0x1
|
||||
};
|
||||
struct drm_nouveau_exec {
|
||||
__u32 channel;
|
||||
__u32 push_count;
|
||||
__u32 wait_count;
|
||||
__u32 sig_count;
|
||||
__u64 wait_ptr;
|
||||
__u64 sig_ptr;
|
||||
__u64 push_ptr;
|
||||
};
|
||||
#define DRM_NOUVEAU_GETPARAM 0x00
|
||||
#define DRM_NOUVEAU_SETPARAM 0x01
|
||||
#define DRM_NOUVEAU_CHANNEL_ALLOC 0x02
|
||||
|
|
@ -115,6 +197,9 @@ struct drm_nouveau_gem_cpu_fini {
|
|||
#define DRM_NOUVEAU_NVIF 0x07
|
||||
#define DRM_NOUVEAU_SVM_INIT 0x08
|
||||
#define DRM_NOUVEAU_SVM_BIND 0x09
|
||||
#define DRM_NOUVEAU_VM_INIT 0x10
|
||||
#define DRM_NOUVEAU_VM_BIND 0x11
|
||||
#define DRM_NOUVEAU_EXEC 0x12
|
||||
#define DRM_NOUVEAU_GEM_NEW 0x40
|
||||
#define DRM_NOUVEAU_GEM_PUSHBUF 0x41
|
||||
#define DRM_NOUVEAU_GEM_CPU_PREP 0x42
|
||||
|
|
@ -147,6 +232,9 @@ struct drm_nouveau_svm_bind {
|
|||
#define NOUVEAU_SVM_BIND_VALID_MASK ((1ULL << NOUVEAU_SVM_BIND_VALID_BITS) - 1)
|
||||
#define NOUVEAU_SVM_BIND_COMMAND__MIGRATE 0
|
||||
#define NOUVEAU_SVM_BIND_TARGET__GPU_VRAM (1UL << 31)
|
||||
#define DRM_IOCTL_NOUVEAU_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GETPARAM, struct drm_nouveau_getparam)
|
||||
#define DRM_IOCTL_NOUVEAU_CHANNEL_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_CHANNEL_ALLOC, struct drm_nouveau_channel_alloc)
|
||||
#define DRM_IOCTL_NOUVEAU_CHANNEL_FREE DRM_IOW(DRM_COMMAND_BASE + DRM_NOUVEAU_CHANNEL_FREE, struct drm_nouveau_channel_free)
|
||||
#define DRM_IOCTL_NOUVEAU_SVM_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_SVM_INIT, struct drm_nouveau_svm_init)
|
||||
#define DRM_IOCTL_NOUVEAU_SVM_BIND DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_SVM_BIND, struct drm_nouveau_svm_bind)
|
||||
#define DRM_IOCTL_NOUVEAU_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_NEW, struct drm_nouveau_gem_new)
|
||||
|
|
@ -154,6 +242,9 @@ struct drm_nouveau_svm_bind {
|
|||
#define DRM_IOCTL_NOUVEAU_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_PREP, struct drm_nouveau_gem_cpu_prep)
|
||||
#define DRM_IOCTL_NOUVEAU_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_FINI, struct drm_nouveau_gem_cpu_fini)
|
||||
#define DRM_IOCTL_NOUVEAU_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_INFO, struct drm_nouveau_gem_info)
|
||||
#define DRM_IOCTL_NOUVEAU_VM_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_VM_INIT, struct drm_nouveau_vm_init)
|
||||
#define DRM_IOCTL_NOUVEAU_VM_BIND DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_VM_BIND, struct drm_nouveau_vm_bind)
|
||||
#define DRM_IOCTL_NOUVEAU_EXEC DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_EXEC, struct drm_nouveau_exec)
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -42,6 +42,13 @@ struct drm_virtgpu_map {
|
|||
__u32 handle;
|
||||
__u32 pad;
|
||||
};
|
||||
#define VIRTGPU_EXECBUF_SYNCOBJ_RESET 0x01
|
||||
#define VIRTGPU_EXECBUF_SYNCOBJ_FLAGS (VIRTGPU_EXECBUF_SYNCOBJ_RESET | 0)
|
||||
struct drm_virtgpu_execbuffer_syncobj {
|
||||
__u32 handle;
|
||||
__u32 flags;
|
||||
__u64 point;
|
||||
};
|
||||
struct drm_virtgpu_execbuffer {
|
||||
__u32 flags;
|
||||
__u32 size;
|
||||
|
|
@ -50,7 +57,11 @@ struct drm_virtgpu_execbuffer {
|
|||
__u32 num_bo_handles;
|
||||
__s32 fence_fd;
|
||||
__u32 ring_idx;
|
||||
__u32 pad;
|
||||
__u32 syncobj_stride;
|
||||
__u32 num_in_syncobjs;
|
||||
__u32 num_out_syncobjs;
|
||||
__u64 in_syncobjs;
|
||||
__u64 out_syncobjs;
|
||||
};
|
||||
#define VIRTGPU_PARAM_3D_FEATURES 1
|
||||
#define VIRTGPU_PARAM_CAPSET_QUERY_FIX 2
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@
|
|||
#define BPF_JMP32 0x06
|
||||
#define BPF_ALU64 0x07
|
||||
#define BPF_DW 0x18
|
||||
#define BPF_MEMSX 0x80
|
||||
#define BPF_ATOMIC 0xc0
|
||||
#define BPF_XADD 0xc0
|
||||
#define BPF_MOV 0xb0
|
||||
|
|
@ -253,6 +254,9 @@ enum bpf_attach_type {
|
|||
BPF_LSM_CGROUP,
|
||||
BPF_STRUCT_OPS,
|
||||
BPF_NETFILTER,
|
||||
BPF_TCX_INGRESS,
|
||||
BPF_TCX_EGRESS,
|
||||
BPF_TRACE_UPROBE_MULTI,
|
||||
__MAX_BPF_ATTACH_TYPE
|
||||
};
|
||||
#define MAX_BPF_ATTACH_TYPE __MAX_BPF_ATTACH_TYPE
|
||||
|
|
@ -268,11 +272,26 @@ enum bpf_link_type {
|
|||
BPF_LINK_TYPE_KPROBE_MULTI = 8,
|
||||
BPF_LINK_TYPE_STRUCT_OPS = 9,
|
||||
BPF_LINK_TYPE_NETFILTER = 10,
|
||||
BPF_LINK_TYPE_TCX = 11,
|
||||
BPF_LINK_TYPE_UPROBE_MULTI = 12,
|
||||
MAX_BPF_LINK_TYPE,
|
||||
};
|
||||
enum bpf_perf_event_type {
|
||||
BPF_PERF_EVENT_UNSPEC = 0,
|
||||
BPF_PERF_EVENT_UPROBE = 1,
|
||||
BPF_PERF_EVENT_URETPROBE = 2,
|
||||
BPF_PERF_EVENT_KPROBE = 3,
|
||||
BPF_PERF_EVENT_KRETPROBE = 4,
|
||||
BPF_PERF_EVENT_TRACEPOINT = 5,
|
||||
BPF_PERF_EVENT_EVENT = 6,
|
||||
};
|
||||
#define BPF_F_ALLOW_OVERRIDE (1U << 0)
|
||||
#define BPF_F_ALLOW_MULTI (1U << 1)
|
||||
#define BPF_F_REPLACE (1U << 2)
|
||||
#define BPF_F_BEFORE (1U << 3)
|
||||
#define BPF_F_AFTER (1U << 4)
|
||||
#define BPF_F_ID (1U << 5)
|
||||
#define BPF_F_LINK BPF_F_LINK
|
||||
#define BPF_F_STRICT_ALIGNMENT (1U << 0)
|
||||
#define BPF_F_ANY_ALIGNMENT (1U << 1)
|
||||
#define BPF_F_TEST_RND_HI32 (1U << 2)
|
||||
|
|
@ -280,7 +299,13 @@ enum bpf_link_type {
|
|||
#define BPF_F_SLEEPABLE (1U << 4)
|
||||
#define BPF_F_XDP_HAS_FRAGS (1U << 5)
|
||||
#define BPF_F_XDP_DEV_BOUND_ONLY (1U << 6)
|
||||
#define BPF_F_KPROBE_MULTI_RETURN (1U << 0)
|
||||
enum {
|
||||
BPF_F_KPROBE_MULTI_RETURN = (1U << 0)
|
||||
};
|
||||
enum {
|
||||
BPF_F_UPROBE_MULTI_RETURN = (1U << 0)
|
||||
};
|
||||
#define BPF_F_NETFILTER_IP_DEFRAG (1U << 0)
|
||||
#define BPF_PSEUDO_MAP_FD 1
|
||||
#define BPF_PSEUDO_MAP_IDX 5
|
||||
#define BPF_PSEUDO_MAP_VALUE 2
|
||||
|
|
@ -407,11 +432,19 @@ union bpf_attr {
|
|||
__s32 path_fd;
|
||||
};
|
||||
struct {
|
||||
__u32 target_fd;
|
||||
union {
|
||||
__u32 target_fd;
|
||||
__u32 target_ifindex;
|
||||
};
|
||||
__u32 attach_bpf_fd;
|
||||
__u32 attach_type;
|
||||
__u32 attach_flags;
|
||||
__u32 replace_bpf_fd;
|
||||
union {
|
||||
__u32 relative_fd;
|
||||
__u32 relative_id;
|
||||
};
|
||||
__u64 expected_revision;
|
||||
};
|
||||
struct {
|
||||
__u32 prog_fd;
|
||||
|
|
@ -447,13 +480,23 @@ union bpf_attr {
|
|||
__aligned_u64 info;
|
||||
} info;
|
||||
struct {
|
||||
__u32 target_fd;
|
||||
union {
|
||||
__u32 target_fd;
|
||||
__u32 target_ifindex;
|
||||
};
|
||||
__u32 attach_type;
|
||||
__u32 query_flags;
|
||||
__u32 attach_flags;
|
||||
__aligned_u64 prog_ids;
|
||||
__u32 prog_cnt;
|
||||
union {
|
||||
__u32 prog_cnt;
|
||||
__u32 count;
|
||||
};
|
||||
__u32 : 32;
|
||||
__aligned_u64 prog_attach_flags;
|
||||
__aligned_u64 link_ids;
|
||||
__aligned_u64 link_attach_flags;
|
||||
__u64 revision;
|
||||
} query;
|
||||
struct {
|
||||
__u64 name;
|
||||
|
|
@ -515,6 +558,22 @@ union bpf_attr {
|
|||
__s32 priority;
|
||||
__u32 flags;
|
||||
} netfilter;
|
||||
struct {
|
||||
union {
|
||||
__u32 relative_fd;
|
||||
__u32 relative_id;
|
||||
};
|
||||
__u64 expected_revision;
|
||||
} tcx;
|
||||
struct {
|
||||
__aligned_u64 path;
|
||||
__aligned_u64 offsets;
|
||||
__aligned_u64 ref_ctr_offsets;
|
||||
__aligned_u64 cookies;
|
||||
__u32 cnt;
|
||||
__u32 flags;
|
||||
__u32 pid;
|
||||
} uprobe_multi;
|
||||
};
|
||||
} link_create;
|
||||
struct {
|
||||
|
|
@ -805,6 +864,12 @@ struct bpf_sock_tuple {
|
|||
} ipv6;
|
||||
};
|
||||
};
|
||||
enum tcx_action_base {
|
||||
TCX_NEXT = - 1,
|
||||
TCX_PASS = 0,
|
||||
TCX_DROP = 2,
|
||||
TCX_REDIRECT = 7,
|
||||
};
|
||||
struct bpf_xdp_sock {
|
||||
__u32 queue_id;
|
||||
};
|
||||
|
|
@ -987,6 +1052,40 @@ struct bpf_link_info {
|
|||
__s32 priority;
|
||||
__u32 flags;
|
||||
} netfilter;
|
||||
struct {
|
||||
__aligned_u64 addrs;
|
||||
__u32 count;
|
||||
__u32 flags;
|
||||
} kprobe_multi;
|
||||
struct {
|
||||
__u32 type;
|
||||
__u32 : 32;
|
||||
union {
|
||||
struct {
|
||||
__aligned_u64 file_name;
|
||||
__u32 name_len;
|
||||
__u32 offset;
|
||||
} uprobe;
|
||||
struct {
|
||||
__aligned_u64 func_name;
|
||||
__u32 name_len;
|
||||
__u32 offset;
|
||||
__u64 addr;
|
||||
} kprobe;
|
||||
struct {
|
||||
__aligned_u64 tp_name;
|
||||
__u32 name_len;
|
||||
} tracepoint;
|
||||
struct {
|
||||
__u64 config;
|
||||
__u32 type;
|
||||
} event;
|
||||
};
|
||||
} perf_event;
|
||||
struct {
|
||||
__u32 ifindex;
|
||||
__u32 attach_type;
|
||||
} tcx;
|
||||
};
|
||||
} __attribute__((aligned(8)));
|
||||
struct bpf_sock_addr {
|
||||
|
|
@ -1261,6 +1360,7 @@ struct bpf_list_head {
|
|||
struct bpf_list_node {
|
||||
__u64 : 64;
|
||||
__u64 : 64;
|
||||
__u64 : 64;
|
||||
} __attribute__((aligned(8)));
|
||||
struct bpf_rb_root {
|
||||
__u64 : 64;
|
||||
|
|
@ -1270,6 +1370,7 @@ struct bpf_rb_node {
|
|||
__u64 : 64;
|
||||
__u64 : 64;
|
||||
__u64 : 64;
|
||||
__u64 : 64;
|
||||
} __attribute__((aligned(8)));
|
||||
struct bpf_refcount {
|
||||
__u32 : 32;
|
||||
|
|
|
|||
|
|
@ -74,7 +74,6 @@
|
|||
#define BTRFS_METADATA_ITEM_KEY 169
|
||||
#define BTRFS_TREE_BLOCK_REF_KEY 176
|
||||
#define BTRFS_EXTENT_DATA_REF_KEY 178
|
||||
#define BTRFS_EXTENT_REF_V0_KEY 180
|
||||
#define BTRFS_SHARED_BLOCK_REF_KEY 182
|
||||
#define BTRFS_SHARED_DATA_REF_KEY 184
|
||||
#define BTRFS_BLOCK_GROUP_ITEM_KEY 192
|
||||
|
|
|
|||
|
|
@ -23,19 +23,26 @@ enum proc_cn_mcast_op {
|
|||
PROC_CN_MCAST_LISTEN = 1,
|
||||
PROC_CN_MCAST_IGNORE = 2
|
||||
};
|
||||
#define PROC_EVENT_ALL (PROC_EVENT_FORK | PROC_EVENT_EXEC | PROC_EVENT_UID | PROC_EVENT_GID | PROC_EVENT_SID | PROC_EVENT_PTRACE | PROC_EVENT_COMM | PROC_EVENT_NONZERO_EXIT | PROC_EVENT_COREDUMP | PROC_EVENT_EXIT)
|
||||
enum proc_cn_event {
|
||||
PROC_EVENT_NONE = 0x00000000,
|
||||
PROC_EVENT_FORK = 0x00000001,
|
||||
PROC_EVENT_EXEC = 0x00000002,
|
||||
PROC_EVENT_UID = 0x00000004,
|
||||
PROC_EVENT_GID = 0x00000040,
|
||||
PROC_EVENT_SID = 0x00000080,
|
||||
PROC_EVENT_PTRACE = 0x00000100,
|
||||
PROC_EVENT_COMM = 0x00000200,
|
||||
PROC_EVENT_NONZERO_EXIT = 0x20000000,
|
||||
PROC_EVENT_COREDUMP = 0x40000000,
|
||||
PROC_EVENT_EXIT = 0x80000000
|
||||
};
|
||||
struct proc_input {
|
||||
enum proc_cn_mcast_op mcast_op;
|
||||
enum proc_cn_event event_type;
|
||||
};
|
||||
struct proc_event {
|
||||
enum what {
|
||||
PROC_EVENT_NONE = 0x00000000,
|
||||
PROC_EVENT_FORK = 0x00000001,
|
||||
PROC_EVENT_EXEC = 0x00000002,
|
||||
PROC_EVENT_UID = 0x00000004,
|
||||
PROC_EVENT_GID = 0x00000040,
|
||||
PROC_EVENT_SID = 0x00000080,
|
||||
PROC_EVENT_PTRACE = 0x00000100,
|
||||
PROC_EVENT_COMM = 0x00000200,
|
||||
PROC_EVENT_COREDUMP = 0x40000000,
|
||||
PROC_EVENT_EXIT = 0x80000000
|
||||
} what;
|
||||
enum proc_cn_event what;
|
||||
__u32 cpu;
|
||||
__u64 __attribute__((aligned(8))) timestamp_ns;
|
||||
union {
|
||||
|
|
|
|||
|
|
@ -462,10 +462,14 @@ enum devlink_resource_unit {
|
|||
enum devlink_port_fn_attr_cap {
|
||||
DEVLINK_PORT_FN_ATTR_CAP_ROCE_BIT,
|
||||
DEVLINK_PORT_FN_ATTR_CAP_MIGRATABLE_BIT,
|
||||
DEVLINK_PORT_FN_ATTR_CAP_IPSEC_CRYPTO_BIT,
|
||||
DEVLINK_PORT_FN_ATTR_CAP_IPSEC_PACKET_BIT,
|
||||
__DEVLINK_PORT_FN_ATTR_CAPS_MAX,
|
||||
};
|
||||
#define DEVLINK_PORT_FN_CAP_ROCE _BITUL(DEVLINK_PORT_FN_ATTR_CAP_ROCE_BIT)
|
||||
#define DEVLINK_PORT_FN_CAP_MIGRATABLE _BITUL(DEVLINK_PORT_FN_ATTR_CAP_MIGRATABLE_BIT)
|
||||
#define DEVLINK_PORT_FN_CAP_IPSEC_CRYPTO _BITUL(DEVLINK_PORT_FN_ATTR_CAP_IPSEC_CRYPTO_BIT)
|
||||
#define DEVLINK_PORT_FN_CAP_IPSEC_PACKET _BITUL(DEVLINK_PORT_FN_ATTR_CAP_IPSEC_PACKET_BIT)
|
||||
enum devlink_port_function_attr {
|
||||
DEVLINK_PORT_FUNCTION_ATTR_UNSPEC,
|
||||
DEVLINK_PORT_FUNCTION_ATTR_HW_ADDR,
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@ enum {
|
|||
DLM_PLOCK_OP_LOCK = 1,
|
||||
DLM_PLOCK_OP_UNLOCK,
|
||||
DLM_PLOCK_OP_GET,
|
||||
DLM_PLOCK_OP_CANCEL,
|
||||
};
|
||||
#define DLM_PLOCK_FL_CLOSE 1
|
||||
struct dlm_plock_info {
|
||||
|
|
|
|||
|
|
@ -31,4 +31,15 @@ struct elf32_fdpic_loadmap {
|
|||
struct elf32_fdpic_loadseg segs[];
|
||||
};
|
||||
#define ELF32_FDPIC_LOADMAP_VERSION 0x0000
|
||||
struct elf64_fdpic_loadseg {
|
||||
Elf64_Addr addr;
|
||||
Elf64_Addr p_vaddr;
|
||||
Elf64_Word p_memsz;
|
||||
};
|
||||
struct elf64_fdpic_loadmap {
|
||||
Elf64_Half version;
|
||||
Elf64_Half nsegs;
|
||||
struct elf64_fdpic_loadseg segs[];
|
||||
};
|
||||
#define ELF64_FDPIC_LOADMAP_VERSION 0x0000
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -340,6 +340,7 @@ typedef struct elf64_shdr {
|
|||
#define NT_386_TLS 0x200
|
||||
#define NT_386_IOPERM 0x201
|
||||
#define NT_X86_XSTATE 0x202
|
||||
#define NT_X86_SHSTK 0x204
|
||||
#define NT_S390_HIGH_GPRS 0x300
|
||||
#define NT_S390_TIMER 0x301
|
||||
#define NT_S390_TODCMP 0x302
|
||||
|
|
@ -374,6 +375,8 @@ typedef struct elf64_shdr {
|
|||
#define NT_MIPS_DSP 0x800
|
||||
#define NT_MIPS_FP_MODE 0x801
|
||||
#define NT_MIPS_MSA 0x802
|
||||
#define NT_RISCV_CSR 0x900
|
||||
#define NT_RISCV_VECTOR 0x901
|
||||
#define NT_LOONGARCH_CPUCFG 0xa00
|
||||
#define NT_LOONGARCH_CSR 0xa01
|
||||
#define NT_LOONGARCH_LSX 0xa02
|
||||
|
|
|
|||
|
|
@ -48,5 +48,6 @@ struct scom_access {
|
|||
#define FSI_SCOM_READ _IOWR('s', 0x01, struct scom_access)
|
||||
#define FSI_SCOM_WRITE _IOWR('s', 0x02, struct scom_access)
|
||||
#define FSI_SCOM_RESET _IOW('s', 0x03, __u32)
|
||||
#define FSI_SBEFIFO_CMD_TIMEOUT_SECONDS _IOW('s', 0x01, __u32)
|
||||
#define FSI_SBEFIFO_READ_TIMEOUT_SECONDS _IOW('s', 0x00, __u32)
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -20,7 +20,7 @@
|
|||
#define _LINUX_FUSE_H
|
||||
#include <stdint.h>
|
||||
#define FUSE_KERNEL_VERSION 7
|
||||
#define FUSE_KERNEL_MINOR_VERSION 38
|
||||
#define FUSE_KERNEL_MINOR_VERSION 39
|
||||
#define FUSE_ROOT_ID 1
|
||||
struct fuse_attr {
|
||||
uint64_t ino;
|
||||
|
|
@ -40,6 +40,34 @@ struct fuse_attr {
|
|||
uint32_t blksize;
|
||||
uint32_t flags;
|
||||
};
|
||||
struct fuse_sx_time {
|
||||
int64_t tv_sec;
|
||||
uint32_t tv_nsec;
|
||||
int32_t __reserved;
|
||||
};
|
||||
struct fuse_statx {
|
||||
uint32_t mask;
|
||||
uint32_t blksize;
|
||||
uint64_t attributes;
|
||||
uint32_t nlink;
|
||||
uint32_t uid;
|
||||
uint32_t gid;
|
||||
uint16_t mode;
|
||||
uint16_t __spare0[1];
|
||||
uint64_t ino;
|
||||
uint64_t size;
|
||||
uint64_t blocks;
|
||||
uint64_t attributes_mask;
|
||||
struct fuse_sx_time atime;
|
||||
struct fuse_sx_time btime;
|
||||
struct fuse_sx_time ctime;
|
||||
struct fuse_sx_time mtime;
|
||||
uint32_t rdev_major;
|
||||
uint32_t rdev_minor;
|
||||
uint32_t dev_major;
|
||||
uint32_t dev_minor;
|
||||
uint64_t __spare2[14];
|
||||
};
|
||||
struct fuse_kstatfs {
|
||||
uint64_t blocks;
|
||||
uint64_t bfree;
|
||||
|
|
@ -113,6 +141,7 @@ struct fuse_file_lock {
|
|||
#define FUSE_HAS_INODE_DAX (1ULL << 33)
|
||||
#define FUSE_CREATE_SUPP_GROUP (1ULL << 34)
|
||||
#define FUSE_HAS_EXPIRE_ONLY (1ULL << 35)
|
||||
#define FUSE_DIRECT_IO_RELAX (1ULL << 36)
|
||||
#if FUSE_KERNEL_VERSION > 7 || FUSE_KERNEL_VERSION == 7 && FUSE_KERNEL_MINOR_VERSION >= 36
|
||||
#define FUSE_PASSTHROUGH (1ULL << 63)
|
||||
#else
|
||||
|
|
@ -196,6 +225,7 @@ enum fuse_opcode {
|
|||
FUSE_REMOVEMAPPING = 49,
|
||||
FUSE_SYNCFS = 50,
|
||||
FUSE_TMPFILE = 51,
|
||||
FUSE_STATX = 52,
|
||||
FUSE_CANONICAL_PATH = 2016,
|
||||
CUSE_INIT = 4096,
|
||||
CUSE_INIT_BSWAP_RESERVED = 1048576,
|
||||
|
|
@ -244,6 +274,20 @@ struct fuse_attr_out {
|
|||
uint32_t dummy;
|
||||
struct fuse_attr attr;
|
||||
};
|
||||
struct fuse_statx_in {
|
||||
uint32_t getattr_flags;
|
||||
uint32_t reserved;
|
||||
uint64_t fh;
|
||||
uint32_t sx_flags;
|
||||
uint32_t sx_mask;
|
||||
};
|
||||
struct fuse_statx_out {
|
||||
uint64_t attr_valid;
|
||||
uint32_t attr_valid_nsec;
|
||||
uint32_t flags;
|
||||
uint64_t spare[2];
|
||||
struct fuse_statx stat;
|
||||
};
|
||||
#define FUSE_COMPAT_MKNOD_IN_SIZE 8
|
||||
struct fuse_mknod_in {
|
||||
uint32_t mode;
|
||||
|
|
|
|||
|
|
@ -18,9 +18,11 @@
|
|||
****************************************************************************/
|
||||
#ifndef _LINUX_GSMMUX_H
|
||||
#define _LINUX_GSMMUX_H
|
||||
#include <linux/const.h>
|
||||
#include <linux/if.h>
|
||||
#include <linux/ioctl.h>
|
||||
#include <linux/types.h>
|
||||
#define GSM_FL_RESTART _BITUL(0)
|
||||
struct gsm_config {
|
||||
unsigned int adaption;
|
||||
unsigned int encapsulation;
|
||||
|
|
@ -50,7 +52,8 @@ struct gsm_netconfig {
|
|||
struct gsm_config_ext {
|
||||
__u32 keep_alive;
|
||||
__u32 wait_config;
|
||||
__u32 reserved[6];
|
||||
__u32 flags;
|
||||
__u32 reserved[5];
|
||||
};
|
||||
#define GSMIOC_GETCONF_EXT _IOR('G', 5, struct gsm_config_ext)
|
||||
#define GSMIOC_SETCONF_EXT _IOW('G', 6, struct gsm_config_ext)
|
||||
|
|
@ -61,7 +64,8 @@ struct gsm_dlci_config {
|
|||
__u32 priority;
|
||||
__u32 i;
|
||||
__u32 k;
|
||||
__u32 reserved[8];
|
||||
__u32 flags;
|
||||
__u32 reserved[7];
|
||||
};
|
||||
#define GSMIOC_GETCONF_DLCI _IOWR('G', 7, struct gsm_dlci_config)
|
||||
#define GSMIOC_SETCONF_DLCI _IOW('G', 8, struct gsm_dlci_config)
|
||||
|
|
|
|||
|
|
@ -45,5 +45,5 @@ enum gtp_attrs {
|
|||
GTPA_PAD,
|
||||
__GTPA_MAX,
|
||||
};
|
||||
#define GTPA_MAX (__GTPA_MAX + 1)
|
||||
#define GTPA_MAX (__GTPA_MAX - 1)
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -312,6 +312,7 @@ enum {
|
|||
IFLA_BRPORT_MCAST_N_GROUPS,
|
||||
IFLA_BRPORT_MCAST_MAX_GROUPS,
|
||||
IFLA_BRPORT_NEIGH_VLAN_SUPPRESS,
|
||||
IFLA_BRPORT_BACKUP_NHID,
|
||||
__IFLA_BRPORT_MAX
|
||||
};
|
||||
#define IFLA_BRPORT_MAX (__IFLA_BRPORT_MAX - 1)
|
||||
|
|
|
|||
|
|
@ -32,10 +32,7 @@ struct sockaddr_ll {
|
|||
unsigned short sll_hatype;
|
||||
unsigned char sll_pkttype;
|
||||
unsigned char sll_halen;
|
||||
union {
|
||||
unsigned char sll_addr[8];
|
||||
__DECLARE_FLEX_ARRAY(unsigned char, sll_addr_flex);
|
||||
};
|
||||
unsigned char sll_addr[8];
|
||||
};
|
||||
#define PACKET_HOST 0
|
||||
#define PACKET_BROADCAST 1
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@
|
|||
#define XDP_COPY (1 << 1)
|
||||
#define XDP_ZEROCOPY (1 << 2)
|
||||
#define XDP_USE_NEED_WAKEUP (1 << 3)
|
||||
#define XDP_USE_SG (1 << 4)
|
||||
#define XDP_UMEM_UNALIGNED_CHUNK_FLAG (1 << 0)
|
||||
struct sockaddr_xdp {
|
||||
__u16 sxdp_family;
|
||||
|
|
@ -82,4 +83,5 @@ struct xdp_desc {
|
|||
__u32 len;
|
||||
__u32 options;
|
||||
};
|
||||
#define XDP_PKT_CONTD (1 << 0)
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -120,6 +120,7 @@ enum {
|
|||
#define IORING_SETUP_DEFER_TASKRUN (1U << 13)
|
||||
#define IORING_SETUP_NO_MMAP (1U << 14)
|
||||
#define IORING_SETUP_REGISTERED_FD_ONLY (1U << 15)
|
||||
#define IORING_SETUP_NO_SQARRAY (1U << 16)
|
||||
enum io_uring_op {
|
||||
IORING_OP_NOP,
|
||||
IORING_OP_READV,
|
||||
|
|
@ -193,6 +194,8 @@ enum io_uring_op {
|
|||
#define IORING_ASYNC_CANCEL_FD (1U << 1)
|
||||
#define IORING_ASYNC_CANCEL_ANY (1U << 2)
|
||||
#define IORING_ASYNC_CANCEL_FD_FIXED (1U << 3)
|
||||
#define IORING_ASYNC_CANCEL_USERDATA (1U << 4)
|
||||
#define IORING_ASYNC_CANCEL_OP (1U << 5)
|
||||
#define IORING_RECVSEND_POLL_FIRST (1U << 0)
|
||||
#define IORING_RECV_MULTISHOT (1U << 1)
|
||||
#define IORING_RECVSEND_FIXED_BUF (1U << 2)
|
||||
|
|
@ -411,7 +414,9 @@ struct io_uring_sync_cancel_reg {
|
|||
__s32 fd;
|
||||
__u32 flags;
|
||||
struct __kernel_timespec timeout;
|
||||
__u64 pad[4];
|
||||
__u8 opcode;
|
||||
__u8 pad[7];
|
||||
__u64 pad2[3];
|
||||
};
|
||||
struct io_uring_file_index_range {
|
||||
__u32 off;
|
||||
|
|
@ -424,6 +429,10 @@ struct io_uring_recvmsg_out {
|
|||
__u32 payloadlen;
|
||||
__u32 flags;
|
||||
};
|
||||
enum {
|
||||
SOCKET_URING_OP_SIOCINQ = 0,
|
||||
SOCKET_URING_OP_SIOCOUTQ,
|
||||
};
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -32,6 +32,8 @@ enum {
|
|||
IOMMUFD_CMD_IOAS_UNMAP,
|
||||
IOMMUFD_CMD_OPTION,
|
||||
IOMMUFD_CMD_VFIO_IOAS,
|
||||
IOMMUFD_CMD_HWPT_ALLOC,
|
||||
IOMMUFD_CMD_GET_HW_INFO,
|
||||
};
|
||||
struct iommu_destroy {
|
||||
__u32 size;
|
||||
|
|
@ -126,4 +128,33 @@ struct iommu_vfio_ioas {
|
|||
__u16 __reserved;
|
||||
};
|
||||
#define IOMMU_VFIO_IOAS _IO(IOMMUFD_TYPE, IOMMUFD_CMD_VFIO_IOAS)
|
||||
struct iommu_hwpt_alloc {
|
||||
__u32 size;
|
||||
__u32 flags;
|
||||
__u32 dev_id;
|
||||
__u32 pt_id;
|
||||
__u32 out_hwpt_id;
|
||||
__u32 __reserved;
|
||||
};
|
||||
#define IOMMU_HWPT_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_ALLOC)
|
||||
struct iommu_hw_info_vtd {
|
||||
__u32 flags;
|
||||
__u32 __reserved;
|
||||
__aligned_u64 cap_reg;
|
||||
__aligned_u64 ecap_reg;
|
||||
};
|
||||
enum iommu_hw_info_type {
|
||||
IOMMU_HW_INFO_TYPE_NONE,
|
||||
IOMMU_HW_INFO_TYPE_INTEL_VTD,
|
||||
};
|
||||
struct iommu_hw_info {
|
||||
__u32 size;
|
||||
__u32 flags;
|
||||
__u32 dev_id;
|
||||
__u32 data_len;
|
||||
__aligned_u64 data_uptr;
|
||||
__u32 out_data_type;
|
||||
__u32 __reserved;
|
||||
};
|
||||
#define IOMMU_GET_HW_INFO _IO(IOMMUFD_TYPE, IOMMUFD_CMD_GET_HW_INFO)
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -61,10 +61,10 @@ enum {
|
|||
IOPRIO_HINT_DEV_DURATION_LIMIT_7 = 7,
|
||||
};
|
||||
#define IOPRIO_BAD_VALUE(val,max) ((val) < 0 || (val) >= (max))
|
||||
static __always_inline __u16 ioprio_value(int __linux_class, int level, int hint) {
|
||||
if(IOPRIO_BAD_VALUE(__linux_class, IOPRIO_NR_CLASSES) || IOPRIO_BAD_VALUE(level, IOPRIO_NR_LEVELS) || IOPRIO_BAD_VALUE(hint, IOPRIO_NR_HINTS)) return IOPRIO_CLASS_INVALID << IOPRIO_CLASS_SHIFT;
|
||||
return(__linux_class << IOPRIO_CLASS_SHIFT) | (hint << IOPRIO_HINT_SHIFT) | level;
|
||||
static __always_inline __u16 ioprio_value(int prioclass, int priolevel, int priohint) {
|
||||
if(IOPRIO_BAD_VALUE(prioclass, IOPRIO_NR_CLASSES) || IOPRIO_BAD_VALUE(priolevel, IOPRIO_NR_LEVELS) || IOPRIO_BAD_VALUE(priohint, IOPRIO_NR_HINTS)) return IOPRIO_CLASS_INVALID << IOPRIO_CLASS_SHIFT;
|
||||
return(prioclass << IOPRIO_CLASS_SHIFT) | (priohint << IOPRIO_HINT_SHIFT) | priolevel;
|
||||
}
|
||||
#define IOPRIO_PRIO_VALUE(__linux_class,level) ioprio_value(__linux_class, level, IOPRIO_HINT_NONE)
|
||||
#define IOPRIO_PRIO_VALUE_HINT(__linux_class,level,hint) ioprio_value(__linux_class, level, hint)
|
||||
#define IOPRIO_PRIO_VALUE(prioclass,priolevel) ioprio_value(prioclass, priolevel, IOPRIO_HINT_NONE)
|
||||
#define IOPRIO_PRIO_VALUE_HINT(prioclass,priolevel,priohint) ioprio_value(prioclass, priolevel, priohint)
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -151,6 +151,7 @@ enum {
|
|||
DEVCONF_IOAM6_ID_WIDE,
|
||||
DEVCONF_NDISC_EVICT_NOCARRIER,
|
||||
DEVCONF_ACCEPT_UNTRACKED_NA,
|
||||
DEVCONF_ACCEPT_RA_MIN_LFT,
|
||||
DEVCONF_MAX
|
||||
};
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
#include <linux/types.h>
|
||||
#define KEXEC_ON_CRASH 0x00000001
|
||||
#define KEXEC_PRESERVE_CONTEXT 0x00000002
|
||||
#define KEXEC_UPDATE_ELFCOREHDR 0x00000004
|
||||
#define KEXEC_ARCH_MASK 0xffff0000
|
||||
#define KEXEC_FILE_UNLOAD 0x00000001
|
||||
#define KEXEC_FILE_ON_CRASH 0x00000002
|
||||
|
|
|
|||
|
|
@ -1108,9 +1108,12 @@ struct kvm_device_attr {
|
|||
__u64 attr;
|
||||
__u64 addr;
|
||||
};
|
||||
#define KVM_DEV_VFIO_GROUP 1
|
||||
#define KVM_DEV_VFIO_GROUP_ADD 1
|
||||
#define KVM_DEV_VFIO_GROUP_DEL 2
|
||||
#define KVM_DEV_VFIO_FILE 1
|
||||
#define KVM_DEV_VFIO_FILE_ADD 1
|
||||
#define KVM_DEV_VFIO_FILE_DEL 2
|
||||
#define KVM_DEV_VFIO_GROUP KVM_DEV_VFIO_FILE
|
||||
#define KVM_DEV_VFIO_GROUP_ADD KVM_DEV_VFIO_FILE_ADD
|
||||
#define KVM_DEV_VFIO_GROUP_DEL KVM_DEV_VFIO_FILE_DEL
|
||||
#define KVM_DEV_VFIO_GROUP_SET_SPAPR_TCE 3
|
||||
enum kvm_device_type {
|
||||
KVM_DEV_TYPE_FSL_MPIC_20 = 1,
|
||||
|
|
|
|||
|
|
@ -81,6 +81,8 @@
|
|||
#define MDIO_AN_10BT1_AN_CTRL 526
|
||||
#define MDIO_AN_10BT1_AN_STAT 527
|
||||
#define MDIO_PMA_PMD_BT1_CTRL 2100
|
||||
#define MDIO_PCS_1000BT1_CTRL 2304
|
||||
#define MDIO_PCS_1000BT1_STAT 2305
|
||||
#define MDIO_PMA_LASI_RXCTRL 0x9000
|
||||
#define MDIO_PMA_LASI_TXCTRL 0x9001
|
||||
#define MDIO_PMA_LASI_CTRL 0x9002
|
||||
|
|
@ -273,6 +275,8 @@
|
|||
#define MDIO_PMA_10T1L_STAT_LB_ABLE 0x2000
|
||||
#define MDIO_PCS_10T1L_CTRL_LB 0x4000
|
||||
#define MDIO_PCS_10T1L_CTRL_RESET 0x8000
|
||||
#define MDIO_PMA_PMD_BT1_B100_ABLE 0x0001
|
||||
#define MDIO_PMA_PMD_BT1_B1000_ABLE 0x0002
|
||||
#define MDIO_PMA_PMD_BT1_B10L_ABLE 0x0004
|
||||
#define MDIO_AN_T1_ADV_L_PAUSE_CAP ADVERTISE_PAUSE_CAP
|
||||
#define MDIO_AN_T1_ADV_L_PAUSE_ASYM ADVERTISE_PAUSE_ASYM
|
||||
|
|
@ -296,7 +300,14 @@
|
|||
#define MDIO_AN_T1_LP_H_10L_TX_HI 0x2000
|
||||
#define MDIO_AN_10BT1_AN_CTRL_ADV_EEE_T1L 0x4000
|
||||
#define MDIO_AN_10BT1_AN_STAT_LPA_EEE_T1L 0x4000
|
||||
#define MDIO_PMA_PMD_BT1_CTRL_STRAP 0x000F
|
||||
#define MDIO_PMA_PMD_BT1_CTRL_STRAP_B1000 0x0001
|
||||
#define MDIO_PMA_PMD_BT1_CTRL_CFG_MST 0x4000
|
||||
#define MDIO_PCS_1000BT1_CTRL_LOW_POWER 0x0800
|
||||
#define MDIO_PCS_1000BT1_CTRL_DISABLE_TX 0x4000
|
||||
#define MDIO_PCS_1000BT1_CTRL_RESET 0x8000
|
||||
#define MDIO_PCS_1000BT1_STAT_LINK 0x0004
|
||||
#define MDIO_PCS_1000BT1_STAT_FAULT 0x0080
|
||||
#define MDIO_AN_EEE_ADV_100TX 0x0002
|
||||
#define MDIO_AN_EEE_ADV_1000T 0x0004
|
||||
#define MDIO_EEE_100TX MDIO_AN_EEE_ADV_100TX
|
||||
|
|
|
|||
|
|
@ -79,6 +79,7 @@ enum fsconfig_command {
|
|||
FSCONFIG_SET_FD = 5,
|
||||
FSCONFIG_CMD_CREATE = 6,
|
||||
FSCONFIG_CMD_RECONFIGURE = 7,
|
||||
FSCONFIG_CMD_CREATE_EXCL = 8,
|
||||
};
|
||||
#define FSMOUNT_CLOEXEC 0x00000001
|
||||
#define MOUNT_ATTR_RDONLY 0x00000001
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@ enum {
|
|||
NETDEV_A_DEV_IFINDEX = 1,
|
||||
NETDEV_A_DEV_PAD,
|
||||
NETDEV_A_DEV_XDP_FEATURES,
|
||||
NETDEV_A_DEV_XDP_ZC_MAX_SEGS,
|
||||
__NETDEV_A_DEV_MAX,
|
||||
NETDEV_A_DEV_MAX = (__NETDEV_A_DEV_MAX - 1)
|
||||
};
|
||||
|
|
|
|||
|
|
@ -63,7 +63,7 @@ struct ebt_entries {
|
|||
unsigned int counter_offset;
|
||||
int policy;
|
||||
unsigned int nentries;
|
||||
char data[0] __attribute__((aligned(__alignof__(struct ebt_replace))));
|
||||
char data[] __attribute__((aligned(__alignof__(struct ebt_replace))));
|
||||
};
|
||||
#define EBT_ENTRY_OR_ENTRIES 0x01
|
||||
#define EBT_NOPROTO 0x02
|
||||
|
|
@ -88,7 +88,7 @@ struct ebt_entry_match {
|
|||
struct xt_match * match;
|
||||
} u;
|
||||
unsigned int match_size;
|
||||
unsigned char data[0] __attribute__((aligned(__alignof__(struct ebt_replace))));
|
||||
unsigned char data[] __attribute__((aligned(__alignof__(struct ebt_replace))));
|
||||
};
|
||||
struct ebt_entry_watcher {
|
||||
union {
|
||||
|
|
@ -99,7 +99,7 @@ struct ebt_entry_watcher {
|
|||
struct xt_target * watcher;
|
||||
} u;
|
||||
unsigned int watcher_size;
|
||||
unsigned char data[0] __attribute__((aligned(__alignof__(struct ebt_replace))));
|
||||
unsigned char data[] __attribute__((aligned(__alignof__(struct ebt_replace))));
|
||||
};
|
||||
struct ebt_entry_target {
|
||||
union {
|
||||
|
|
@ -129,10 +129,11 @@ struct ebt_entry {
|
|||
unsigned char sourcemsk[ETH_ALEN];
|
||||
unsigned char destmac[ETH_ALEN];
|
||||
unsigned char destmsk[ETH_ALEN];
|
||||
unsigned int watchers_offset;
|
||||
__struct_group(, offsets,, unsigned int watchers_offset;
|
||||
unsigned int target_offset;
|
||||
unsigned int next_offset;
|
||||
unsigned char elems[0] __attribute__((aligned(__alignof__(struct ebt_replace))));
|
||||
);
|
||||
unsigned char elems[] __attribute__((aligned(__alignof__(struct ebt_replace))));
|
||||
};
|
||||
#define EBT_BASE_CTL 128
|
||||
#define EBT_SO_SET_ENTRIES (EBT_BASE_CTL)
|
||||
|
|
|
|||
|
|
@ -466,6 +466,7 @@ enum ovs_action_attr {
|
|||
OVS_ACTION_ATTR_CHECK_PKT_LEN,
|
||||
OVS_ACTION_ATTR_ADD_MPLS,
|
||||
OVS_ACTION_ATTR_DEC_TTL,
|
||||
OVS_ACTION_ATTR_DROP,
|
||||
__OVS_ACTION_ATTR_MAX,
|
||||
};
|
||||
#define OVS_ACTION_ATTR_MAX (__OVS_ACTION_ATTR_MAX - 1)
|
||||
|
|
|
|||
|
|
@ -470,6 +470,7 @@ union perf_mem_data_src {
|
|||
#define PERF_MEM_LVLNUM_L2 0x02
|
||||
#define PERF_MEM_LVLNUM_L3 0x03
|
||||
#define PERF_MEM_LVLNUM_L4 0x04
|
||||
#define PERF_MEM_LVLNUM_UNC 0x08
|
||||
#define PERF_MEM_LVLNUM_CXL 0x09
|
||||
#define PERF_MEM_LVLNUM_IO 0x0a
|
||||
#define PERF_MEM_LVLNUM_ANY_CACHE 0x0b
|
||||
|
|
|
|||
|
|
@ -465,6 +465,8 @@ enum {
|
|||
TCA_FLOWER_KEY_L2TPV3_SID,
|
||||
TCA_FLOWER_L2_MISS,
|
||||
TCA_FLOWER_KEY_CFM,
|
||||
TCA_FLOWER_KEY_SPI,
|
||||
TCA_FLOWER_KEY_SPI_MASK,
|
||||
__TCA_FLOWER_MAX,
|
||||
};
|
||||
#define TCA_FLOWER_MAX (__TCA_FLOWER_MAX - 1)
|
||||
|
|
|
|||
|
|
@ -443,6 +443,7 @@ enum {
|
|||
TCA_NETEM_JITTER64,
|
||||
TCA_NETEM_SLOT,
|
||||
TCA_NETEM_SLOT_DIST,
|
||||
TCA_NETEM_PRNG_SEED,
|
||||
__TCA_NETEM_MAX,
|
||||
};
|
||||
#define TCA_NETEM_MAX (__TCA_NETEM_MAX - 1)
|
||||
|
|
|
|||
57
libc/kernel/uapi/linux/psp-dbc.h
Normal file
57
libc/kernel/uapi/linux/psp-dbc.h
Normal file
|
|
@ -0,0 +1,57 @@
|
|||
/****************************************************************************
|
||||
****************************************************************************
|
||||
***
|
||||
*** This header was automatically generated from a Linux kernel header
|
||||
*** of the same name, to make information necessary for userspace to
|
||||
*** call into the kernel available to libc. It contains only constants,
|
||||
*** structures, and macros generated from the original header, and thus,
|
||||
*** contains no copyrightable information.
|
||||
***
|
||||
*** To edit the content of this header, modify the corresponding
|
||||
*** source file (e.g. under external/kernel-headers/original/) then
|
||||
*** run bionic/libc/kernel/tools/update_all.py
|
||||
***
|
||||
*** Any manual change here will be lost the next time this script will
|
||||
*** be run. You've been warned!
|
||||
***
|
||||
****************************************************************************
|
||||
****************************************************************************/
|
||||
#ifndef __PSP_DBC_USER_H__
|
||||
#define __PSP_DBC_USER_H__
|
||||
#include <linux/types.h>
|
||||
#define DBC_NONCE_SIZE 16
|
||||
#define DBC_SIG_SIZE 32
|
||||
#define DBC_UID_SIZE 16
|
||||
struct dbc_user_nonce {
|
||||
__u32 auth_needed;
|
||||
__u8 nonce[DBC_NONCE_SIZE];
|
||||
__u8 signature[DBC_SIG_SIZE];
|
||||
} __attribute__((__packed__));
|
||||
struct dbc_user_setuid {
|
||||
__u8 uid[DBC_UID_SIZE];
|
||||
__u8 signature[DBC_SIG_SIZE];
|
||||
} __attribute__((__packed__));
|
||||
struct dbc_user_param {
|
||||
__u32 msg_index;
|
||||
__u32 param;
|
||||
__u8 signature[DBC_SIG_SIZE];
|
||||
} __attribute__((__packed__));
|
||||
#define DBC_IOC_TYPE 'D'
|
||||
#define DBCIOCNONCE _IOWR(DBC_IOC_TYPE, 0x1, struct dbc_user_nonce)
|
||||
#define DBCIOCUID _IOW(DBC_IOC_TYPE, 0x2, struct dbc_user_setuid)
|
||||
#define DBCIOCPARAM _IOWR(DBC_IOC_TYPE, 0x3, struct dbc_user_param)
|
||||
enum dbc_cmd_msg {
|
||||
PARAM_GET_FMAX_CAP = 0x3,
|
||||
PARAM_SET_FMAX_CAP = 0x4,
|
||||
PARAM_GET_PWR_CAP = 0x5,
|
||||
PARAM_SET_PWR_CAP = 0x6,
|
||||
PARAM_GET_GFX_MODE = 0x7,
|
||||
PARAM_SET_GFX_MODE = 0x8,
|
||||
PARAM_GET_CURR_TEMP = 0x9,
|
||||
PARAM_GET_FMAX_MAX = 0xA,
|
||||
PARAM_GET_FMAX_MIN = 0xB,
|
||||
PARAM_GET_SOC_PWR_MAX = 0xC,
|
||||
PARAM_GET_SOC_PWR_MIN = 0xD,
|
||||
PARAM_GET_SOC_PWR_CUR = 0xE,
|
||||
};
|
||||
#endif
|
||||
|
|
@ -42,6 +42,7 @@
|
|||
#define QFMT_VFS_V0 2
|
||||
#define QFMT_OCFS2 3
|
||||
#define QFMT_VFS_V1 4
|
||||
#define QFMT_SHMEM 5
|
||||
#define QIF_DQBLKSIZE_BITS 10
|
||||
#define QIF_DQBLKSIZE (1 << QIF_DQBLKSIZE_BITS)
|
||||
enum {
|
||||
|
|
|
|||
|
|
@ -30,4 +30,6 @@ struct rpmsg_endpoint_info {
|
|||
#define RPMSG_DESTROY_EPT_IOCTL _IO(0xb5, 0x2)
|
||||
#define RPMSG_CREATE_DEV_IOCTL _IOW(0xb5, 0x3, struct rpmsg_endpoint_info)
|
||||
#define RPMSG_RELEASE_DEV_IOCTL _IOW(0xb5, 0x4, struct rpmsg_endpoint_info)
|
||||
#define RPMSG_GET_OUTGOING_FLOWCONTROL _IOR(0xb5, 0x5, int)
|
||||
#define RPMSG_SET_INCOMING_FLOWCONTROL _IOR(0xb5, 0x6, int)
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -69,6 +69,7 @@ struct seccomp_notif_resp {
|
|||
__s32 error;
|
||||
__u32 flags;
|
||||
};
|
||||
#define SECCOMP_USER_NOTIF_FD_SYNC_WAKE_UP (1UL << 0)
|
||||
#define SECCOMP_ADDFD_FLAG_SETFD (1UL << 0)
|
||||
#define SECCOMP_ADDFD_FLAG_SEND (1UL << 1)
|
||||
struct seccomp_notif_addfd {
|
||||
|
|
@ -87,4 +88,5 @@ struct seccomp_notif_addfd {
|
|||
#define SECCOMP_IOCTL_NOTIF_SEND SECCOMP_IOWR(1, struct seccomp_notif_resp)
|
||||
#define SECCOMP_IOCTL_NOTIF_ID_VALID SECCOMP_IOW(2, __u64)
|
||||
#define SECCOMP_IOCTL_NOTIF_ADDFD SECCOMP_IOW(3, struct seccomp_notif_addfd)
|
||||
#define SECCOMP_IOCTL_NOTIF_SET_FLAGS SECCOMP_IOW(4, __u64)
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -49,12 +49,20 @@ enum opal_lock_state {
|
|||
enum opal_lock_flags {
|
||||
OPAL_SAVE_FOR_LOCK = 0x01,
|
||||
};
|
||||
enum opal_key_type {
|
||||
OPAL_INCLUDED = 0,
|
||||
OPAL_KEYRING,
|
||||
};
|
||||
struct opal_key {
|
||||
__u8 lr;
|
||||
__u8 key_len;
|
||||
__u8 __align[6];
|
||||
__u8 key_type;
|
||||
__u8 __align[5];
|
||||
__u8 key[OPAL_KEY_MAX];
|
||||
};
|
||||
enum opal_revert_lsp_opts {
|
||||
OPAL_PRESERVE = 0x01,
|
||||
};
|
||||
struct opal_lr_act {
|
||||
struct opal_key key;
|
||||
__u32 sum;
|
||||
|
|
@ -143,6 +151,15 @@ struct opal_geometry {
|
|||
__u64 lowest_aligned_lba;
|
||||
__u8 __align[3];
|
||||
};
|
||||
struct opal_discovery {
|
||||
__u64 data;
|
||||
__u64 size;
|
||||
};
|
||||
struct opal_revert_lsp {
|
||||
struct opal_key key;
|
||||
__u32 options;
|
||||
__u32 __pad;
|
||||
};
|
||||
#define IOC_OPAL_SAVE _IOW('p', 220, struct opal_lock_unlock)
|
||||
#define IOC_OPAL_LOCK_UNLOCK _IOW('p', 221, struct opal_lock_unlock)
|
||||
#define IOC_OPAL_TAKE_OWNERSHIP _IOW('p', 222, struct opal_key)
|
||||
|
|
@ -162,4 +179,6 @@ struct opal_geometry {
|
|||
#define IOC_OPAL_GET_STATUS _IOR('p', 236, struct opal_status)
|
||||
#define IOC_OPAL_GET_LR_STATUS _IOW('p', 237, struct opal_lr_status)
|
||||
#define IOC_OPAL_GET_GEOMETRY _IOR('p', 238, struct opal_geometry)
|
||||
#define IOC_OPAL_DISCOVERY _IOW('p', 239, struct opal_discovery)
|
||||
#define IOC_OPAL_REVERT_LSP _IOW('p', 240, struct opal_revert_lsp)
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -59,32 +59,21 @@
|
|||
#define PORT_SCI 52
|
||||
#define PORT_SCIF 53
|
||||
#define PORT_IRDA 54
|
||||
#define PORT_S3C2410 55
|
||||
#define PORT_IP22ZILOG 56
|
||||
#define PORT_LH7A40X 57
|
||||
#define PORT_CPM 58
|
||||
#define PORT_MPC52xx 59
|
||||
#define PORT_ICOM 60
|
||||
#define PORT_S3C2440 61
|
||||
#define PORT_IMX 62
|
||||
#define PORT_MPSC 63
|
||||
#define PORT_TXX9 64
|
||||
#define PORT_S3C2400 67
|
||||
#define PORT_M32R_SIO 68
|
||||
#define PORT_JSM 69
|
||||
#define PORT_SUNHV 72
|
||||
#define PORT_S3C2412 73
|
||||
#define PORT_UARTLITE 74
|
||||
#define PORT_BFIN 75
|
||||
#define PORT_BCM7271 76
|
||||
#define PORT_SB1250_DUART 77
|
||||
#define PORT_MCF 78
|
||||
#define PORT_BFIN_SPORT 79
|
||||
#define PORT_MN10300 80
|
||||
#define PORT_MN10300_CTS 81
|
||||
#define PORT_SC26XX 82
|
||||
#define PORT_SCIFA 83
|
||||
#define PORT_S3C6400 84
|
||||
#define PORT_NWPSERIAL 85
|
||||
#define PORT_MAX3100 86
|
||||
#define PORT_TIMBUART 87
|
||||
#define PORT_MSM 88
|
||||
|
|
@ -105,13 +94,11 @@
|
|||
#define PORT_LPUART 103
|
||||
#define PORT_HSCIF 104
|
||||
#define PORT_ASC 105
|
||||
#define PORT_TILEGX 106
|
||||
#define PORT_MEN_Z135 107
|
||||
#define PORT_SC16IS7XX 108
|
||||
#define PORT_MESON 109
|
||||
#define PORT_DIGICOLOR 110
|
||||
#define PORT_SPRD 111
|
||||
#define PORT_CRIS 112
|
||||
#define PORT_STM32 113
|
||||
#define PORT_MVEBU 114
|
||||
#define PORT_PIC32 115
|
||||
|
|
|
|||
|
|
@ -97,6 +97,8 @@ enum {
|
|||
enum {
|
||||
SMC_NLA_LGR_R_V2_UNSPEC,
|
||||
SMC_NLA_LGR_R_V2_DIRECT,
|
||||
SMC_NLA_LGR_R_V2_MAX_CONNS,
|
||||
SMC_NLA_LGR_R_V2_MAX_LINKS,
|
||||
__SMC_NLA_LGR_R_V2_MAX,
|
||||
SMC_NLA_LGR_R_V2_MAX = __SMC_NLA_LGR_R_V2_MAX - 1
|
||||
};
|
||||
|
|
|
|||
|
|
@ -23,5 +23,12 @@
|
|||
#define __always_inline inline
|
||||
#endif
|
||||
#define __struct_group(TAG,NAME,ATTRS,MEMBERS...) union { struct { MEMBERS } ATTRS; struct TAG { MEMBERS } ATTRS NAME; }
|
||||
#ifdef __cplusplus
|
||||
#define __DECLARE_FLEX_ARRAY(T,member) T member[0]
|
||||
#else
|
||||
#define __DECLARE_FLEX_ARRAY(TYPE,NAME) struct { struct { } __empty_ ##NAME; TYPE NAME[]; }
|
||||
#endif
|
||||
#ifndef __counted_by
|
||||
#define __counted_by(m)
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -75,6 +75,7 @@
|
|||
#define UBLK_F_UNPRIVILEGED_DEV (1UL << 5)
|
||||
#define UBLK_F_CMD_IOCTL_ENCODE (1UL << 6)
|
||||
#define UBLK_F_USER_COPY (1UL << 7)
|
||||
#define UBLK_F_ZONED (1ULL << 8)
|
||||
#define UBLK_S_DEV_DEAD 0
|
||||
#define UBLK_S_DEV_LIVE 1
|
||||
#define UBLK_S_DEV_QUIESCED 2
|
||||
|
|
@ -110,6 +111,13 @@ struct ublksrv_ctrl_dev_info {
|
|||
#define UBLK_IO_OP_DISCARD 3
|
||||
#define UBLK_IO_OP_WRITE_SAME 4
|
||||
#define UBLK_IO_OP_WRITE_ZEROES 5
|
||||
#define UBLK_IO_OP_ZONE_OPEN 10
|
||||
#define UBLK_IO_OP_ZONE_CLOSE 11
|
||||
#define UBLK_IO_OP_ZONE_FINISH 12
|
||||
#define UBLK_IO_OP_ZONE_APPEND 13
|
||||
#define UBLK_IO_OP_ZONE_RESET_ALL 14
|
||||
#define UBLK_IO_OP_ZONE_RESET 15
|
||||
#define UBLK_IO_OP_REPORT_ZONES 18
|
||||
#define UBLK_IO_F_FAILFAST_DEV (1U << 8)
|
||||
#define UBLK_IO_F_FAILFAST_TRANSPORT (1U << 9)
|
||||
#define UBLK_IO_F_FAILFAST_DRIVER (1U << 10)
|
||||
|
|
@ -119,7 +127,10 @@ struct ublksrv_ctrl_dev_info {
|
|||
#define UBLK_IO_F_SWAP (1U << 16)
|
||||
struct ublksrv_io_desc {
|
||||
__u32 op_flags;
|
||||
__u32 nr_sectors;
|
||||
union {
|
||||
__u32 nr_sectors;
|
||||
__u32 nr_zones;
|
||||
};
|
||||
__u64 start_sector;
|
||||
__u64 addr;
|
||||
};
|
||||
|
|
@ -127,7 +138,10 @@ struct ublksrv_io_cmd {
|
|||
__u16 q_id;
|
||||
__u16 tag;
|
||||
__s32 result;
|
||||
__u64 addr;
|
||||
union {
|
||||
__u64 addr;
|
||||
__u64 zone_append_lba;
|
||||
};
|
||||
};
|
||||
struct ublk_param_basic {
|
||||
#define UBLK_ATTR_READ_ONLY (1 << 0)
|
||||
|
|
@ -158,14 +172,22 @@ struct ublk_param_devt {
|
|||
__u32 disk_major;
|
||||
__u32 disk_minor;
|
||||
};
|
||||
struct ublk_param_zoned {
|
||||
__u32 max_open_zones;
|
||||
__u32 max_active_zones;
|
||||
__u32 max_zone_append_sectors;
|
||||
__u8 reserved[20];
|
||||
};
|
||||
struct ublk_params {
|
||||
__u32 len;
|
||||
#define UBLK_PARAM_TYPE_BASIC (1 << 0)
|
||||
#define UBLK_PARAM_TYPE_DISCARD (1 << 1)
|
||||
#define UBLK_PARAM_TYPE_DEVT (1 << 2)
|
||||
#define UBLK_PARAM_TYPE_ZONED (1 << 3)
|
||||
__u32 types;
|
||||
struct ublk_param_basic basic;
|
||||
struct ublk_param_discard discard;
|
||||
struct ublk_param_devt devt;
|
||||
struct ublk_param_zoned zoned;
|
||||
};
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -23,10 +23,10 @@
|
|||
#define USERFAULTFD_IOC_NEW _IO(USERFAULTFD_IOC, 0x00)
|
||||
#define UFFD_API ((__u64) 0xAA)
|
||||
#define UFFD_API_REGISTER_MODES (UFFDIO_REGISTER_MODE_MISSING | UFFDIO_REGISTER_MODE_WP | UFFDIO_REGISTER_MODE_MINOR)
|
||||
#define UFFD_API_FEATURES (UFFD_FEATURE_PAGEFAULT_FLAG_WP | UFFD_FEATURE_EVENT_FORK | UFFD_FEATURE_EVENT_REMAP | UFFD_FEATURE_EVENT_REMOVE | UFFD_FEATURE_EVENT_UNMAP | UFFD_FEATURE_MISSING_HUGETLBFS | UFFD_FEATURE_MISSING_SHMEM | UFFD_FEATURE_SIGBUS | UFFD_FEATURE_THREAD_ID | UFFD_FEATURE_MINOR_HUGETLBFS | UFFD_FEATURE_MINOR_SHMEM | UFFD_FEATURE_EXACT_ADDRESS | UFFD_FEATURE_WP_HUGETLBFS_SHMEM | UFFD_FEATURE_WP_UNPOPULATED)
|
||||
#define UFFD_API_FEATURES (UFFD_FEATURE_PAGEFAULT_FLAG_WP | UFFD_FEATURE_EVENT_FORK | UFFD_FEATURE_EVENT_REMAP | UFFD_FEATURE_EVENT_REMOVE | UFFD_FEATURE_EVENT_UNMAP | UFFD_FEATURE_MISSING_HUGETLBFS | UFFD_FEATURE_MISSING_SHMEM | UFFD_FEATURE_SIGBUS | UFFD_FEATURE_THREAD_ID | UFFD_FEATURE_MINOR_HUGETLBFS | UFFD_FEATURE_MINOR_SHMEM | UFFD_FEATURE_EXACT_ADDRESS | UFFD_FEATURE_WP_HUGETLBFS_SHMEM | UFFD_FEATURE_WP_UNPOPULATED | UFFD_FEATURE_POISON)
|
||||
#define UFFD_API_IOCTLS ((__u64) 1 << _UFFDIO_REGISTER | (__u64) 1 << _UFFDIO_UNREGISTER | (__u64) 1 << _UFFDIO_API)
|
||||
#define UFFD_API_RANGE_IOCTLS ((__u64) 1 << _UFFDIO_WAKE | (__u64) 1 << _UFFDIO_COPY | (__u64) 1 << _UFFDIO_ZEROPAGE | (__u64) 1 << _UFFDIO_WRITEPROTECT | (__u64) 1 << _UFFDIO_CONTINUE)
|
||||
#define UFFD_API_RANGE_IOCTLS_BASIC ((__u64) 1 << _UFFDIO_WAKE | (__u64) 1 << _UFFDIO_COPY | (__u64) 1 << _UFFDIO_CONTINUE | (__u64) 1 << _UFFDIO_WRITEPROTECT)
|
||||
#define UFFD_API_RANGE_IOCTLS ((__u64) 1 << _UFFDIO_WAKE | (__u64) 1 << _UFFDIO_COPY | (__u64) 1 << _UFFDIO_ZEROPAGE | (__u64) 1 << _UFFDIO_WRITEPROTECT | (__u64) 1 << _UFFDIO_CONTINUE | (__u64) 1 << _UFFDIO_POISON)
|
||||
#define UFFD_API_RANGE_IOCTLS_BASIC ((__u64) 1 << _UFFDIO_WAKE | (__u64) 1 << _UFFDIO_COPY | (__u64) 1 << _UFFDIO_WRITEPROTECT | (__u64) 1 << _UFFDIO_CONTINUE | (__u64) 1 << _UFFDIO_POISON)
|
||||
#define _UFFDIO_REGISTER (0x00)
|
||||
#define _UFFDIO_UNREGISTER (0x01)
|
||||
#define _UFFDIO_WAKE (0x02)
|
||||
|
|
@ -34,6 +34,7 @@
|
|||
#define _UFFDIO_ZEROPAGE (0x04)
|
||||
#define _UFFDIO_WRITEPROTECT (0x06)
|
||||
#define _UFFDIO_CONTINUE (0x07)
|
||||
#define _UFFDIO_POISON (0x08)
|
||||
#define _UFFDIO_API (0x3F)
|
||||
#define UFFDIO 0xAA
|
||||
#define UFFDIO_API _IOWR(UFFDIO, _UFFDIO_API, struct uffdio_api)
|
||||
|
|
@ -44,6 +45,7 @@
|
|||
#define UFFDIO_ZEROPAGE _IOWR(UFFDIO, _UFFDIO_ZEROPAGE, struct uffdio_zeropage)
|
||||
#define UFFDIO_WRITEPROTECT _IOWR(UFFDIO, _UFFDIO_WRITEPROTECT, struct uffdio_writeprotect)
|
||||
#define UFFDIO_CONTINUE _IOWR(UFFDIO, _UFFDIO_CONTINUE, struct uffdio_continue)
|
||||
#define UFFDIO_POISON _IOWR(UFFDIO, _UFFDIO_POISON, struct uffdio_poison)
|
||||
struct uffd_msg {
|
||||
__u8 event;
|
||||
__u8 reserved1;
|
||||
|
|
@ -100,6 +102,7 @@ struct uffdio_api {
|
|||
#define UFFD_FEATURE_EXACT_ADDRESS (1 << 11)
|
||||
#define UFFD_FEATURE_WP_HUGETLBFS_SHMEM (1 << 12)
|
||||
#define UFFD_FEATURE_WP_UNPOPULATED (1 << 13)
|
||||
#define UFFD_FEATURE_POISON (1 << 14)
|
||||
__u64 features;
|
||||
__u64 ioctls;
|
||||
};
|
||||
|
|
@ -143,5 +146,11 @@ struct uffdio_continue {
|
|||
__u64 mode;
|
||||
__s64 mapped;
|
||||
};
|
||||
struct uffdio_poison {
|
||||
struct uffdio_range range;
|
||||
#define UFFDIO_POISON_MODE_DONTWAKE ((__u64) 1 << 0)
|
||||
__u64 mode;
|
||||
__s64 updated;
|
||||
};
|
||||
#define UFFD_USER_MODE_ONLY 1
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -16,8 +16,8 @@
|
|||
***
|
||||
****************************************************************************
|
||||
****************************************************************************/
|
||||
#define LINUX_VERSION_CODE 394496
|
||||
#define LINUX_VERSION_CODE 394752
|
||||
#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + ((c) > 255 ? 255 : (c)))
|
||||
#define LINUX_VERSION_MAJOR 6
|
||||
#define LINUX_VERSION_PATCHLEVEL 5
|
||||
#define LINUX_VERSION_PATCHLEVEL 6
|
||||
#define LINUX_VERSION_SUBLEVEL 0
|
||||
|
|
|
|||
|
|
@ -66,6 +66,7 @@ struct vfio_device_info {
|
|||
__u32 num_regions;
|
||||
__u32 num_irqs;
|
||||
__u32 cap_offset;
|
||||
__u32 pad;
|
||||
};
|
||||
#define VFIO_DEVICE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 7)
|
||||
#define VFIO_DEVICE_API_PCI_STRING "vfio-pci"
|
||||
|
|
@ -232,7 +233,12 @@ enum {
|
|||
VFIO_AP_NUM_IRQS
|
||||
};
|
||||
struct vfio_pci_dependent_device {
|
||||
__u32 group_id;
|
||||
union {
|
||||
__u32 group_id;
|
||||
__u32 devid;
|
||||
#define VFIO_PCI_DEVID_OWNED 0
|
||||
#define VFIO_PCI_DEVID_NOT_OWNED - 1
|
||||
};
|
||||
__u16 segment;
|
||||
__u8 bus;
|
||||
__u8 devfn;
|
||||
|
|
@ -240,6 +246,8 @@ struct vfio_pci_dependent_device {
|
|||
struct vfio_pci_hot_reset_info {
|
||||
__u32 argsz;
|
||||
__u32 flags;
|
||||
#define VFIO_PCI_HOT_RESET_FLAG_DEV_ID (1 << 0)
|
||||
#define VFIO_PCI_HOT_RESET_FLAG_DEV_ID_OWNED (1 << 1)
|
||||
__u32 count;
|
||||
struct vfio_pci_dependent_device devices[];
|
||||
};
|
||||
|
|
@ -298,6 +306,24 @@ struct vfio_device_feature {
|
|||
__u8 data[];
|
||||
};
|
||||
#define VFIO_DEVICE_FEATURE _IO(VFIO_TYPE, VFIO_BASE + 17)
|
||||
struct vfio_device_bind_iommufd {
|
||||
__u32 argsz;
|
||||
__u32 flags;
|
||||
__s32 iommufd;
|
||||
__u32 out_devid;
|
||||
};
|
||||
#define VFIO_DEVICE_BIND_IOMMUFD _IO(VFIO_TYPE, VFIO_BASE + 18)
|
||||
struct vfio_device_attach_iommufd_pt {
|
||||
__u32 argsz;
|
||||
__u32 flags;
|
||||
__u32 pt_id;
|
||||
};
|
||||
#define VFIO_DEVICE_ATTACH_IOMMUFD_PT _IO(VFIO_TYPE, VFIO_BASE + 19)
|
||||
struct vfio_device_detach_iommufd_pt {
|
||||
__u32 argsz;
|
||||
__u32 flags;
|
||||
};
|
||||
#define VFIO_DEVICE_DETACH_IOMMUFD_PT _IO(VFIO_TYPE, VFIO_BASE + 20)
|
||||
#define VFIO_DEVICE_FEATURE_PCI_VF_TOKEN (0)
|
||||
struct vfio_device_feature_migration {
|
||||
__aligned_u64 flags;
|
||||
|
|
@ -365,6 +391,7 @@ struct vfio_iommu_type1_info {
|
|||
#define VFIO_IOMMU_INFO_CAPS (1 << 1)
|
||||
__u64 iova_pgsizes;
|
||||
__u32 cap_offset;
|
||||
__u32 pad;
|
||||
};
|
||||
#define VFIO_IOMMU_TYPE1_INFO_CAP_IOVA_RANGE 1
|
||||
struct vfio_iova_range {
|
||||
|
|
|
|||
|
|
@ -114,4 +114,5 @@ struct vhost_vdpa_iova_range {
|
|||
#define VHOST_BACKEND_F_IOTLB_ASID 0x3
|
||||
#define VHOST_BACKEND_F_SUSPEND 0x4
|
||||
#define VHOST_BACKEND_F_RESUME 0x5
|
||||
#define VHOST_BACKEND_F_ENABLE_AFTER_DRIVER_OK 0x6
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -422,6 +422,8 @@ struct v4l2_pix_format {
|
|||
#define V4L2_PIX_FMT_Z16 v4l2_fourcc('Z', '1', '6', ' ')
|
||||
#define V4L2_PIX_FMT_MT21C v4l2_fourcc('M', 'T', '2', '1')
|
||||
#define V4L2_PIX_FMT_MM21 v4l2_fourcc('M', 'M', '2', '1')
|
||||
#define V4L2_PIX_FMT_MT2110T v4l2_fourcc('M', 'T', '2', 'T')
|
||||
#define V4L2_PIX_FMT_MT2110R v4l2_fourcc('M', 'T', '2', 'R')
|
||||
#define V4L2_PIX_FMT_INZI v4l2_fourcc('I', 'N', 'Z', 'I')
|
||||
#define V4L2_PIX_FMT_CNF4 v4l2_fourcc('C', 'N', 'F', '4')
|
||||
#define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4')
|
||||
|
|
|
|||
|
|
@ -45,6 +45,7 @@
|
|||
#define VIRTIO_NET_F_GUEST_ANNOUNCE 21
|
||||
#define VIRTIO_NET_F_MQ 22
|
||||
#define VIRTIO_NET_F_CTRL_MAC_ADDR 23
|
||||
#define VIRTIO_NET_F_VQ_NOTF_COAL 52
|
||||
#define VIRTIO_NET_F_NOTF_COAL 53
|
||||
#define VIRTIO_NET_F_GUEST_USO4 54
|
||||
#define VIRTIO_NET_F_GUEST_USO6 55
|
||||
|
|
@ -141,7 +142,7 @@ struct virtio_net_hdr_mrg_rxbuf {
|
|||
};
|
||||
#endif
|
||||
struct virtio_net_ctrl_hdr {
|
||||
__u8 class;
|
||||
__u8 __linux_class;
|
||||
__u8 cmd;
|
||||
} __attribute__((packed));
|
||||
typedef __u8 virtio_net_ctrl_ack;
|
||||
|
|
@ -203,4 +204,15 @@ struct virtio_net_ctrl_coal_rx {
|
|||
__le32 rx_usecs;
|
||||
};
|
||||
#define VIRTIO_NET_CTRL_NOTF_COAL_RX_SET 1
|
||||
#define VIRTIO_NET_CTRL_NOTF_COAL_VQ_SET 2
|
||||
#define VIRTIO_NET_CTRL_NOTF_COAL_VQ_GET 3
|
||||
struct virtio_net_ctrl_coal {
|
||||
__le32 max_packets;
|
||||
__le32 max_usecs;
|
||||
};
|
||||
struct virtio_net_ctrl_coal_vq {
|
||||
__le16 vqn;
|
||||
__le16 reserved;
|
||||
struct virtio_net_ctrl_coal coal;
|
||||
};
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@ enum {
|
|||
BNXT_RE_UCNTX_CMASK_HAVE_CCTX = 0x1ULL,
|
||||
BNXT_RE_UCNTX_CMASK_HAVE_MODE = 0x02ULL,
|
||||
BNXT_RE_UCNTX_CMASK_WC_DPI_ENABLED = 0x04ULL,
|
||||
BNXT_RE_UCNTX_CMASK_DBR_PACING_ENABLED = 0x08ULL,
|
||||
};
|
||||
enum bnxt_re_wqe_mode {
|
||||
BNXT_QPLIB_WQE_MODE_STATIC = 0x00,
|
||||
|
|
@ -89,9 +90,12 @@ enum bnxt_re_shpg_offt {
|
|||
};
|
||||
enum bnxt_re_objects {
|
||||
BNXT_RE_OBJECT_ALLOC_PAGE = (1U << UVERBS_ID_NS_SHIFT),
|
||||
BNXT_RE_OBJECT_NOTIFY_DRV,
|
||||
};
|
||||
enum bnxt_re_alloc_page_type {
|
||||
BNXT_RE_ALLOC_WC_PAGE = 0,
|
||||
BNXT_RE_ALLOC_DBR_BAR_PAGE,
|
||||
BNXT_RE_ALLOC_DBR_PAGE,
|
||||
};
|
||||
enum bnxt_re_var_alloc_page_attrs {
|
||||
BNXT_RE_ALLOC_PAGE_HANDLE = (1U << UVERBS_ID_NS_SHIFT),
|
||||
|
|
@ -107,4 +111,7 @@ enum bnxt_re_alloc_page_methods {
|
|||
BNXT_RE_METHOD_ALLOC_PAGE = (1U << UVERBS_ID_NS_SHIFT),
|
||||
BNXT_RE_METHOD_DESTROY_PAGE,
|
||||
};
|
||||
enum bnxt_re_notify_drv_methods {
|
||||
BNXT_RE_METHOD_NOTIFY_DRV = (1U << UVERBS_ID_NS_SHIFT),
|
||||
};
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -25,10 +25,15 @@ enum irdma_memreg_type {
|
|||
IRDMA_MEMREG_TYPE_QP = 1,
|
||||
IRDMA_MEMREG_TYPE_CQ = 2,
|
||||
};
|
||||
enum {
|
||||
IRDMA_ALLOC_UCTX_USE_RAW_ATTR = 1 << 0,
|
||||
IRDMA_ALLOC_UCTX_MIN_HW_WQ_SIZE = 1 << 1,
|
||||
};
|
||||
struct irdma_alloc_ucontext_req {
|
||||
__u32 rsvd32;
|
||||
__u8 userspace_ver;
|
||||
__u8 rsvd8[3];
|
||||
__aligned_u64 comp_mask;
|
||||
};
|
||||
struct irdma_alloc_ucontext_resp {
|
||||
__u32 max_pds;
|
||||
|
|
@ -48,6 +53,9 @@ struct irdma_alloc_ucontext_resp {
|
|||
__u16 max_hw_sq_chunk;
|
||||
__u8 hw_rev;
|
||||
__u8 rsvd2;
|
||||
__aligned_u64 comp_mask;
|
||||
__u16 min_hw_wq_size;
|
||||
__u8 rsvd3[6];
|
||||
};
|
||||
struct irdma_alloc_pd_resp {
|
||||
__u32 pd_id;
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@
|
|||
****************************************************************************/
|
||||
#ifndef SCSI_BSG_UFS_H
|
||||
#define SCSI_BSG_UFS_H
|
||||
#include <asm/byteorder.h>
|
||||
#include <linux/types.h>
|
||||
#define UFS_CDB_SIZE 16
|
||||
#define UIC_CMD_SIZE (sizeof(__u32) * 4)
|
||||
|
|
@ -37,9 +38,37 @@ enum ufs_rpmb_op_type {
|
|||
UFS_RPMB_PURGE_STATUS_READ = 0x09,
|
||||
};
|
||||
struct utp_upiu_header {
|
||||
__be32 dword_0;
|
||||
__be32 dword_1;
|
||||
__be32 dword_2;
|
||||
union {
|
||||
struct {
|
||||
__be32 dword_0;
|
||||
__be32 dword_1;
|
||||
__be32 dword_2;
|
||||
};
|
||||
struct {
|
||||
__u8 transaction_code;
|
||||
__u8 flags;
|
||||
__u8 lun;
|
||||
__u8 task_tag;
|
||||
#ifdef __BIG_ENDIAN
|
||||
__u8 iid : 4;
|
||||
__u8 command_set_type : 4;
|
||||
#elif defined(__LITTLE_ENDIAN)
|
||||
__u8 command_set_type : 4;
|
||||
__u8 iid : 4;
|
||||
#else
|
||||
#error
|
||||
#endif
|
||||
union {
|
||||
__u8 tm_function;
|
||||
__u8 query_function;
|
||||
} __attribute__((packed));
|
||||
__u8 response;
|
||||
__u8 status;
|
||||
__u8 ehs_length;
|
||||
__u8 device_information;
|
||||
__be16 data_segment_length;
|
||||
};
|
||||
};
|
||||
};
|
||||
struct utp_upiu_query {
|
||||
__u8 opcode;
|
||||
|
|
|
|||
|
|
@ -66,6 +66,7 @@
|
|||
#define SOF_TKN_COMP_OUTPUT_PIN_BINDING_WNAME 414
|
||||
#define SOF_TKN_COMP_NUM_INPUT_AUDIO_FORMATS 415
|
||||
#define SOF_TKN_COMP_NUM_OUTPUT_AUDIO_FORMATS 416
|
||||
#define SOF_TKN_COMP_NO_WNAME_IN_KCONTROL_NAME 417
|
||||
#define SOF_TKN_INTEL_SSP_CLKS_CONTROL 500
|
||||
#define SOF_TKN_INTEL_SSP_MCLK_ID 501
|
||||
#define SOF_TKN_INTEL_SSP_SAMPLE_BITS 502
|
||||
|
|
|
|||
|
|
@ -67,6 +67,15 @@ struct privcmd_mmap_resource {
|
|||
__u64 num;
|
||||
__u64 addr;
|
||||
};
|
||||
#define PRIVCMD_IRQFD_FLAG_DEASSIGN (1 << 0)
|
||||
struct privcmd_irqfd {
|
||||
void * dm_op;
|
||||
__u32 size;
|
||||
__u32 fd;
|
||||
__u32 flags;
|
||||
domid_t dom;
|
||||
__u8 pad[2];
|
||||
};
|
||||
#define IOCTL_PRIVCMD_HYPERCALL _IOC(_IOC_NONE, 'P', 0, sizeof(struct privcmd_hypercall))
|
||||
#define IOCTL_PRIVCMD_MMAP _IOC(_IOC_NONE, 'P', 2, sizeof(struct privcmd_mmap))
|
||||
#define IOCTL_PRIVCMD_MMAPBATCH _IOC(_IOC_NONE, 'P', 3, sizeof(struct privcmd_mmapbatch))
|
||||
|
|
@ -74,4 +83,5 @@ struct privcmd_mmap_resource {
|
|||
#define IOCTL_PRIVCMD_DM_OP _IOC(_IOC_NONE, 'P', 5, sizeof(struct privcmd_dm_op))
|
||||
#define IOCTL_PRIVCMD_RESTRICT _IOC(_IOC_NONE, 'P', 6, sizeof(domid_t))
|
||||
#define IOCTL_PRIVCMD_MMAP_RESOURCE _IOC(_IOC_NONE, 'P', 7, sizeof(struct privcmd_mmap_resource))
|
||||
#define IOCTL_PRIVCMD_IRQFD _IOC(_IOC_NONE, 'P', 8, sizeof(struct privcmd_irqfd))
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in a new issue