Yuanyuan Zhong 9d150dd9a0 bionic: arm64: generic: strcmp: align to 64B cache line ... Align strcmp to 64B. This will ensure the preformance critical loop is within one 64B cache line. Change-Id: I88eef2f12b2a6442cacec9cdbdffbf17293e7d32 Signed-off-by: Yuanyuan Zhong <zyy@motorola.com> Reviewed-on: https://gerrit.mot.com/902536 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver <sltawvr@motorola.com> Tested-by: Jira Key <jirakey@motorola.com> Reviewed-by: Yi-Wei Zhao <gbjc64@motorola.com> Reviewed-by: Igor Kovalenko <igork@motorola.com> Submit-Approved: Jira Key <jirakey@motorola.com>		2017-03-20 17:54:29 +00:00
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bionic	Use ENTRY_PRIVATE in __bionic_clone assembler.	2016-10-26 17:01:58 -07:00
cortex-a53/bionic	libc: ARM64: update memset/strlen/memcpy/memmove to newlib/cortex-strings	2016-11-28 19:35:12 +00:00
denver64/bionic	Remove deprecated Android.mk files	2016-05-26 16:41:57 -07:00
generic/bionic	bionic: arm64: generic: strcmp: align to 64B cache line	2017-03-20 17:54:29 +00:00
include/machine	Move math headers in with the other headers.	2016-04-02 08:36:33 -07:00
syscalls	Add <sys/quota.h>.	2016-04-06 11:06:09 -07:00