platform_bionic/libc/arch-riscv64/bionic
Elliott Hughes 7dd3896fe1 riscv64: switch from x18 to gp for shadow call stack.
We want to give back a useful callee-saved general purpose
register (x18) that was only "chosen" because it was what llvm
allowed for historical reasons. gp is a better choice because it's
effectively unused otherwise anyway.

Unfortunately, that means we need extra space in jmp_buf (which I've
reserved in an earlier change, e7b3b8b467),
so let's rearrange the entries in jmp_buf to match their order in the
register file.

Bug: https://github.com/google/android-riscv64/issues/72
Bug: http://b/277909695
Test: treehugger
Change-Id: Ia629409a894c1a83d2052885702bbdd895c758e1
2023-04-12 14:19:38 -07:00
..
__bionic_clone.S riscv64: use tail for tail calls. 2023-03-08 18:22:29 +00:00
__set_tls.c riscv64: add bionic assembler and string functions. 2022-10-14 23:25:36 +00:00
_exit_with_stack_teardown.S riscv64: add bionic assembler and string functions. 2022-10-14 23:25:36 +00:00
setjmp.S riscv64: switch from x18 to gp for shadow call stack. 2023-04-12 14:19:38 -07:00
syscall.S riscv64: use tail for tail calls. 2023-03-08 18:22:29 +00:00
vfork.S Fix the compile errors "R_RISCV_JAL out of rang" when the jump range is greater than 1M memory space between vfork and __set_errno_internal 2023-03-08 01:44:50 +00:00