9ce28844db
Test: Builds and boots.
Change-Id: I99a9ed79666e143b47f02ca4e59eed94f69b7e4a
(cherry picked from commit a981e2e52e
)
348 lines
8.7 KiB
C
348 lines
8.7 KiB
C
/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef __LINUX_DCBNL_H__
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#define __LINUX_DCBNL_H__
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#include <linux/types.h>
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#define IEEE_8021QAZ_MAX_TCS 8
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#define IEEE_8021QAZ_TSA_STRICT 0
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#define IEEE_8021QAZ_TSA_CB_SHAPER 1
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#define IEEE_8021QAZ_TSA_ETS 2
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#define IEEE_8021QAZ_TSA_VENDOR 255
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struct ieee_ets {
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__u8 willing;
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__u8 ets_cap;
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__u8 cbs;
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__u8 tc_tx_bw[IEEE_8021QAZ_MAX_TCS];
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__u8 tc_rx_bw[IEEE_8021QAZ_MAX_TCS];
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__u8 tc_tsa[IEEE_8021QAZ_MAX_TCS];
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__u8 prio_tc[IEEE_8021QAZ_MAX_TCS];
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__u8 tc_reco_bw[IEEE_8021QAZ_MAX_TCS];
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__u8 tc_reco_tsa[IEEE_8021QAZ_MAX_TCS];
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__u8 reco_prio_tc[IEEE_8021QAZ_MAX_TCS];
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};
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struct ieee_maxrate {
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__u64 tc_maxrate[IEEE_8021QAZ_MAX_TCS];
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};
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enum dcbnl_cndd_states {
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DCB_CNDD_RESET = 0,
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DCB_CNDD_EDGE,
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DCB_CNDD_INTERIOR,
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DCB_CNDD_INTERIOR_READY,
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};
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struct ieee_qcn {
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__u8 rpg_enable[IEEE_8021QAZ_MAX_TCS];
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__u32 rppp_max_rps[IEEE_8021QAZ_MAX_TCS];
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__u32 rpg_time_reset[IEEE_8021QAZ_MAX_TCS];
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__u32 rpg_byte_reset[IEEE_8021QAZ_MAX_TCS];
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__u32 rpg_threshold[IEEE_8021QAZ_MAX_TCS];
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__u32 rpg_max_rate[IEEE_8021QAZ_MAX_TCS];
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__u32 rpg_ai_rate[IEEE_8021QAZ_MAX_TCS];
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__u32 rpg_hai_rate[IEEE_8021QAZ_MAX_TCS];
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__u32 rpg_gd[IEEE_8021QAZ_MAX_TCS];
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__u32 rpg_min_dec_fac[IEEE_8021QAZ_MAX_TCS];
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__u32 rpg_min_rate[IEEE_8021QAZ_MAX_TCS];
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__u32 cndd_state_machine[IEEE_8021QAZ_MAX_TCS];
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};
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struct ieee_qcn_stats {
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__u64 rppp_rp_centiseconds[IEEE_8021QAZ_MAX_TCS];
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__u32 rppp_created_rps[IEEE_8021QAZ_MAX_TCS];
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};
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struct ieee_pfc {
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__u8 pfc_cap;
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__u8 pfc_en;
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__u8 mbc;
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__u16 delay;
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__u64 requests[IEEE_8021QAZ_MAX_TCS];
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__u64 indications[IEEE_8021QAZ_MAX_TCS];
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};
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#define IEEE_8021Q_MAX_PRIORITIES 8
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#define DCBX_MAX_BUFFERS 8
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struct dcbnl_buffer {
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__u8 prio2buffer[IEEE_8021Q_MAX_PRIORITIES];
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__u32 buffer_size[DCBX_MAX_BUFFERS];
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__u32 total_size;
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};
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#define CEE_DCBX_MAX_PGS 8
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#define CEE_DCBX_MAX_PRIO 8
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struct cee_pg {
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__u8 willing;
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__u8 error;
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__u8 pg_en;
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__u8 tcs_supported;
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__u8 pg_bw[CEE_DCBX_MAX_PGS];
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__u8 prio_pg[CEE_DCBX_MAX_PGS];
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};
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struct cee_pfc {
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__u8 willing;
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__u8 error;
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__u8 pfc_en;
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__u8 tcs_supported;
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};
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#define IEEE_8021QAZ_APP_SEL_ETHERTYPE 1
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#define IEEE_8021QAZ_APP_SEL_STREAM 2
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#define IEEE_8021QAZ_APP_SEL_DGRAM 3
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#define IEEE_8021QAZ_APP_SEL_ANY 4
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#define IEEE_8021QAZ_APP_SEL_DSCP 5
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struct dcb_app {
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__u8 selector;
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__u8 priority;
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__u16 protocol;
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};
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struct dcb_peer_app_info {
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__u8 willing;
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__u8 error;
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};
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struct dcbmsg {
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__u8 dcb_family;
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__u8 cmd;
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__u16 dcb_pad;
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};
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enum dcbnl_commands {
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DCB_CMD_UNDEFINED,
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DCB_CMD_GSTATE,
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DCB_CMD_SSTATE,
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DCB_CMD_PGTX_GCFG,
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DCB_CMD_PGTX_SCFG,
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DCB_CMD_PGRX_GCFG,
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DCB_CMD_PGRX_SCFG,
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DCB_CMD_PFC_GCFG,
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DCB_CMD_PFC_SCFG,
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DCB_CMD_SET_ALL,
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DCB_CMD_GPERM_HWADDR,
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DCB_CMD_GCAP,
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DCB_CMD_GNUMTCS,
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DCB_CMD_SNUMTCS,
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DCB_CMD_PFC_GSTATE,
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DCB_CMD_PFC_SSTATE,
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DCB_CMD_BCN_GCFG,
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DCB_CMD_BCN_SCFG,
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DCB_CMD_GAPP,
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DCB_CMD_SAPP,
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DCB_CMD_IEEE_SET,
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DCB_CMD_IEEE_GET,
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DCB_CMD_GDCBX,
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DCB_CMD_SDCBX,
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DCB_CMD_GFEATCFG,
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DCB_CMD_SFEATCFG,
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DCB_CMD_CEE_GET,
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DCB_CMD_IEEE_DEL,
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__DCB_CMD_ENUM_MAX,
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DCB_CMD_MAX = __DCB_CMD_ENUM_MAX - 1,
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};
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enum dcbnl_attrs {
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DCB_ATTR_UNDEFINED,
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DCB_ATTR_IFNAME,
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DCB_ATTR_STATE,
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DCB_ATTR_PFC_STATE,
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DCB_ATTR_PFC_CFG,
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DCB_ATTR_NUM_TC,
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DCB_ATTR_PG_CFG,
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DCB_ATTR_SET_ALL,
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DCB_ATTR_PERM_HWADDR,
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DCB_ATTR_CAP,
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DCB_ATTR_NUMTCS,
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DCB_ATTR_BCN,
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DCB_ATTR_APP,
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DCB_ATTR_IEEE,
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DCB_ATTR_DCBX,
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DCB_ATTR_FEATCFG,
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DCB_ATTR_CEE,
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__DCB_ATTR_ENUM_MAX,
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DCB_ATTR_MAX = __DCB_ATTR_ENUM_MAX - 1,
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};
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enum ieee_attrs {
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DCB_ATTR_IEEE_UNSPEC,
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DCB_ATTR_IEEE_ETS,
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DCB_ATTR_IEEE_PFC,
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DCB_ATTR_IEEE_APP_TABLE,
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DCB_ATTR_IEEE_PEER_ETS,
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DCB_ATTR_IEEE_PEER_PFC,
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DCB_ATTR_IEEE_PEER_APP,
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DCB_ATTR_IEEE_MAXRATE,
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DCB_ATTR_IEEE_QCN,
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DCB_ATTR_IEEE_QCN_STATS,
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DCB_ATTR_DCB_BUFFER,
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__DCB_ATTR_IEEE_MAX
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};
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#define DCB_ATTR_IEEE_MAX (__DCB_ATTR_IEEE_MAX - 1)
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enum ieee_attrs_app {
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DCB_ATTR_IEEE_APP_UNSPEC,
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DCB_ATTR_IEEE_APP,
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__DCB_ATTR_IEEE_APP_MAX
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};
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#define DCB_ATTR_IEEE_APP_MAX (__DCB_ATTR_IEEE_APP_MAX - 1)
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enum cee_attrs {
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DCB_ATTR_CEE_UNSPEC,
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DCB_ATTR_CEE_PEER_PG,
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DCB_ATTR_CEE_PEER_PFC,
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DCB_ATTR_CEE_PEER_APP_TABLE,
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DCB_ATTR_CEE_TX_PG,
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DCB_ATTR_CEE_RX_PG,
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DCB_ATTR_CEE_PFC,
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DCB_ATTR_CEE_APP_TABLE,
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DCB_ATTR_CEE_FEAT,
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__DCB_ATTR_CEE_MAX
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};
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#define DCB_ATTR_CEE_MAX (__DCB_ATTR_CEE_MAX - 1)
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enum peer_app_attr {
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DCB_ATTR_CEE_PEER_APP_UNSPEC,
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DCB_ATTR_CEE_PEER_APP_INFO,
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DCB_ATTR_CEE_PEER_APP,
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__DCB_ATTR_CEE_PEER_APP_MAX
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};
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#define DCB_ATTR_CEE_PEER_APP_MAX (__DCB_ATTR_CEE_PEER_APP_MAX - 1)
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enum cee_attrs_app {
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DCB_ATTR_CEE_APP_UNSPEC,
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DCB_ATTR_CEE_APP,
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__DCB_ATTR_CEE_APP_MAX
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};
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#define DCB_ATTR_CEE_APP_MAX (__DCB_ATTR_CEE_APP_MAX - 1)
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enum dcbnl_pfc_up_attrs {
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DCB_PFC_UP_ATTR_UNDEFINED,
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DCB_PFC_UP_ATTR_0,
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DCB_PFC_UP_ATTR_1,
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DCB_PFC_UP_ATTR_2,
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DCB_PFC_UP_ATTR_3,
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DCB_PFC_UP_ATTR_4,
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DCB_PFC_UP_ATTR_5,
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DCB_PFC_UP_ATTR_6,
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DCB_PFC_UP_ATTR_7,
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DCB_PFC_UP_ATTR_ALL,
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__DCB_PFC_UP_ATTR_ENUM_MAX,
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DCB_PFC_UP_ATTR_MAX = __DCB_PFC_UP_ATTR_ENUM_MAX - 1,
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};
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enum dcbnl_pg_attrs {
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DCB_PG_ATTR_UNDEFINED,
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DCB_PG_ATTR_TC_0,
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DCB_PG_ATTR_TC_1,
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DCB_PG_ATTR_TC_2,
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DCB_PG_ATTR_TC_3,
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DCB_PG_ATTR_TC_4,
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DCB_PG_ATTR_TC_5,
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DCB_PG_ATTR_TC_6,
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DCB_PG_ATTR_TC_7,
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DCB_PG_ATTR_TC_MAX,
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DCB_PG_ATTR_TC_ALL,
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DCB_PG_ATTR_BW_ID_0,
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DCB_PG_ATTR_BW_ID_1,
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DCB_PG_ATTR_BW_ID_2,
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DCB_PG_ATTR_BW_ID_3,
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DCB_PG_ATTR_BW_ID_4,
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DCB_PG_ATTR_BW_ID_5,
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DCB_PG_ATTR_BW_ID_6,
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DCB_PG_ATTR_BW_ID_7,
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DCB_PG_ATTR_BW_ID_MAX,
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DCB_PG_ATTR_BW_ID_ALL,
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__DCB_PG_ATTR_ENUM_MAX,
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DCB_PG_ATTR_MAX = __DCB_PG_ATTR_ENUM_MAX - 1,
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};
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enum dcbnl_tc_attrs {
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DCB_TC_ATTR_PARAM_UNDEFINED,
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DCB_TC_ATTR_PARAM_PGID,
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DCB_TC_ATTR_PARAM_UP_MAPPING,
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DCB_TC_ATTR_PARAM_STRICT_PRIO,
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DCB_TC_ATTR_PARAM_BW_PCT,
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DCB_TC_ATTR_PARAM_ALL,
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__DCB_TC_ATTR_PARAM_ENUM_MAX,
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DCB_TC_ATTR_PARAM_MAX = __DCB_TC_ATTR_PARAM_ENUM_MAX - 1,
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};
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enum dcbnl_cap_attrs {
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DCB_CAP_ATTR_UNDEFINED,
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DCB_CAP_ATTR_ALL,
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DCB_CAP_ATTR_PG,
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DCB_CAP_ATTR_PFC,
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DCB_CAP_ATTR_UP2TC,
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DCB_CAP_ATTR_PG_TCS,
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DCB_CAP_ATTR_PFC_TCS,
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DCB_CAP_ATTR_GSP,
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DCB_CAP_ATTR_BCN,
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DCB_CAP_ATTR_DCBX,
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__DCB_CAP_ATTR_ENUM_MAX,
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DCB_CAP_ATTR_MAX = __DCB_CAP_ATTR_ENUM_MAX - 1,
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};
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#define DCB_CAP_DCBX_HOST 0x01
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#define DCB_CAP_DCBX_LLD_MANAGED 0x02
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#define DCB_CAP_DCBX_VER_CEE 0x04
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#define DCB_CAP_DCBX_VER_IEEE 0x08
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#define DCB_CAP_DCBX_STATIC 0x10
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enum dcbnl_numtcs_attrs {
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DCB_NUMTCS_ATTR_UNDEFINED,
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DCB_NUMTCS_ATTR_ALL,
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DCB_NUMTCS_ATTR_PG,
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DCB_NUMTCS_ATTR_PFC,
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__DCB_NUMTCS_ATTR_ENUM_MAX,
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DCB_NUMTCS_ATTR_MAX = __DCB_NUMTCS_ATTR_ENUM_MAX - 1,
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};
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enum dcbnl_bcn_attrs {
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DCB_BCN_ATTR_UNDEFINED = 0,
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DCB_BCN_ATTR_RP_0,
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DCB_BCN_ATTR_RP_1,
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DCB_BCN_ATTR_RP_2,
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DCB_BCN_ATTR_RP_3,
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DCB_BCN_ATTR_RP_4,
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DCB_BCN_ATTR_RP_5,
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DCB_BCN_ATTR_RP_6,
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DCB_BCN_ATTR_RP_7,
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DCB_BCN_ATTR_RP_ALL,
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DCB_BCN_ATTR_BCNA_0,
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DCB_BCN_ATTR_BCNA_1,
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DCB_BCN_ATTR_ALPHA,
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DCB_BCN_ATTR_BETA,
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DCB_BCN_ATTR_GD,
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DCB_BCN_ATTR_GI,
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DCB_BCN_ATTR_TMAX,
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DCB_BCN_ATTR_TD,
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DCB_BCN_ATTR_RMIN,
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DCB_BCN_ATTR_W,
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DCB_BCN_ATTR_RD,
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DCB_BCN_ATTR_RU,
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DCB_BCN_ATTR_WRTT,
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DCB_BCN_ATTR_RI,
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DCB_BCN_ATTR_C,
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DCB_BCN_ATTR_ALL,
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__DCB_BCN_ATTR_ENUM_MAX,
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DCB_BCN_ATTR_MAX = __DCB_BCN_ATTR_ENUM_MAX - 1,
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};
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enum dcb_general_attr_values {
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DCB_ATTR_VALUE_UNDEFINED = 0xff
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};
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#define DCB_APP_IDTYPE_ETHTYPE 0x00
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#define DCB_APP_IDTYPE_PORTNUM 0x01
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enum dcbnl_app_attrs {
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DCB_APP_ATTR_UNDEFINED,
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DCB_APP_ATTR_IDTYPE,
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DCB_APP_ATTR_ID,
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DCB_APP_ATTR_PRIORITY,
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__DCB_APP_ATTR_ENUM_MAX,
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DCB_APP_ATTR_MAX = __DCB_APP_ATTR_ENUM_MAX - 1,
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};
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#define DCB_FEATCFG_ERROR 0x01
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#define DCB_FEATCFG_ENABLE 0x02
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#define DCB_FEATCFG_WILLING 0x04
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#define DCB_FEATCFG_ADVERTISE 0x08
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enum dcbnl_featcfg_attrs {
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DCB_FEATCFG_ATTR_UNDEFINED,
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DCB_FEATCFG_ATTR_ALL,
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DCB_FEATCFG_ATTR_PG,
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DCB_FEATCFG_ATTR_PFC,
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DCB_FEATCFG_ATTR_APP,
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__DCB_FEATCFG_ATTR_ENUM_MAX,
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DCB_FEATCFG_ATTR_MAX = __DCB_FEATCFG_ATTR_ENUM_MAX - 1,
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};
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#endif
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