d32ca14ea3
Kernel headers coming from: Git: https://android.googlesource.com/kernel/common/ Branch: android-mainline Tag: android-mainline-5.5 Test: Boots on walleye. Test: Ran bionic-unit-tests on walleye. Test: Boots on cuttlefish. Test: Ran bionic-unit-tests on cuttlefish. Change-Id: I57387d3c31e0ba5ad125ffe291cecf365c7b374e Merged-In: I57387d3c31e0ba5ad125ffe291cecf365c7b374e
89 lines
2.9 KiB
C
89 lines
2.9 KiB
C
/****************************************************************************
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****************************************************************************
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***
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*** This header was automatically generated from a Linux kernel header
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*** of the same name, to make information necessary for userspace to
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*** call into the kernel available to libc. It contains only constants,
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*** structures, and macros generated from the original header, and thus,
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*** contains no copyrightable information.
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***
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*** To edit the content of this header, modify the corresponding
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*** source file (e.g. under external/kernel-headers/original/) then
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*** run bionic/libc/kernel/tools/update_all.py
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***
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*** Any manual change here will be lost the next time this script will
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*** be run. You've been warned!
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***
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****************************************************************************
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****************************************************************************/
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#ifndef __OMAP_DRM_H__
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#define __OMAP_DRM_H__
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#include "drm.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define OMAP_PARAM_CHIPSET_ID 1
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struct drm_omap_param {
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__u64 param;
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__u64 value;
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};
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#define OMAP_BO_SCANOUT 0x00000001
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#define OMAP_BO_CACHED 0x00000000
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#define OMAP_BO_WC 0x00000002
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#define OMAP_BO_UNCACHED 0x00000004
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#define OMAP_BO_CACHE_MASK 0x00000006
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#define OMAP_BO_TILED_8 0x00000100
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#define OMAP_BO_TILED_16 0x00000200
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#define OMAP_BO_TILED_32 0x00000300
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#define OMAP_BO_TILED_MASK 0x00000f00
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union omap_gem_size {
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__u32 bytes;
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struct {
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__u16 width;
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__u16 height;
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} tiled;
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};
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struct drm_omap_gem_new {
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union omap_gem_size size;
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__u32 flags;
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__u32 handle;
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__u32 __pad;
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};
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enum omap_gem_op {
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OMAP_GEM_READ = 0x01,
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OMAP_GEM_WRITE = 0x02,
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};
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struct drm_omap_gem_cpu_prep {
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__u32 handle;
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__u32 op;
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};
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struct drm_omap_gem_cpu_fini {
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__u32 handle;
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__u32 op;
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__u32 nregions;
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__u32 __pad;
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};
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struct drm_omap_gem_info {
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__u32 handle;
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__u32 pad;
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__u64 offset;
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__u32 size;
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__u32 __pad;
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};
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#define DRM_OMAP_GET_PARAM 0x00
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#define DRM_OMAP_SET_PARAM 0x01
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#define DRM_OMAP_GEM_NEW 0x03
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#define DRM_OMAP_GEM_CPU_PREP 0x04
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#define DRM_OMAP_GEM_CPU_FINI 0x05
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#define DRM_OMAP_GEM_INFO 0x06
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#define DRM_OMAP_NUM_IOCTLS 0x07
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#define DRM_IOCTL_OMAP_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_PARAM, struct drm_omap_param)
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#define DRM_IOCTL_OMAP_SET_PARAM DRM_IOW(DRM_COMMAND_BASE + DRM_OMAP_SET_PARAM, struct drm_omap_param)
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#define DRM_IOCTL_OMAP_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_NEW, struct drm_omap_gem_new)
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#define DRM_IOCTL_OMAP_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_PREP, struct drm_omap_gem_cpu_prep)
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#define DRM_IOCTL_OMAP_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_FINI, struct drm_omap_gem_cpu_fini)
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#define DRM_IOCTL_OMAP_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_INFO, struct drm_omap_gem_info)
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#ifdef __cplusplus
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}
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#endif
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#endif
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