156 lines
4.3 KiB
C
156 lines
4.3 KiB
C
/*-
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* Copyright (c) 2004 David Schultz <das@FreeBSD.ORG>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD: src/lib/msun/mips/fenv.c,v 1.1 2008/04/26 12:20:29 imp Exp $
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*/
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#include <fenv.h>
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#define FCSR_CAUSE_SHIFT 10
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#define FCSR_ENABLE_SHIFT 5
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#define FCSR_ENABLE_MASK (FE_ALL_EXCEPT << FCSR_ENABLE_SHIFT)
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#define FCSR_RMASK 0x3
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/*
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* Hopefully the system ID byte is immutable, so it's valid to use
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* this as a default environment.
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*/
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const fenv_t __fe_dfl_env = 0;
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int fegetenv(fenv_t* __envp) {
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fenv_t _fcsr = 0;
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#ifdef __mips_hard_float
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__asm__ __volatile__("cfc1 %0,$31" : "=r" (_fcsr));
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#endif
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*__envp = _fcsr;
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return 0;
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}
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int fesetenv(const fenv_t* __envp) {
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fenv_t _fcsr = *__envp;
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#ifdef __mips_hard_float
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__asm__ __volatile__("ctc1 %0,$31" : : "r" (_fcsr));
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#endif
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return 0;
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}
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int feclearexcept(int __excepts) {
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fexcept_t __fcsr;
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fegetenv(&__fcsr);
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__excepts &= FE_ALL_EXCEPT;
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__fcsr &= ~(__excepts | (__excepts << FCSR_CAUSE_SHIFT));
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fesetenv(&__fcsr);
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return 0;
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}
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int fegetexceptflag(fexcept_t* __flagp, int __excepts) {
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fexcept_t __fcsr;
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fegetenv(&__fcsr);
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*__flagp = __fcsr & __excepts & FE_ALL_EXCEPT;
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return 0;
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}
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int fesetexceptflag(const fexcept_t* __flagp, int __excepts) {
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fexcept_t __fcsr;
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fegetenv(&__fcsr);
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/* Ensure that flags are all legal */
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__excepts &= FE_ALL_EXCEPT;
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__fcsr &= ~__excepts;
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__fcsr |= *__flagp & __excepts;
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fesetenv(&__fcsr);
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return 0;
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}
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int feraiseexcept(int __excepts) {
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fexcept_t __fcsr;
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fegetenv(&__fcsr);
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/* Ensure that flags are all legal */
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__excepts &= FE_ALL_EXCEPT;
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/* Cause bit needs to be set as well for generating the exception*/
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__fcsr |= __excepts | (__excepts << FCSR_CAUSE_SHIFT);
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fesetenv(&__fcsr);
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return 0;
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}
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int fetestexcept(int __excepts) {
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fexcept_t __FCSR;
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fegetenv(&__FCSR);
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return (__FCSR & __excepts & FE_ALL_EXCEPT);
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}
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int fegetround(void) {
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fenv_t _fcsr;
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fegetenv(&_fcsr);
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return (_fcsr & FCSR_RMASK);
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}
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int fesetround(int __round) {
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fenv_t _fcsr;
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fegetenv(&_fcsr);
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_fcsr &= ~FCSR_RMASK;
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_fcsr |= (__round & FCSR_RMASK);
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fesetenv(&_fcsr);
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return 0;
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}
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int feholdexcept(fenv_t* __envp) {
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fenv_t __env;
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fegetenv(&__env);
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*__envp = __env;
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__env &= ~(FE_ALL_EXCEPT | FCSR_ENABLE_MASK);
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fesetenv(&__env);
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return 0;
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}
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int feupdateenv(const fenv_t* __envp) {
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fexcept_t __fcsr;
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fegetenv(&__fcsr);
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fesetenv(__envp);
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feraiseexcept(__fcsr & FE_ALL_EXCEPT);
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return 0;
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}
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int feenableexcept(int __mask) {
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fenv_t __old_fcsr, __new_fcsr;
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fegetenv(&__old_fcsr);
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__new_fcsr = __old_fcsr | (__mask & FE_ALL_EXCEPT) << FCSR_ENABLE_SHIFT;
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fesetenv(&__new_fcsr);
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return ((__old_fcsr >> FCSR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
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}
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int fedisableexcept(int __mask) {
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fenv_t __old_fcsr, __new_fcsr;
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fegetenv(&__old_fcsr);
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__new_fcsr = __old_fcsr & ~((__mask & FE_ALL_EXCEPT) << FCSR_ENABLE_SHIFT);
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fesetenv(&__new_fcsr);
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return ((__old_fcsr >> FCSR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
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}
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int fegetexcept(void) {
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fenv_t __fcsr;
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fegetenv(&__fcsr);
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return ((__fcsr & FCSR_ENABLE_MASK) >> FCSR_ENABLE_SHIFT);
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}
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