851e68a240
Our <machine/asm.h> files were modified from upstream, to the extent that no architecture was actually using the upstream ENTRY or END macros, assuming that architecture even had such a macro upstream. This patch moves everyone to the same macros, with just a few tweaks remaining in the <machine/asm.h> files, which no one should now use directly. I've removed most of the unused cruft from the <machine/asm.h> files, though there's still rather a lot in the mips/mips64 ones. Bug: 12229603 Change-Id: I2fff287dc571ac1087abe9070362fb9420d85d6d
133 lines
3.1 KiB
ArmAsm
133 lines
3.1 KiB
ArmAsm
/*
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* Copyright (C) 2010 The Android Open Source Project
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* Copyright (c) 2008 ARM Ltd
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the company may not be used to endorse or promote
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* products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Android adaptation and tweak by Jim Huang <jserv@0xlab.org>.
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*/
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#include <machine/cpu-features.h>
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#include <private/bionic_asm.h>
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ENTRY(strcpy)
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pld [r1, #0]
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eor r2, r0, r1
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mov ip, r0
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tst r2, #3
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bne 4f
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tst r1, #3
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bne 3f
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5:
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str r5, [sp, #-4]!
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mov r5, #0x01
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orr r5, r5, r5, lsl #8
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orr r5, r5, r5, lsl #16
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str r4, [sp, #-4]!
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tst r1, #4
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ldr r3, [r1], #4
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beq 2f
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sub r2, r3, r5
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bics r2, r2, r3
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tst r2, r5, lsl #7
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itt eq
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streq r3, [ip], #4
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ldreq r3, [r1], #4
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bne 1f
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/* Inner loop. We now know that r1 is 64-bit aligned, so we
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can safely fetch up to two words. This allows us to avoid
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load stalls. */
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.p2align 2
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2:
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pld [r1, #8]
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ldr r4, [r1], #4
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sub r2, r3, r5
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bics r2, r2, r3
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tst r2, r5, lsl #7
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sub r2, r4, r5
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bne 1f
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str r3, [ip], #4
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bics r2, r2, r4
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tst r2, r5, lsl #7
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itt eq
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ldreq r3, [r1], #4
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streq r4, [ip], #4
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beq 2b
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mov r3, r4
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1:
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#ifdef __ARMEB__
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rors r3, r3, #24
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#endif
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strb r3, [ip], #1
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tst r3, #0xff
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#ifdef __ARMEL__
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ror r3, r3, #8
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#endif
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bne 1b
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ldr r4, [sp], #4
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ldr r5, [sp], #4
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bx lr
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/* Strings have the same offset from word alignment, but it's
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not zero. */
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3:
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tst r1, #1
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beq 1f
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ldrb r2, [r1], #1
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strb r2, [ip], #1
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cmp r2, #0
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it eq
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bxeq lr
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1:
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tst r1, #2
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beq 5b
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ldrh r2, [r1], #2
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#ifdef __ARMEB__
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tst r2, #0xff00
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iteet ne
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strneh r2, [ip], #2
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lsreq r2, r2, #8
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streqb r2, [ip]
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tstne r2, #0xff
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#else
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tst r2, #0xff
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itet ne
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strneh r2, [ip], #2
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streqb r2, [ip]
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tstne r2, #0xff00
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#endif
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bne 5b
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bx lr
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/* src and dst do not have a common word-alignement. Fall back to
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byte copying. */
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4:
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ldrb r2, [r1], #1
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strb r2, [ip], #1
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cmp r2, #0
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bne 4b
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bx lr
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END(strcpy)
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