372f19e9e2
* Bionic benchmarks results at the bottom * This is a squash of the following commits: libc: ARM64: optimize memset. This is an optimized memset for AArch64. Memset is split into 4 main cases: small sets of up to 16 bytes, medium of 16..96 bytes which are fully unrolled. Large memsets of more than 96 bytes align the destination and use an unrolled loop processing 64 bytes per iteration. Memsets of zero of more than 256 use the dc zva instruction, and there are faster versions for the common ZVA sizes 64 or 128. STP of Q registers is used to reduce codesize without loss of performance. Change-Id: I0c5b5ec5ab8a1fd0f23eee8fbacada0be08e841f libc: ARM64: improve performance in strlen Change-Id: Ic20f93a0052a49bd76cd6795f51e8606ccfbf11c libc: ARM64: Optimize memcpy. This is an optimized memcpy for AArch64. Copies are split into 3 main cases: small copies of up to 16 bytes, medium copies of 17..96 bytes which are fully unrolled. Large copies of more than 96 bytes align the destination and use an unrolled loop processing 64 bytes per iteration. In order to share code with memmove, small and medium copies read all data before writing, allowing any kind of overlap. On a random copy test memcpy is 40.8% faster on A57 and 28.4% on A53. Change-Id: Ibb9483e45bbc0e8ca3d5ce98a31c55dfd8a5ac28 libc: AArch64: Tune memcpy * Further tuning for performance. Change-Id: Id08eaab885f9743fa7575077924a947c1b88e4ff libc: ARM64: optimize memmove for Cortex-A53 * Sadly does not work on Denver or Kryo, so can't go to generic This is an optimized memmove for AArch64. All copies of up to 96 bytes and all backward copies are done by the new memcpy. The only remaining case is large forward copies which are done in the same way as the memcpy loop, but copying from the end rather than the start. Tested on the Nextbit Robin with MSM8992 (Snapdragon 808): Before BM_string_memcmp/8 1000k 27 0.286 GiB/s BM_string_memcmp/64 50M 20 3.053 GiB/s BM_string_memcmp/512 20M 126 4.060 GiB/s BM_string_memcmp/1024 10M 234 4.372 GiB/s BM_string_memcmp/8Ki 1000k 1726 4.745 GiB/s BM_string_memcmp/16Ki 500k 3711 4.415 GiB/s BM_string_memcmp/32Ki 200k 8276 3.959 GiB/s BM_string_memcmp/64Ki 100k 16351 4.008 GiB/s BM_string_memcpy/8 1000k 13 0.612 GiB/s BM_string_memcpy/64 1000k 8 7.187 GiB/s BM_string_memcpy/512 50M 38 13.311 GiB/s BM_string_memcpy/1024 20M 86 11.858 GiB/s BM_string_memcpy/8Ki 5M 620 13.203 GiB/s BM_string_memcpy/16Ki 1000k 1265 12.950 GiB/s BM_string_memcpy/32Ki 500k 2977 11.004 GiB/s BM_string_memcpy/64Ki 500k 8003 8.188 GiB/s BM_string_memmove/8 1000k 11 0.684 GiB/s BM_string_memmove/64 1000k 16 3.855 GiB/s BM_string_memmove/512 50M 57 8.915 GiB/s BM_string_memmove/1024 20M 117 8.720 GiB/s BM_string_memmove/8Ki 2M 853 9.594 GiB/s BM_string_memmove/16Ki 1000k 1731 9.462 GiB/s BM_string_memmove/32Ki 500k 3566 9.189 GiB/s BM_string_memmove/64Ki 500k 7708 8.501 GiB/s BM_string_memset/8 1000k 16 0.487 GiB/s BM_string_memset/64 1000k 16 3.995 GiB/s BM_string_memset/512 50M 37 13.489 GiB/s BM_string_memset/1024 50M 58 17.405 GiB/s BM_string_memset/8Ki 5M 451 18.160 GiB/s BM_string_memset/16Ki 2M 883 18.554 GiB/s BM_string_memset/32Ki 1000k 2181 15.022 GiB/s BM_string_memset/64Ki 500k 4563 14.362 GiB/s BM_string_strlen/8 1000k 8 0.965 GiB/s BM_string_strlen/64 1000k 16 3.855 GiB/s BM_string_strlen/512 20M 92 5.540 GiB/s BM_string_strlen/1024 10M 167 6.111 GiB/s BM_string_strlen/8Ki 1000k 1237 6.620 GiB/s BM_string_strlen/16Ki 1000k 2765 5.923 GiB/s BM_string_strlen/32Ki 500k 6135 5.341 GiB/s BM_string_strlen/64Ki 200k 13168 4.977 GiB/s After BM_string_memcmp/8 1000k 21 0.369 GiB/s BM_string_memcmp/64 1000k 28 2.272 GiB/s BM_string_memcmp/512 20M 128 3.983 GiB/s BM_string_memcmp/1024 10M 234 4.375 GiB/s BM_string_memcmp/8Ki 1000k 1732 4.728 GiB/s BM_string_memcmp/16Ki 500k 3485 4.701 GiB/s BM_string_memcmp/32Ki 500k 7031 4.660 GiB/s BM_string_memcmp/64Ki 200k 14296 4.584 GiB/s BM_string_memcpy/8 1000k 5 1.458 GiB/s BM_string_memcpy/64 1000k 7 8.952 GiB/s BM_string_memcpy/512 50M 36 13.907 GiB/s BM_string_memcpy/1024 20M 80 12.750 GiB/s BM_string_memcpy/8Ki 5M 572 14.307 GiB/s BM_string_memcpy/16Ki 1000k 1165 14.053 GiB/s BM_string_memcpy/32Ki 500k 3141 10.430 GiB/s BM_string_memcpy/64Ki 500k 7008 9.351 GiB/s BM_string_memmove/8 50M 7 1.074 GiB/s BM_string_memmove/64 1000k 9 6.593 GiB/s BM_string_memmove/512 50M 37 13.502 GiB/s BM_string_memmove/1024 20M 80 12.656 GiB/s BM_string_memmove/8Ki 5M 573 14.281 GiB/s BM_string_memmove/16Ki 1000k 1168 14.018 GiB/s BM_string_memmove/32Ki 1000k 2825 11.599 GiB/s BM_string_memmove/64Ki 500k 6548 10.008 GiB/s BM_string_memset/8 1000k 7 1.038 GiB/s BM_string_memset/64 1000k 8 7.151 GiB/s BM_string_memset/512 1000k 29 17.272 GiB/s BM_string_memset/1024 50M 53 18.969 GiB/s BM_string_memset/8Ki 5M 424 19.300 GiB/s BM_string_memset/16Ki 2M 846 19.350 GiB/s BM_string_memset/32Ki 1000k 2028 16.156 GiB/s BM_string_memset/64Ki 500k 4514 14.517 GiB/s BM_string_strlen/8 1000k 7 1.120 GiB/s BM_string_strlen/64 1000k 16 3.918 GiB/s BM_string_strlen/512 50M 64 7.894 GiB/s BM_string_strlen/1024 20M 104 9.815 GiB/s BM_string_strlen/8Ki 5M 664 12.337 GiB/s BM_string_strlen/16Ki 1000k 1291 12.682 GiB/s BM_string_strlen/32Ki 1000k 2940 11.143 GiB/s BM_string_strlen/64Ki 500k 6440 10.175 GiB/s Change-Id: I635bd2798a755256f748b2af19b1a56fb85a40c6
217 lines
6.7 KiB
ArmAsm
217 lines
6.7 KiB
ArmAsm
/* Copyright (c) 2012-2013, Linaro Limited
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of the Linaro nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
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/*
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* Copyright (c) 2015 ARM Ltd
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the company may not be used to endorse or promote
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* products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* Assumptions:
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*
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* ARMv8-a, AArch64, unaligned accesses.
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*
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*/
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#include <private/bionic_asm.h>
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#define dstin x0
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#define src x1
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#define count x2
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#define dst x3
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#define srcend x4
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#define dstend x5
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#define A_l x6
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#define A_lw w6
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#define A_h x7
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#define A_hw w7
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#define B_l x8
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#define B_lw w8
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#define B_h x9
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#define C_l x10
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#define C_h x11
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#define D_l x12
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#define D_h x13
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#define E_l src
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#define E_h count
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#define F_l srcend
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#define F_h dst
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#define tmp1 x9
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#define L(l) .L ## l
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/* Copies are split into 3 main cases: small copies of up to 16 bytes,
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medium copies of 17..96 bytes which are fully unrolled. Large copies
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of more than 96 bytes align the destination and use an unrolled loop
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processing 64 bytes per iteration.
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Small and medium copies read all data before writing, allowing any
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kind of overlap, and memmove tailcalls memcpy for these cases as
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well as non-overlapping copies.
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*/
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prfm PLDL1KEEP, [src]
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add srcend, src, count
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add dstend, dstin, count
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cmp count, 16
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b.ls L(copy16)
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cmp count, 96
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b.hi L(copy_long)
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/* Medium copies: 17..96 bytes. */
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sub tmp1, count, 1
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ldp A_l, A_h, [src]
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tbnz tmp1, 6, L(copy96)
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ldp D_l, D_h, [srcend, -16]
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tbz tmp1, 5, 1f
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ldp B_l, B_h, [src, 16]
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ldp C_l, C_h, [srcend, -32]
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stp B_l, B_h, [dstin, 16]
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stp C_l, C_h, [dstend, -32]
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1:
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stp A_l, A_h, [dstin]
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stp D_l, D_h, [dstend, -16]
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ret
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.p2align 4
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/* Small copies: 0..16 bytes. */
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L(copy16):
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cmp count, 8
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b.lo 1f
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ldr A_l, [src]
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ldr A_h, [srcend, -8]
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str A_l, [dstin]
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str A_h, [dstend, -8]
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ret
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.p2align 4
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1:
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tbz count, 2, 1f
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ldr A_lw, [src]
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ldr A_hw, [srcend, -4]
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str A_lw, [dstin]
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str A_hw, [dstend, -4]
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ret
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/* Copy 0..3 bytes. Use a branchless sequence that copies the same
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byte 3 times if count==1, or the 2nd byte twice if count==2. */
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1:
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cbz count, 2f
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lsr tmp1, count, 1
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ldrb A_lw, [src]
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ldrb A_hw, [srcend, -1]
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ldrb B_lw, [src, tmp1]
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strb A_lw, [dstin]
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strb B_lw, [dstin, tmp1]
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strb A_hw, [dstend, -1]
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2: ret
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.p2align 4
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/* Copy 64..96 bytes. Copy 64 bytes from the start and
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32 bytes from the end. */
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L(copy96):
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ldp B_l, B_h, [src, 16]
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ldp C_l, C_h, [src, 32]
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ldp D_l, D_h, [src, 48]
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ldp E_l, E_h, [srcend, -32]
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ldp F_l, F_h, [srcend, -16]
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stp A_l, A_h, [dstin]
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stp B_l, B_h, [dstin, 16]
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stp C_l, C_h, [dstin, 32]
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stp D_l, D_h, [dstin, 48]
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stp E_l, E_h, [dstend, -32]
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stp F_l, F_h, [dstend, -16]
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ret
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/* Align DST to 16 byte alignment so that we don't cross cache line
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boundaries on both loads and stores. There are at least 96 bytes
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to copy, so copy 16 bytes unaligned and then align. The loop
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copies 64 bytes per iteration and prefetches one iteration ahead. */
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.p2align 4
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L(copy_long):
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and tmp1, dstin, 15
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bic dst, dstin, 15
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ldp D_l, D_h, [src]
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sub src, src, tmp1
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add count, count, tmp1 /* Count is now 16 too large. */
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ldp A_l, A_h, [src, 16]
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stp D_l, D_h, [dstin]
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ldp B_l, B_h, [src, 32]
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ldp C_l, C_h, [src, 48]
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ldp D_l, D_h, [src, 64]!
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subs count, count, 128 + 16 /* Test and readjust count. */
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b.ls 2f
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1:
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stp A_l, A_h, [dst, 16]
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ldp A_l, A_h, [src, 16]
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stp B_l, B_h, [dst, 32]
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ldp B_l, B_h, [src, 32]
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stp C_l, C_h, [dst, 48]
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ldp C_l, C_h, [src, 48]
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stp D_l, D_h, [dst, 64]!
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ldp D_l, D_h, [src, 64]!
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subs count, count, 64
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b.hi 1b
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/* Write the last full set of 64 bytes. The remainder is at most 64
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bytes, so it is safe to always copy 64 bytes from the end even if
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there is just 1 byte left. */
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2:
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ldp E_l, E_h, [srcend, -64]
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stp A_l, A_h, [dst, 16]
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ldp A_l, A_h, [srcend, -48]
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stp B_l, B_h, [dst, 32]
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ldp B_l, B_h, [srcend, -32]
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stp C_l, C_h, [dst, 48]
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ldp C_l, C_h, [srcend, -16]
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stp D_l, D_h, [dst, 64]
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stp E_l, E_h, [dstend, -64]
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stp A_l, A_h, [dstend, -48]
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stp B_l, B_h, [dstend, -32]
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stp C_l, C_h, [dstend, -16]
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ret
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