382bd666e2
We're not looking at __ARM_ARCH__, because we don't support ARMv6. Bug: http://b/18556103 Change-Id: I91fe096af697dc842a57e97515312e3530743678
316 lines
6.4 KiB
ArmAsm
316 lines
6.4 KiB
ArmAsm
/*
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* Copyright (c) 2011 The Android Open Source Project
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* Copyright (c) 2008 ARM Ltd
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the company may not be used to endorse or promote
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* products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <private/bionic_asm.h>
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.text
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#ifdef __ARMEB__
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#define SHFT2LSB lsl
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#define SHFT2LSBEQ lsleq
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#define SHFT2MSB lsr
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#define SHFT2MSBEQ lsreq
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#define MSB 0x000000ff
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#define LSB 0xff000000
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#else
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#define SHFT2LSB lsr
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#define SHFT2LSBEQ lsreq
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#define SHFT2MSB lsl
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#define SHFT2MSBEQ lsleq
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#define MSB 0xff000000
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#define LSB 0x000000ff
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#endif
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#define magic1(REG) REG
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#define magic2(REG) REG, lsl #7
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ENTRY(strcmp)
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pld [r0, #0]
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pld [r1, #0]
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eor r2, r0, r1
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tst r2, #3
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/* Strings not at same byte offset from a word boundary. */
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bne .Lstrcmp_unaligned
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ands r2, r0, #3
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bic r0, r0, #3
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bic r1, r1, #3
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ldr ip, [r0], #4
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it eq
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ldreq r3, [r1], #4
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beq 1f
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/* Although s1 and s2 have identical initial alignment, they are
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* not currently word aligned. Rather than comparing bytes,
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* make sure that any bytes fetched from before the addressed
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* bytes are forced to 0xff. Then they will always compare
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* equal.
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*/
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eor r2, r2, #3
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lsl r2, r2, #3
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mvn r3, #MSB
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SHFT2LSB r2, r3, r2
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ldr r3, [r1], #4
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orr ip, ip, r2
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orr r3, r3, r2
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1:
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/* Load the 'magic' constant 0x01010101. */
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str r4, [sp, #-4]!
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mov r4, #1
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orr r4, r4, r4, lsl #8
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orr r4, r4, r4, lsl #16
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.p2align 2
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4:
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pld [r0, #8]
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pld [r1, #8]
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sub r2, ip, magic1(r4)
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cmp ip, r3
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itttt eq
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/* check for any zero bytes in first word */
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biceq r2, r2, ip
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tsteq r2, magic2(r4)
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ldreq ip, [r0], #4
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ldreq r3, [r1], #4
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beq 4b
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2:
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/* There's a zero or a different byte in the word */
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SHFT2MSB r0, ip, #24
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SHFT2LSB ip, ip, #8
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cmp r0, #1
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it cs
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cmpcs r0, r3, SHFT2MSB #24
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it eq
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SHFT2LSBEQ r3, r3, #8
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beq 2b
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/* On a big-endian machine, r0 contains the desired byte in bits
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* 0-7; on a little-endian machine they are in bits 24-31. In
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* both cases the other bits in r0 are all zero. For r3 the
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* interesting byte is at the other end of the word, but the
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* other bits are not necessarily zero. We need a signed result
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* representing the differnece in the unsigned bytes, so for the
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* little-endian case we can't just shift the interesting bits up.
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*/
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#ifdef __ARMEB__
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sub r0, r0, r3, lsr #24
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#else
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and r3, r3, #255
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/* No RSB instruction in Thumb2 */
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#ifdef __thumb2__
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lsr r0, r0, #24
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sub r0, r0, r3
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#else
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rsb r0, r3, r0, lsr #24
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#endif
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#endif
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ldr r4, [sp], #4
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bx lr
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.Lstrcmp_unaligned:
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wp1 .req r0
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wp2 .req r1
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b1 .req r2
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w1 .req r4
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w2 .req r5
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t1 .req ip
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@ r3 is scratch
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/* First of all, compare bytes until wp1(sp1) is word-aligned. */
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1:
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tst wp1, #3
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beq 2f
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ldrb r2, [wp1], #1
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ldrb r3, [wp2], #1
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cmp r2, #1
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it cs
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cmpcs r2, r3
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beq 1b
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sub r0, r2, r3
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bx lr
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2:
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str r5, [sp, #-4]!
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str r4, [sp, #-4]!
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mov b1, #1
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orr b1, b1, b1, lsl #8
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orr b1, b1, b1, lsl #16
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and t1, wp2, #3
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bic wp2, wp2, #3
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ldr w1, [wp1], #4
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ldr w2, [wp2], #4
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cmp t1, #2
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beq 2f
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bhi 3f
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/* Critical inner Loop: Block with 3 bytes initial overlap */
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.p2align 2
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1:
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bic t1, w1, #MSB
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cmp t1, w2, SHFT2LSB #8
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sub r3, w1, b1
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bic r3, r3, w1
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bne 4f
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ands r3, r3, b1, lsl #7
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it eq
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ldreq w2, [wp2], #4
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bne 5f
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eor t1, t1, w1
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cmp t1, w2, SHFT2MSB #24
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bne 6f
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ldr w1, [wp1], #4
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b 1b
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4:
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SHFT2LSB w2, w2, #8
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b 8f
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5:
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#ifdef __ARMEB__
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/* The syndrome value may contain false ones if the string ends
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* with the bytes 0x01 0x00
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*/
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tst w1, #0xff000000
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itt ne
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tstne w1, #0x00ff0000
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tstne w1, #0x0000ff00
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beq 7f
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#else
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bics r3, r3, #0xff000000
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bne 7f
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#endif
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ldrb w2, [wp2]
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SHFT2LSB t1, w1, #24
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#ifdef __ARMEB__
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lsl w2, w2, #24
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#endif
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b 8f
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6:
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SHFT2LSB t1, w1, #24
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and w2, w2, #LSB
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b 8f
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/* Critical inner Loop: Block with 2 bytes initial overlap */
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.p2align 2
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2:
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SHFT2MSB t1, w1, #16
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sub r3, w1, b1
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SHFT2LSB t1, t1, #16
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bic r3, r3, w1
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cmp t1, w2, SHFT2LSB #16
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bne 4f
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ands r3, r3, b1, lsl #7
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it eq
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ldreq w2, [wp2], #4
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bne 5f
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eor t1, t1, w1
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cmp t1, w2, SHFT2MSB #16
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bne 6f
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ldr w1, [wp1], #4
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b 2b
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5:
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#ifdef __ARMEB__
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/* The syndrome value may contain false ones if the string ends
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* with the bytes 0x01 0x00
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*/
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tst w1, #0xff000000
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it ne
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tstne w1, #0x00ff0000
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beq 7f
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#else
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lsls r3, r3, #16
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bne 7f
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#endif
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ldrh w2, [wp2]
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SHFT2LSB t1, w1, #16
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#ifdef __ARMEB__
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lsl w2, w2, #16
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#endif
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b 8f
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6:
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SHFT2MSB w2, w2, #16
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SHFT2LSB t1, w1, #16
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4:
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SHFT2LSB w2, w2, #16
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b 8f
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/* Critical inner Loop: Block with 1 byte initial overlap */
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.p2align 2
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3:
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and t1, w1, #LSB
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cmp t1, w2, SHFT2LSB #24
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sub r3, w1, b1
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bic r3, r3, w1
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bne 4f
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ands r3, r3, b1, lsl #7
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it eq
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ldreq w2, [wp2], #4
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bne 5f
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eor t1, t1, w1
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cmp t1, w2, SHFT2MSB #8
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bne 6f
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ldr w1, [wp1], #4
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b 3b
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4:
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SHFT2LSB w2, w2, #24
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b 8f
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5:
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/* The syndrome value may contain false ones if the string ends
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* with the bytes 0x01 0x00
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*/
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tst w1, #LSB
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beq 7f
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ldr w2, [wp2], #4
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6:
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SHFT2LSB t1, w1, #8
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bic w2, w2, #MSB
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b 8f
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7:
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mov r0, #0
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ldr r4, [sp], #4
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ldr r5, [sp], #4
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bx lr
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8:
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and r2, t1, #LSB
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and r0, w2, #LSB
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cmp r0, #1
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it cs
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cmpcs r0, r2
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itt eq
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SHFT2LSBEQ t1, t1, #8
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SHFT2LSBEQ w2, w2, #8
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beq 8b
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sub r0, r2, r0
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ldr r4, [sp], #4
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ldr r5, [sp], #4
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bx lr
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END(strcmp)
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