e31bfae2ba
We're going to modify the __atomic_xxx implementation to provide
full memory barriers, to avoid problems for NDK machine code that
link to these functions.
First step is to remove their usage from our platform code.
We now use inlined versions of the same functions for a slight
performance boost.
+ remove obsolete atomics_x86.c (was never compiled)
NOTE: This improvement was benchmarked on various devices.
Comparing a pthread mutex lock + atomic increment + unlock
we get:
- ARMv7 emulator, running on a 2.4 GHz Xeon:
before: 396 ns after: 288 ns
- x86 emulator in KVM mode on same machine:
before: 27 ns after: 27 ns
- Google Nexus S, in ARMv7 mode (single-core):
before: 82 ns after: 76 ns
- Motorola Xoom, in ARMv7 mode (multi-core):
before: 121 ns after: 120 ns
The code has also been rebuilt in ARMv5TE mode for correctness.
Change-Id: Ic1dc72b173d59b2e7af901dd70d6a72fb2f64b17
66 lines
1.9 KiB
C
66 lines
1.9 KiB
C
/*
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* Copyright (C) 2010 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef BIONIC_ATOMIC_INLINE_H
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#define BIONIC_ATOMIC_INLINE_H
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/*
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* Inline declarations and macros for some special-purpose atomic
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* operations. These are intended for rare circumstances where a
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* memory barrier needs to be issued inline rather than as a function
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* call.
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*
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* Most code should not use these.
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*
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* Anything that does include this file must set ANDROID_SMP to either
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* 0 or 1, indicating compilation for UP or SMP, respectively.
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*
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* Macros defined in this header:
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*
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* void ANDROID_MEMBAR_FULL(void)
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* Full memory barrier. Provides a compiler reordering barrier, and
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* on SMP systems emits an appropriate instruction.
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*/
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#if !defined(ANDROID_SMP)
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# error "Must define ANDROID_SMP before including atomic-inline.h"
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Define __ATOMIC_INLINE__ to control the inlining of all atomics
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* functions declared here. For a slight performance boost, we want
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* all of them to be always_inline
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*/
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#define __ATOMIC_INLINE__ static __inline__ __attribute__((always_inline))
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#ifdef __arm__
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# include <bionic_atomic_arm.h>
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#elif defined(__i386__)
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# include <bionic_atomic_x86.h>
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#else
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# include <bionic_atomic_gcc_builtin.h>
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#endif
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#define ANDROID_MEMBAR_FULL __bionic_memory_barrier
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#ifdef __cplusplus
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} // extern "C"
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#endif
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#endif // BIONIC_ATOMIC_INLINE_H
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