platform_bionic/libc/arch-arm64
Elliott Hughes f978a85cc3 Simplify Oryon ifunc resolvers.
Mainly just factoring out the code, but there are two functional
changes here too:

1. The inline assembler was missing `volatile`, making the hwcap
check ineffective (because the compiler would sometimes move the
MIDR_EL1 read above the hwcap check).

2. The previous code accepted variants 0x0 to 0x5 while the comment
said 0x1 to 0x5. The comment was correct.

I resisted the temptation to actually have a table to search on the assumption that it'll be a while before we need such a thing.

Bug: https://issuetracker.google.com/330105715
Change-Id: I9fdc1e70e49b26ef32794b55ca5e5fd37f1163f9
2024-04-16 15:05:55 +00:00
..
bionic Move memtag_stack out of libc_globals 2024-03-12 12:42:23 -07:00
oryon Custom memset implementation for Qualcomm Oryon CPU 2024-03-29 13:35:04 +05:30
string Move to arm-optimized-routines memset(). 2022-11-17 19:28:06 +00:00
dynamic_function_dispatch.cpp Simplify Oryon ifunc resolvers. 2024-04-16 15:05:55 +00:00
static_function_dispatch.S Use ifuncs for memset and memrchr. 2024-03-26 18:58:50 +00:00