d4ca231ae2
<machine/asm.h> was internal use only. <machine/fenv.h> is quite large, but can live in <bits/...>. <machine/regdef.h> is trivially replaced by saying $x instead of x in our assembler. <machine/setjmp.h> is trivially inlined into <setjmp.h>. <sgidefs.h> is unused. Bug: N/A Test: builds Change-Id: Id05dbab43a2f9537486efb8f27a5ef167b055815
187 lines
4.7 KiB
C
187 lines
4.7 KiB
C
/* $OpenBSD: asm.h,v 1.7 2004/10/20 12:49:15 pefo Exp $ */
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/*
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* Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#pragma once
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#define __bionic_asm_align 16
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#undef __bionic_asm_custom_entry
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#undef __bionic_asm_custom_end
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#define __bionic_asm_custom_entry(f) .ent f
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#define __bionic_asm_custom_end(f) .end f
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#define _MIPS_ISA_MIPS1 1 /* R2000/R3000 */
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#define _MIPS_ISA_MIPS2 2 /* R4000/R6000 */
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#define _MIPS_ISA_MIPS3 3 /* R4000 */
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#define _MIPS_ISA_MIPS4 4 /* TFP (R1x000) */
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#define _MIPS_ISA_MIPS5 5
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#define _MIPS_ISA_MIPS32 6
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#define _MIPS_ISA_MIPS64 7
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#if !defined(ABICALLS) && !defined(_NO_ABICALLS)
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#define ABICALLS .abicalls
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#endif
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#if defined(ABICALLS) && !defined(_KERNEL)
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ABICALLS
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#endif
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/*
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* Define how to access unaligned data word
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*/
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#define LWLO lwl
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#define LWHI lwr
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#define SWLO swl
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#define SWHI swr
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#define LDLO ldl
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#define LDHI ldr
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#define SDLO sdl
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#define SDHI sdr
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/*
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* Define programming environment for ABI.
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*/
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#if defined(ABICALLS) && !defined(_KERNEL) && !defined(_STANDALONE)
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#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
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#define NARGSAVE 4
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#define SETUP_GP \
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.set noreorder; \
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.cpload $t9; \
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.set reorder;
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#define SAVE_GP(x) \
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.cprestore x
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#define SETUP_GP64(gpoff, name)
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#define RESTORE_GP64
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#endif
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#if (_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32)
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#define NARGSAVE 0
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#define SETUP_GP
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#define SAVE_GP(x)
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#define SETUP_GP64(gpoff, name) \
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.cpsetup $t9, gpoff, name
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#define RESTORE_GP64 \
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.cpreturn
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#endif
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#define MKFSIZ(narg,locals) (((narg+locals)*REGSZ+31)&(~31))
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#else /* defined(ABICALLS) && !defined(_KERNEL) */
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#define NARGSAVE 4
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#define SETUP_GP
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#define SAVE_GP(x)
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#define ALIGNSZ 16 /* Stack layout alignment */
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#define FRAMESZ(sz) (((sz) + (ALIGNSZ-1)) & ~(ALIGNSZ-1))
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#endif
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/*
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* Basic register operations based on selected ISA
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*/
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#if (_MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || _MIPS_ISA == _MIPS_ISA_MIPS32)
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#define REGSZ 4 /* 32 bit mode register size */
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#define LOGREGSZ 2 /* log rsize */
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#define REG_S sw
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#define REG_L lw
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#define CF_SZ 24 /* Call frame size */
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#define CF_ARGSZ 16 /* Call frame arg size */
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#define CF_RA_OFFS 20 /* Call ra save offset */
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#endif
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#if (_MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || _MIPS_ISA == _MIPS_ISA_MIPS64)
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#define REGSZ 8 /* 64 bit mode register size */
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#define LOGREGSZ 3 /* log rsize */
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#define REG_S sd
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#define REG_L ld
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#define CF_SZ 48 /* Call frame size (multiple of ALIGNSZ) */
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#define CF_ARGSZ 32 /* Call frame arg size */
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#define CF_RA_OFFS 40 /* Call ra save offset */
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#endif
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#define REGSZ_FP 8 /* 64 bit FP register size */
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#ifndef __LP64__
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#define PTR_L lw
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#define PTR_S sw
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#define PTR_SUB sub
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#define PTR_ADD add
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#define PTR_SUBU subu
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#define PTR_ADDU addu
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#define LI li
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#define LA la
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#define PTR_SLL sll
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#define PTR_SRL srl
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#define PTR_VAL .word
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#else
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#define PTR_L ld
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#define PTR_S sd
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#define PTR_ADD dadd
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#define PTR_SUB dsub
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#define PTR_SUBU dsubu
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#define PTR_ADDU daddu
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#define LI dli
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#define LA dla
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#define PTR_SLL dsll
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#define PTR_SRL dsrl
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#define PTR_VAL .dword
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#endif
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/*
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* LEAF(x, fsize)
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*
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* Declare a leaf routine.
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*/
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#define LEAF(x, fsize) \
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.align 3; \
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.globl x; \
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.ent x, 0; \
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x: ; \
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.cfi_startproc; \
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.frame $sp, fsize, $ra; \
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SETUP_GP \
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/*
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* NON_LEAF(x)
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*
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* Declare a non-leaf routine (a routine that makes other C calls).
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*/
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#define NON_LEAF(x, fsize, retpc) \
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.align 3; \
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.globl x; \
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.ent x, 0; \
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x: ; \
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.cfi_startproc; \
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.frame $sp, fsize, retpc; \
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SETUP_GP \
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