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Henrik Smiding fe6338da91 Adjust memcpy for ARM Cortex A9 cache line size 
ARM Cortex A8 use 64 bytes and ARM Cortex A9 use 32 bytes cache line
size.

The following patch:
  Adds code to adjust memcpy cache line size to match A9 cache line
  size.
  Adds a flag to select between 32 bytes and 64 bytes cache line
  size.

  Copyright (C) ST-Ericsson SA 2010
    Modified neon implementation to fit Cortex A9 cache line size
    Author: Henrik Smiding henrik.smiding@stericsson.com for
            ST-Ericsson.

Change-Id: I8a55946bfb074e6ec0a14805ed65f73fcd0984a3
Signed-off-by: Christian Bejram <christian.bejram@stericsson.com>
2012-05-07 14:18:02 +02:00
libc Adjust memcpy for ARM Cortex A9 cache line size 2012-05-07 14:18:02 +02:00
libdl MIPS support to libm, libdl and libthread_db 2012-05-04 11:34:40 -07:00
libm MIPS support to libm, libdl and libthread_db 2012-05-04 11:34:40 -07:00
libstdc++ libstdc++: Fix x86 thread-safe one-time-construction implementation. 2012-04-16 14:20:30 +08:00
libthread_db MIPS support to libm, libdl and libthread_db 2012-05-04 11:34:40 -07:00
linker Redesign dlopen() locks to be recursive per thread. 2012-02-21 14:57:26 -08:00
.gitignore Merge memory checking functionality from sandbox 2010-02-16 11:43:18 -08:00
Android.mk Remove the simulator target from all makefiles. 2011-07-11 22:11:41 -07:00
CleanSpec.mk Add an empty CleanSpec.mk 2010-03-08 18:04:02 -08:00
MAINTAINERS added and modified libm to support SuperH architecture 2009-08-31 16:25:42 +09:00
ThirdPartyProject.prop add meta-files about 3rd party projects 2010-07-16 11:41:33 -07:00