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add silvermont x86 architecture

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This is used for Baytrail targets.

Change-Id: I5a2fa6dbb8217a326ee09f5ea434885718ab3f0c
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
Signed-off-by: Fengwei Yin <fengwei.yin@intel.com>
This commit is contained in:
Andrew Boie 2014-03-05 12:10:01 -08:00 committed by Fengwei Yin
parent 8afa25552e
commit 155fc8b5fe
2 changed files with 37 additions and 0 deletions
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20
core/combo/arch/x86/silvermont.mk Normal file
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# This file contains feature macro definitions specific to the
# silvermont arch variant.
#
# See build/core/combo/arch/x86/x86-atom.mk for differences.
#
ARCH_X86_HAVE_SSSE3 := true
ARCH_X86_HAVE_SSE4 := true
ARCH_X86_HAVE_SSE4_1 := true
ARCH_X86_HAVE_SSE4_2 := true
ARCH_X86_HAVE_AES_NI := true
ARCH_X86_HAVE_POPCNT := true
ARCH_X86_HAVE_MOVBE := true
# CFLAGS for this arch
arch_variant_cflags := \
-march=slm \
-mstackrealign \
-mfpmath=sse \

17
core/combo/arch/x86_64/silvermont.mk Normal file
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# This file contains feature macro definitions specific to the
# silvermont arch variant.
#
# See build/core/combo/arch/x86/x86-atom.mk for differences.
#
ARCH_X86_HAVE_SSSE3 := true
ARCH_X86_HAVE_SSE4 := true
ARCH_X86_HAVE_SSE4_1 := true
ARCH_X86_HAVE_SSE4_2 := true
ARCH_X86_HAVE_AES_NI := true
ARCH_X86_HAVE_POPCNT := true
ARCH_X86_HAVE_MOVBE := true
# CFLAGS for this arch
arch_variant_cflags := \
-march=slm \