diff --git a/core/clang/mips.mk b/core/clang/mips.mk
index 88721e9b9c..1624b6fe1a 100644
--- a/core/clang/mips.mk
+++ b/core/clang/mips.mk
@@ -9,6 +9,7 @@ CLANG_CONFIG_mips_UNKNOWN_CFLAGS := \
   $(CLANG_CONFIG_UNKNOWN_CFLAGS) \
   -mips32 \
   -mips32r2 \
+  -mips32r6 \
   -mfp32 \
   -mfp64 \
   -mfpxx \
diff --git a/core/clang/mips64.mk b/core/clang/mips64.mk
index d087b9b5d1..a76aa08d91 100644
--- a/core/clang/mips64.mk
+++ b/core/clang/mips64.mk
@@ -1,7 +1,5 @@
 # Clang flags for mips64 arch, target or host.
 
-$(warning Untested mips64 clang flags, fix me!)
-
 CLANG_CONFIG_mips64_EXTRA_ASFLAGS :=
 CLANG_CONFIG_mips64_EXTRA_CFLAGS :=
 CLANG_CONFIG_mips64_EXTRA_LDFLAGS :=
@@ -9,6 +7,7 @@ CLANG_CONFIG_mips64_EXTRA_LDFLAGS :=
 # Include common unknown flags
 CLANG_CONFIG_mips64_UNKNOWN_CFLAGS := \
   $(CLANG_CONFIG_UNKNOWN_CFLAGS) \
+  -mips64r6 \
   -fno-strict-volatile-bitfields \
   -fgcse-after-reload \
   -frerun-cse-after-loop \
diff --git a/core/combo/arch/mips/mips32r6.mk b/core/combo/arch/mips/mips32r6.mk
new file mode 100644
index 0000000000..315aa60eef
--- /dev/null
+++ b/core/combo/arch/mips/mips32r6.mk
@@ -0,0 +1,12 @@
+# Configuration for Android on MIPS.
+# Generating binaries for MIPS32R6/hard-float/little-endian
+
+ARCH_MIPS_REV6 := true
+arch_variant_cflags := \
+    -mips32r6 \
+    -mfp64 \
+    -mno-odd-spreg \
+    -msynci
+
+arch_variant_ldflags := \
+    -Wl,-melf32ltsmip
diff --git a/core/combo/arch/mips64/mips64r6.mk b/core/combo/arch/mips64/mips64r6.mk
new file mode 100644
index 0000000000..443de208b9
--- /dev/null
+++ b/core/combo/arch/mips64/mips64r6.mk
@@ -0,0 +1,7 @@
+# Configuration for Android on mips64r6.
+
+ARCH_MIPS_REV6 := true
+arch_variant_cflags := \
+    -mips64r6 \
+    -msynci
+
diff --git a/target/board/generic_mips64/BoardConfig.mk b/target/board/generic_mips64/BoardConfig.mk
index 88a24a3ef9..5dc943af79 100644
--- a/target/board/generic_mips64/BoardConfig.mk
+++ b/target/board/generic_mips64/BoardConfig.mk
@@ -30,8 +30,12 @@ TARGET_CPU_ABI  := mips64
 
 TARGET_2ND_ARCH := mips
 ifeq (,$(TARGET_2ND_ARCH_VARIANT))
+ifeq ($(TARGET_ARCH_VARIANT),mips64r6)
+TARGET_2ND_ARCH_VARIANT :=  mips32r6
+else
 TARGET_2ND_ARCH_VARIANT :=  mips32r2-fp
 endif
+endif
 TARGET_2ND_CPU_ABI  := mips
 
 # The emulator (qemu) uses the Goldfish devices