This patch completes the support for AArch64. It adds the last few
tweaks that will enable a AArch64 build of bionic.
Please note that though AArch64 uses the new kernel infrastructure,
where the userspace exported headers live in uapi folders, we still
need to include "kernel/common" in the include search path
(take a look at external/kernel-headers/uapi/asm-generic/signal-defs.h).
Also remove the relro linker flags for now as they crash the foundation
model.
Change-Id: Ie2fa8c1056c84dc15fec4469f2d65b8d0c5e712b
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
In 4f2f16da14, we added
-Wl,--warn-shared-textrel to TARGET_GLOBAL_LDFLAGS. This generated
a warning whenever we created a shared library with a text
relocation. At the time, we wrote:
=====
Emit a warning when the static linker detects a shared library
has text relocations. Text relocations make it harder to
share pages across processes, and make it harder to use
certain memory protection features in, for example, SELinux.
This warning will turn into an error in a future change
(via --fatal-warnings)
=====
All code which uses text relocations has either been fixed, or
we've temporarily worked around the issue so the code can still
compile.
Enable --fatal-warnings.
Bug: 11353056
Change-Id: I2f2c65352166ef0a96f54858de1556f0290fe306
ARCH_X86_HAVE_MMX, ARCH_X86_HAVE_SSE, ARCH_X86_HAVE_SSE2,
and ARCH_X86_HAVE_SSE3 were all always on. There are no longer any makefiles
or code that are conditional on any of these, so let's just remove them
rather than encourage anyone to mess with knobs that don't work.
Change-Id: I5ee095e8041eecff4554ad4801894fbfca69093f
Add x86_64 Android builds. Compiler is expected to be able to understand
-m64 code generation option.
Change-Id: I99e7337c5a5766afc5e528a481bd21631ff44dd5
Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
Author: Negreanu Marius Adrian <adrian.m.negreanu@intel.com>
Author: Andrew Boie <andrew.p.boie@intel.com>
Author: Daniel Leung <daniel.leung@intel.com>
Currently, x86 target only has generic i686 and x86-atom
as arch variants. This patch adds the ability to have
more than two arch variants. Defining a new arch variant
is similiar to ARM targets, by adding a new file in
core/combo/arch/x86. These files also define what
capabilities the targeting CPU has (e.g. having SSE2,
SSE3, etc.).
We define arch variants for Sandy Bridge, Ivy Bridge,
Haswell; upcoming arches can be easily added to this
set with future patches.
Change-Id: Iafbce10d205e860738db4a216ff603f9a84d7311
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Switch from gcc-4.7 32-bit only to gcc-4.7 multilib (32/x32/64) compiler.
Tested x86 image build on Linux and Darwin.
This bionic patch is required:
https://android-review.googlesource.com/#/c/64183
Change-Id: Ifc2c6c5d6a4a1b71a00a87af072bb7f67b1c284d
Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
o Add -Wno-unused-parameter -Wno-unused-but-set-parameter to suppress
new warnings.
o Define GCC_COLORS to enable colorful diagnostic messages.
Change-Id: Icbd62300b0e6f39d4e514edec2431a06b4d72421
(cherry picked from internal commit ccd8e6082b)
For global declaration of FDO profile generation and usage,
we need to link PRIVATE_TARGET_FDO_LIB (libgcov.a by default)
prior to linking shared libraries.
TARGET_FDO_LIB is set if feedback directed optimizations
are in use, so we do not need to worry about consistent size
increases from this change.
Change-Id: I543903f58893816f037c9466f31b19dfe822fdf4
synci does not provide coherency between CPU's on this device
Change-Id: I10e73fa49859e55d018884c6682b5a00b887e0a1
Signed-off-by: Chris Dearman <chris.dearman@imgtec.com>
