Commit graph

47 commits

Author SHA1 Message Date
Andrew Boie
155fc8b5fe add silvermont x86 architecture
This is used for Baytrail targets.

Change-Id: I5a2fa6dbb8217a326ee09f5ea434885718ab3f0c
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
Signed-off-by: Fengwei Yin <fengwei.yin@intel.com>
2014-04-30 01:23:25 +08:00
Shu Zhang
453afb242c Specify -mcpu=cortex-a15 for denver CPU variants.
Change-Id: Ic27484c92a48b45148021a61420ffdd55a9dd945
2014-03-24 16:19:50 +08:00
Ying Wang
de9955c35e Select the arch_variant_cflags for the 2nd arch.
Change-Id: Id2f9d7073a4aae3ba0fe5e5464045761f4d42b4e
2014-02-07 10:44:10 -08:00
Chris Dearman
1efd9e462a [MIPS64] Add mips64 target
Change-Id: Ice1621101c0d5a3314db288542ca8020e3f406bf
Signed-off-by: Duane Sand <duane.sand@imgtec.com>
2014-02-05 19:07:57 -08:00
Colin Cross
ec14ce578b remove 2nd arch from ARCH_ARM_* defines
Users of ARCH_ARM_* defines don't care about first vs. second arch,
set ARCH_ARM_* regardless of which arch is arm.

Change-Id: I2ae83ec5c3f839ff91a0e352c95d76ec2cbd5dc5
2014-02-04 19:44:09 -08:00
Ying Wang
1d274d2686 Load compiler environment for a second arch.
This is the first step to build 32-bit libraries in a 64-bit product.
It will work like this:
1) In the product's BoardConfig.mk, define:
TARGET_2ND_ARCH, TARGET_2ND_ARCH_VARIANT, TARGET_2ND_CPU_VARIANT.
The build system uses those variables to set up an additional compiler
environment for the second arch.

2) When parsing Android.mks, the build system sets up rules to build a
module for both the 1st arch and the 2nd arch, unless it's explicitly
asked to skip so.
Android.mk will be adapted if there is additional rule of generating
source files.
The build system will accept arch-specific LOCAL_ variables, such as
LOCAL_CFLAGS_arm, LOCAL_CFLAGS_armv7-a-neon, LOCAL_CFLAGS_cortex-a15,
LOCAL_CFLAGS_aarch64 etc. Modules use such variables to set up build for
various archs at the same time.

3) Install binary of the 2nd arch by adding "<module_name>:32" to
PRODUCT_PACKAGES. All 2nd-arch libraries linked in by "<module_name>:32"
will be installed automatically.

Bug: 11654773
Change-Id: I2df63cd5463a07bf5358bee2a109f8fb9590fe30

Conflicts:
	core/combo/TARGET_linux-arm.mk
2014-01-24 13:34:26 -08:00
Colin Cross
4f0eb7d50c build: rename aarch64 target to arm64
Rename aarch64 build targets to arm64.  The gcc toolchain is still
aarch64.

Change-Id: Ia92d8a50824e5329cf00fd6f4f92eae112b7f3a3
2014-01-23 22:39:38 -08:00
Ian Rogers
b07a5f8257 am 09c6d68b: am 816af5fc: Merge "Specify -mcpu=cortex-a15 for krait CPU variants."
* commit '09c6d68b8879164f600bbe084a62cfbc4ab10850':
  Specify -mcpu=cortex-a15 for krait CPU variants.
2013-10-11 17:35:09 -07:00
Ian Rogers
d195c6d14e Specify -mcpu=cortex-a15 for krait CPU variants.
Bug: 11178216

Change-Id: I9922e4cd5ba27e3857798aae5c84299e26e054ea
2013-10-11 16:24:32 -07:00
Ben Cheng
a698dab816 am 0b42554f: am 12eeb000: Merge "Add generic aarch64 board config and build rules."
* commit '0b42554fd8c7a43ca45504e4586f1eef578308de':
  Add generic aarch64 board config and build rules.
2013-10-07 14:42:10 -07:00
Ben Cheng
12eeb00060 Merge "Add generic aarch64 board config and build rules." 2013-10-07 21:38:02 +00:00
Ben Cheng
db4fc200c4 Add generic aarch64 board config and build rules.
Change-Id: I8b4a377596705dfa0a3bd234162d183ec2ae9530
2013-10-07 13:58:27 -07:00
Elliott Hughes
2e840a500e am a035abc5: am 1303aa28: Merge "Remove useless x86 options that were always hardcoded on."
* commit 'a035abc55455a50da7b242dad1bca55fa28617a9':
  Remove useless x86 options that were always hardcoded on.
2013-10-04 14:42:11 -07:00
Elliott Hughes
d3f00c162b Remove useless x86 options that were always hardcoded on.
ARCH_X86_HAVE_MMX, ARCH_X86_HAVE_SSE, ARCH_X86_HAVE_SSE2,
and ARCH_X86_HAVE_SSE3 were all always on. There are no longer any makefiles
or code that are conditional on any of these, so let's just remove them
rather than encourage anyone to mess with knobs that don't work.

Change-Id: I5ee095e8041eecff4554ad4801894fbfca69093f
2013-10-04 11:45:06 -07:00
Ying Wang
6a6db9432f am ab7b53b8: am 5d92a933: Merge "x86_64: Adding new target"
* commit 'ab7b53b8e09e3d346384a5257e8f7a440a53dfc0':
  x86_64: Adding new target
2013-10-02 15:06:02 -07:00
Pavel Chupin
fd82a49e04 x86_64: Adding new target
Add x86_64 Android builds. Compiler is expected to be able to understand
-m64 code generation option.

Change-Id: I99e7337c5a5766afc5e528a481bd21631ff44dd5
Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
2013-10-02 20:58:54 +04:00
Ying Wang
4a712bfb6f resolved conflicts for merge of 70190a2b to klp-dev-plus-aosp
Change-Id: I9abcb4e258ad95912860dcae2973c4e417b05369
2013-09-19 10:15:38 -07:00
Negreanu Marius Adrian
ae5c0ab272 Extend x86 to have different arch variants
Author: Negreanu Marius Adrian <adrian.m.negreanu@intel.com>
Author: Andrew Boie <andrew.p.boie@intel.com>
Author: Daniel Leung <daniel.leung@intel.com>

Currently, x86 target only has generic i686 and x86-atom
as arch variants. This patch adds the ability to have
more than two arch variants. Defining a new arch variant
is similiar to ARM targets, by adding a new file in
core/combo/arch/x86. These files also define what
capabilities the targeting CPU has (e.g. having SSE2,
SSE3, etc.).

We define arch variants for Sandy Bridge, Ivy Bridge,
Haswell; upcoming arches can be easily added to this
set with future patches.

Change-Id: Iafbce10d205e860738db4a216ff603f9a84d7311
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2013-09-18 14:14:22 -07:00
Ying Wang
d7674e9a03 am 20c768d2: am c5cc2f6d: Merge "[MIPS] Add support for MXU instructions for Ingenic builds."
* commit '20c768d2128364a6a9373dd8ef432bf55512bf37':
  [MIPS] Add support for MXU instructions for Ingenic builds.
2013-08-19 16:21:53 -07:00
Pete Delaney
cc41f01490 [MIPS] Add support for MXU instructions for Ingenic builds.
This enables an Ingenic build to use MXU asm instructions.
MXU support was just recently added:

    ASM: https://android-review.googlesource.com/63701
    GCC: https://android-review.googlesource.com/63702
    BIN: https://android-review.googlesource.com/#/c/63704/

Change-Id: I2b60567a689efa70ec064dfbb0f241a6bc61aed1
Signed-off-by: Pete Delaney <piet.delaney@imgtec.com>
2013-08-15 18:32:12 -07:00
Ying Wang
10e41c3275 am c012edbc: am 42aaacf1: am a90d7eb6: Merge "Do not use -msynci flag for Xburst 4780 cores"
* commit 'c012edbc519b74456530c26719133f96d4574de3':
  Do not use -msynci flag for Xburst 4780 cores
2013-06-21 10:44:47 -07:00
Ying Wang
42aaacf183 am a90d7eb6: Merge "Do not use -msynci flag for Xburst 4780 cores"
* commit 'a90d7eb64fc3155c6558d9c307e0bc4a2d84dff9':
  Do not use -msynci flag for Xburst 4780 cores
2013-06-21 10:37:38 -07:00
Raghu Gandham
6faf71647a Do not use -msynci flag for Xburst 4780 cores
synci does not provide coherency between CPU's on this device

Change-Id: I10e73fa49859e55d018884c6682b5a00b887e0a1
Signed-off-by: Chris Dearman <chris.dearman@imgtec.com>
2013-06-20 13:29:49 -07:00
Ying Wang
a25b9b83bf am 210aee35: am fa29872a: Merge "[MIPS] Disabled madd support for Ingenic Xburst CPUs."
* commit '210aee35a9dec3b94ab0cfc247e6c89c1e387f19':
  [MIPS] Disabled madd support for Ingenic Xburst CPUs.
2013-05-21 12:31:57 -07:00
Ying Wang
210aee35a9 am fa29872a: Merge "[MIPS] Disabled madd support for Ingenic Xburst CPUs."
* commit 'fa29872ae08408f90e1282bff36a0bdba13d0fdc':
  [MIPS] Disabled madd support for Ingenic Xburst CPUs.
2013-05-21 12:25:39 -07:00
Pete Delaney
90ce453470 [MIPS] Disabled madd support for Ingenic Xburst CPUs.
1. Added xburst ARCH_VARIANT file 'mips32r2-fp-xburst.mk'.
   a) Added -mno-fused-madd GCC option.

2. Removing -mno-fused-madd GCC option for LLVM.


Change-Id: I947a74eb89c05ae321417533c3c40241abc6f965
Signed-off-by: Pete Delaney <piet.delaney@imgtec.com>
2013-05-20 15:27:20 -07:00
Rom Lemarchand
8805930b6f core: combo: arm: add cortex-a8 target
Change-Id: I83e409dd048762acbd2e2dec9b0095933141cff0
2013-05-14 20:16:16 -07:00
Dima Zavin
bdbd716eff core: combo: arm: use appropriate mcpu flags for cortex-a7
Change-Id: If00577d36257e4d03f63f36b159bb2e015958d6a
Signed-off-by: Dima Zavin <dima@android.com>
2013-03-23 02:08:38 -07:00
Ying Wang
5938039677 am 7ce7473f: am 5e12e60b: Merge "For the current MIPS compiler __builtin___clear_cache() generates synci instruction only with -msynci option So, add -msynci to all mips32r2 makefiles. Also add msynci to the list flags not recognized by clang."
* commit '7ce7473f866fc5356291f38a3437a071ea5fd00d':
  For the current MIPS compiler __builtin___clear_cache() generates synci instruction only with -msynci option So, add -msynci to all mips32r2 makefiles. Also add msynci to the list flags not recognized by clang.
2013-02-15 14:48:01 -08:00
Ying Wang
5e12e60b47 Merge "For the current MIPS compiler __builtin___clear_cache() generates synci instruction only with -msynci option So, add -msynci to all mips32r2 makefiles. Also add msynci to the list flags not recognized by clang." 2013-02-15 19:33:59 +00:00
Elliott Hughes
b2bbff7cba am ea852f6e: am f6b670b7: Merge "Remove more always-true ARCH_ARM_HAVE_ flags."
# Via Android Git Automerger (1) and others
* commit 'ea852f6ed3e9f251eaef4f041fbc0b09229ac924':
  Remove more always-true ARCH_ARM_HAVE_ flags.
2013-02-14 17:31:40 -08:00
Elliott Hughes
03d2aa4dd0 Remove more always-true ARCH_ARM_HAVE_ flags.
All the remaining flags appear to be actually used.

Change-Id: I0e3d84915487eda4f0e97809fc36624fef5f1848
2013-02-14 12:04:48 -08:00
Elliott Hughes
14a2d978df am d0fb6930: am 07a58f8f: Merge "Nothing uses ARCH_ARM_HAVE_CLZ or ARCH_ARM_HAVE_FFS."
# Via Android Git Automerger (1) and others
* commit 'd0fb693024b88a713fe95296db451a0e6c17ec66':
  Nothing uses ARCH_ARM_HAVE_CLZ or ARCH_ARM_HAVE_FFS.
2013-02-13 17:11:36 -08:00
Elliott Hughes
d0542498a0 Nothing uses ARCH_ARM_HAVE_CLZ or ARCH_ARM_HAVE_FFS.
Because every ARM architecture we've ever supported has had both.

Change-Id: I607b56416e65073c5ac1b85fb17c092516e02573
2013-02-13 16:44:21 -08:00
Raghu Gandham
695fee31ad For the current MIPS compiler __builtin___clear_cache() generates synci instruction only with -msynci option
So, add -msynci to all mips32r2 makefiles. Also add msynci to the list flags not recognized by clang.

Change-Id: I48fd6f2b0cbe80c3cd90f453ced97a2f154f7ad3
Signed-off-by: Rocky Zhang <yan@mips.com>
2013-02-07 16:07:01 -08:00
Ben Cheng
533aa2707e Use -mcpu=cortex-a15 for gcc arch dependent compilation.
If TARGET_CPU_VARIANT=cortex-a15 is specified in the BoardConfig.mk file.

Bug: 7961327
Change-Id: Ic459df378293237c54263f5315ac3be62dad4273
2013-01-14 14:37:44 -08:00
Raghu Gandham
06afc1c5ab Support for MIPS Build targets.
Change-Id: I14c27305298ce36d5c100abf25489275c2269c5f
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Raghu Gandham <raghu@mips.com>
2012-08-01 11:18:25 -07:00
Kenny Root
87f4d5a926 Enable TLS register by default for ARMv7a arch
Everything that is based on ARMv7a should have a cp15 TLS register.
Enable it by default so it's not accidentally missed in newer board
configurations. In fact, this could be enabled for ARMv6 as well, but we
currently don't distinguish between ARMv5 and ARMv6 in the build system.

This can still be disabled by setting it to "false" in the board
configuration, but this shouldn't ever be needed.

Change-Id: Ic2918f32899c8bcfa482f92c98f5a192fa318470
2012-02-21 09:17:18 -08:00
David 'Digit' Turner
6371da10f8 x86: Refine the way we configure the x86 build.
This is the result of a recent conversation around the x86 ABI
and its relationship with how we build platform images. Briefly:

- We want to use feature-based macros like ARCH_X86_HAVE_$FEATURE
  instead of relying on explicit compiler macros like -DUSE_$FEATURE

- We want to allow for other x86-based arch variants, e.g. if
  someone wants to build Android for a CPU that doesn't support
  the NDK x86 ABI. However, we need to ensure these are not
  tagged compatible by mistake (see check at the end of TARGET_linux-x86.mk)

- There are several flags which use is dubious now that we have
  a dedicated toolchain to build all the x86 stuff. Comment them
  as 'to be considered for removal'. We'll do the proper checks
  later.

Change-Id: I7768d7c34d73e274cbf4c09ae831b55280d6bb58
2011-12-14 18:08:47 +01:00
Colin Cross
f807c55f39 Add a new build target armv7-a-neon
Change-Id: Ib3b44e839b093974aff0d595950e6b691beee7a5
2010-03-10 16:07:14 -08:00
Colin Cross
5720bb91a4 Modify the armv7-a target arch to not use NEON
To build for a target with NEON, use armv7-a-neon

Change-Id: I70d509287b04c0faebe44faf6c8ebb28a7360ff9
2010-03-10 16:06:44 -08:00
Erik Gilling
c12c518379 enable cortex branch predition errata workaround for armv7-a builds
Signed-off-by: Erik Gilling <konkers@android.com>
2009-07-17 15:58:42 -07:00
Mike Reed
582dcbd7d1 add HAVE_VFP flag 2009-07-16 15:22:57 -04:00
Mike Reed
8ce877a3ab set -fpu=neon so we can use arm_neon.h 2009-07-13 14:48:43 -04:00
Patrick Scott
87c86573e0 Move the BoardConfig.mk search and inclusion to core/config.mk.
This allows TARGET_ARCH_VARIANT to be set by the vendor before we choose the
architecture in core/combo/select.mk.

Also add a primitive armv7-a.mk for turning on hardware floating point.
2009-06-23 15:28:07 -04:00
David 'Digit' Turner
3585e95918 Fix armv5te-vfp build. Aargh 2009-05-29 22:54:40 +02:00
David 'Digit' Turner
d53c81d7c5 Rename TARGET_ARCH_VERSION to TARGET_ARCH_VARIANT +
Move arch-specific definitions into core/combo/arch/arm/<variant>.mk
2009-05-29 21:36:49 +02:00