Add mips64r6 target and corresponding mips32r6 target.
Defaults remain as mips64r2 and mips32r2.
Apply -FP64A codegen subsetting to mips32r6 only.
Access FR=0 odd-numbered 32-bit float regs only via
double-prec even-numbered regs, not by single-prec ops.
(cherry picked from commit 6bab974cdc)
Change-Id: I447337ce56c15e86cec505d68a6b45294fc3ba77