Duane Sand 02f285208c [MIPSR6] Add mips64r6 and mips32r6 targets ... Add mips64r6 target and corresponding mips32r6 target. Defaults remain as mips64r2 and mips32r2. Apply -FP64A codegen subsetting to mips32r6 only. Access FR=0 odd-numbered 32-bit float regs only via double-prec even-numbered regs, not by single-prec ops. (cherry picked from commit 6bab974cdc) Change-Id: I447337ce56c15e86cec505d68a6b45294fc3ba77		2014-08-05 12:39:28 -07:00
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arm	Specify -mcpu=cortex-a15 for denver CPU variants.	2014-03-24 16:19:50 +08:00
arm64	build: rename aarch64 target to arm64	2014-01-23 22:39:38 -08:00
mips	[MIPSR6] Add mips64r6 and mips32r6 targets	2014-08-05 12:39:28 -07:00
mips64	[MIPSR6] Add mips64r6 and mips32r6 targets	2014-08-05 12:39:28 -07:00
x86	add silvermont x86 architecture	2014-04-30 01:23:25 +08:00
x86_64	add silvermont x86 architecture	2014-04-30 01:23:25 +08:00