02f285208c
Add mips64r6 target and corresponding mips32r6 target.
Defaults remain as mips64r2 and mips32r2.
Apply -FP64A codegen subsetting to mips32r6 only.
Access FR=0 odd-numbered 32-bit float regs only via
double-prec even-numbered regs, not by single-prec ops.
(cherry picked from commit 6bab974cdc)
Change-Id: I447337ce56c15e86cec505d68a6b45294fc3ba77
21 lines
529 B
Makefile
21 lines
529 B
Makefile
# Clang flags for mips64 arch, target or host.
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CLANG_CONFIG_mips64_EXTRA_ASFLAGS :=
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CLANG_CONFIG_mips64_EXTRA_CFLAGS :=
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CLANG_CONFIG_mips64_EXTRA_LDFLAGS :=
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# Include common unknown flags
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CLANG_CONFIG_mips64_UNKNOWN_CFLAGS := \
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$(CLANG_CONFIG_UNKNOWN_CFLAGS) \
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-mips64r6 \
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-fno-strict-volatile-bitfields \
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-fgcse-after-reload \
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-frerun-cse-after-loop \
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-frename-registers \
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-msynci \
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-mno-fused-madd
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# We don't have any mips64 flags to substitute yet.
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define subst-clang-incompatible-mips64-flags
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$(1)
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endef
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