468bff0952
This is purely personal preference. Most of the Makefiles use $() for Makefile variables, but a couple of places use ${}. Since this obscured some later Makefile changes I figured I'd just make them all the same up front. Signed-off-by: Eric Paris <eparis@redhat.com> Acked-by: Dan Walsh <dwalsh@redhat.com>
25 lines
517 B
Makefile
25 lines
517 B
Makefile
# Installation directories.
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PREFIX ?= $(DESTDIR)/usr
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BINDIR ?= $(PREFIX)/bin
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LIBDIR ?= $(PREFIX)/lib
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INCLUDEDIR ?= $(PREFIX)/include
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CFLAGS ?= -Werror -Wall -W
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override CFLAGS += -I$(INCLUDEDIR)
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LDLIBS = $(LIBDIR)/libsepol.a
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all: sepolgen-ifgen-attr-helper
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sepolgen-ifgen-attr-helper: sepolgen-ifgen-attr-helper.o
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install: all
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-mkdir -p $(BINDIR)
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install -m 755 sepolgen-ifgen-attr-helper $(BINDIR)
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clean:
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rm -f *~ *.o sepolgen-ifgen-attr-helper
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indent:
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../../scripts/Lindent $(wildcard *.[ch])
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relabel: ;
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