5443a9fc9b
Test: make -j48 android.hardware.wifi@1.0 android.hardware.wifi@1.0-java Bug: 31350762 Change-Id: I1b598be397e08165fc9fd607888e064b139e8007
165 lines
5.9 KiB
Text
165 lines
5.9 KiB
Text
/*
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* Copyright 2016 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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package android.hardware.wifi@1.0;
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import IWifiChipEventCallback;
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/**
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* Interface that represents a chip that must be configured as a single unit.
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* The HAL/driver/firmware will be responsible for determining which phy is used
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* to perform operations like NAN, RTT, etc.
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*/
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interface IWifiChip {
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enum InterfaceType : uint32_t {
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STA, AP, P2P,
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/**
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* NAN control interface. Datapath support may be queried and created
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* through this interface.
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*/
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NAN,
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};
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/**
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* Set of interface types with the maximum number of interfaces that can have
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* one of the specified type for a given ChipInterfaceCombination. See
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* ChipInterfaceCombination for examples.
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*/
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struct ChipInterfaceCombinationLimit {
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vec<InterfaceType> types; // Each InterfaceType may occur at most once
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uint32_t maxIfaces;
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};
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/**
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* Set of interfaces that can operate concurrently when in a given mode. See
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* ChipMode below.
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*
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* For example:
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* [{STA} <= 2]
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* At most two STA interfaces are supported
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* [], [STA], [STA+STA]
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*
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* [{STA} <= 1, {NAN} <= 1, {AP} <= 1]
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* Any combination of STA, NAN, AP
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* [], [STA], [NAN], [AP], [STA+NAN], [STA+AP], [NAN+AP], [STA+NAN+AP]
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*
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* [{STA} <= 1, {NAN,P2P} <= 1]
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* Optionally a STA and either NAN or P2P
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* [], [STA], [STA+NAN], [STA+P2P], [NAN], [P2P]
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* Not included [NAN+P2P], [STA+NAN+P2P]
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*
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* [{STA} <= 1, {STA,NAN} <= 1]
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* Optionally a STA and either a second STA or a NAN
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* [], [STA], [STA+NAN], [STA+STA], [NAN]
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* Not included [STA+STA+NAN]
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*/
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struct ChipInterfaceCombination {
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vec<ChipInterfaceCombinationLimit> limits;
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};
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/**
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* A mode that the chip can be put in. A mode defines a set of constraints on
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* the interfaces that can exist while in that mode. Modes define a unit of
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* configuration where all interfaces must be torn down to switch to a
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* different mode. Some HALs may only have a single mode, but an example where
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* multiple modes would be required is if a chip has different firmwares with
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* different capabilities.
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*
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* When in a mode, it must be possible to perform any combination of creating
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* and removing interfaces as long as at least one of the
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* ChipInterfaceCombinations is satisfied. This means that if a chip has two
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* available combinations, [{STA} <= 1] and [{AP} <= 1] then it is expected
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* that exactly one STA interface or one AP interface can be created, but it
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* is not expected that both a STA and AP interface could be created. If it
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* was then there would be a single available combination
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* [{STA} <=1, {AP} <= 1].
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*
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* When switching between two available combinations it is expected that
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* interfaces only supported by the initial combination will be removed until
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* the target combination is also satisfied. At that point new interfaces
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* satisfying only the target combination can be added (meaning the initial
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* combination limits will no longer satisfied). The addition of these new
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* interfaces should not impact the existence of interfaces that satisfy both
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* combinations.
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*
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* For example, a chip with available combinations:
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* [{STA} <= 2, {NAN} <=1] and [{STA} <=1, {NAN} <= 1, {AP} <= 1}]
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* If the chip currently has 3 interfaces STA, STA and NAN and wants to add an
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* AP interface in place of one of the STAs then first one of the STA
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* interfaces must be removed and then the AP interface can be created after
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* the STA had been torn down. During this process the remaining STA and NAN
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* interfaces should not be removed/recreated.
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*
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* If a chip does not support this kind of reconfiguration in this mode then
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* the combinations should be separated into two separate modes. Before
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* switching modes all interfaces will be torn down, the mode switch will be
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* enacted and when it completes the new interfaces will be brought up.
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*/
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struct ChipMode {
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/**
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* Id that can be used to put the chip in this mode.
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*/
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ChipModeId id;
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/**
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* A list of the possible interface combinations that the chip can have
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* while in this mode.
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*/
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vec<ChipInterfaceCombination> availableCombinations;
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};
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/**
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* Requests notifications of significant events on this chip. Multiple calls
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* to this will register multiple callbacks each of which will receive all
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* events.
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*/
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oneway registerEventCallback(IWifiChipEventCallback callback);
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/**
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* Get the set of operation modes that the chip supports.
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*/
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getAvailableModes() generates (vec<ChipMode> modes);
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/**
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* Reconfigure the Chip. Will trigger onChipReconfigured.
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*
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* @param modeId The mode that the chip should switch to, corresponding to the
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* id property of the target ChipMode.
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*/
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oneway configureChip(ChipModeId modeId);
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/**
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* Get the current mode that the chip is in.
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*/
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getMode() generates (ChipModeId modeId);
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/**
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* Request information about the chip. Will trigger onChipDebugInfoAvailable.
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*/
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oneway requestChipDebugInfo();
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/**
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* Request vendor debug info from the driver. Will trigger
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* onDriverDebugDumpAvailable.
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*/
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oneway requestDriverDebugDump();
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/**
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* Request vendor debug info from the firmware. Will trigger
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* onFirmwareDebugDumpAvailable.
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*/
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oneway requestFirmwareDebugDump();
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};
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