6174f00cc6
- detect cycle (CycleTest)
- detect bad execution order (mutateExecutionOrderTest)
- detect lifetime inconsistent with whether operand is written (mutateOperandLifeTimeTest)
- detect lifetime inconsistent with Model inputIndexes/outputIndexes (mutateOperandInputOutputTest)
- detect incorrect number of consumers (mutateOperandNumberOfConsumersTest)
- detect operand written multiple times (mutateOperandAddWriterTest)
- detect operand never written (mutateOperationRemoveWriteTest)
Bug: 66478689
Test: VtsHalNeuralnetworksV1_*TargetTest
Change-Id: Id4ba19660bbd31a16f8a675f7b6437f4d779e8da
Merged-In: Id4ba19660bbd31a16f8a675f7b6437f4d779e8da
(cherry picked from commit af51663e99)
85 lines
3 KiB
C++
85 lines
3 KiB
C++
/*
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* Copyright (C) 2019 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <android-base/logging.h>
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#include <android/hardware/neuralnetworks/1.2/types.h>
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#include <functional>
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#include <numeric>
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namespace android {
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namespace hardware {
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namespace neuralnetworks {
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uint32_t sizeOfData(V1_2::OperandType type) {
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switch (type) {
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case V1_2::OperandType::FLOAT32:
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case V1_2::OperandType::INT32:
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case V1_2::OperandType::UINT32:
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case V1_2::OperandType::TENSOR_FLOAT32:
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case V1_2::OperandType::TENSOR_INT32:
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return 4;
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case V1_2::OperandType::TENSOR_QUANT16_SYMM:
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case V1_2::OperandType::TENSOR_FLOAT16:
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case V1_2::OperandType::FLOAT16:
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case V1_2::OperandType::TENSOR_QUANT16_ASYMM:
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return 2;
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case V1_2::OperandType::TENSOR_QUANT8_ASYMM:
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case V1_2::OperandType::BOOL:
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case V1_2::OperandType::TENSOR_BOOL8:
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case V1_2::OperandType::TENSOR_QUANT8_SYMM_PER_CHANNEL:
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case V1_2::OperandType::TENSOR_QUANT8_SYMM:
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return 1;
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default:
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CHECK(false) << "Invalid OperandType " << static_cast<uint32_t>(type);
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return 0;
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}
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}
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static bool isTensor(V1_2::OperandType type) {
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switch (type) {
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case V1_2::OperandType::FLOAT32:
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case V1_2::OperandType::INT32:
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case V1_2::OperandType::UINT32:
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case V1_2::OperandType::FLOAT16:
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case V1_2::OperandType::BOOL:
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return false;
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case V1_2::OperandType::TENSOR_FLOAT32:
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case V1_2::OperandType::TENSOR_INT32:
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case V1_2::OperandType::TENSOR_QUANT16_SYMM:
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case V1_2::OperandType::TENSOR_FLOAT16:
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case V1_2::OperandType::TENSOR_QUANT16_ASYMM:
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case V1_2::OperandType::TENSOR_QUANT8_ASYMM:
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case V1_2::OperandType::TENSOR_BOOL8:
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case V1_2::OperandType::TENSOR_QUANT8_SYMM_PER_CHANNEL:
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case V1_2::OperandType::TENSOR_QUANT8_SYMM:
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return true;
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default:
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CHECK(false) << "Invalid OperandType " << static_cast<uint32_t>(type);
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return false;
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}
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}
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uint32_t sizeOfData(const V1_2::Operand& operand) {
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const uint32_t dataSize = sizeOfData(operand.type);
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if (isTensor(operand.type) && operand.dimensions.size() == 0) return 0;
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return std::accumulate(operand.dimensions.begin(), operand.dimensions.end(), dataSize,
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std::multiplies<>{});
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}
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} // namespace neuralnetworks
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} // namespace hardware
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} // namespace android
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