94 lines
2.5 KiB
ArmAsm
94 lines
2.5 KiB
ArmAsm
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/*
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* Copyright (C) 2006 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*
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* memset32.S
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*
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*/
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.text
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.align
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.global android_memset32
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.type android_memset32, %function
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.global android_memset16
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.type android_memset16, %function
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/*
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* Optimized memset32 and memset16 for ARM.
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*
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* void android_memset16(uint16_t* dst, uint16_t value, size_t size);
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* void android_memset32(uint32_t* dst, uint32_t value, size_t size);
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*
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*/
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android_memset16:
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.fnstart
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cmp r2, #1
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bxle lr
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/* expand the data to 32 bits */
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mov r1, r1, lsl #16
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orr r1, r1, r1, lsr #16
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/* align to 32 bits */
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tst r0, #2
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strneh r1, [r0], #2
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subne r2, r2, #2
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.fnend
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android_memset32:
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.fnstart
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.save {lr}
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str lr, [sp, #-4]!
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/* align the destination to a cache-line */
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mov r12, r1
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mov lr, r1
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rsb r3, r0, #0
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ands r3, r3, #0x1C
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beq .Laligned32
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cmp r3, r2
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andhi r3, r2, #0x1C
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sub r2, r2, r3
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/* conditionally writes 0 to 7 words (length in r3) */
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movs r3, r3, lsl #28
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stmcsia r0!, {r1, lr}
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stmcsia r0!, {r1, lr}
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stmmiia r0!, {r1, lr}
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movs r3, r3, lsl #2
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strcs r1, [r0], #4
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.Laligned32:
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mov r3, r1
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1: subs r2, r2, #32
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stmhsia r0!, {r1,r3,r12,lr}
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stmhsia r0!, {r1,r3,r12,lr}
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bhs 1b
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add r2, r2, #32
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/* conditionally stores 0 to 30 bytes */
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movs r2, r2, lsl #28
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stmcsia r0!, {r1,r3,r12,lr}
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stmmiia r0!, {r1,lr}
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movs r2, r2, lsl #2
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strcs r1, [r0], #4
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strmih lr, [r0], #2
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ldr lr, [sp], #4
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bx lr
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.fnend
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