Merge "riscv64: fix mips-ism."

This commit is contained in:
Elliott Hughes 2023-03-21 16:58:19 +00:00 committed by Gerrit Code Review
commit 2077cea07d

View file

@ -6,39 +6,38 @@ crash1:
sd ra, 8(sp)
.cfi_offset ra, -8
li x0,0xdead0000+0
li x1,0xdead0000+1
li x2,0xdead0000+2
li x3,0xdead0000+3
li x4,0xdead0000+4
li x5,0xdead0000+5
li x6,0xdead0000+6
li x7,0xdead0000+7
li x8,0xdead0000+8
li x9,0xdead0000+9
li x10,0xdead0000+10
li x11,0xdead0000+11
li x12,0xdead0000+12
li x13,0xdead0000+13
li x14,0xdead0000+14
li x15,0xdead0000+15
li x16,0xdead0000+16
li x17,0xdead0000+17
li x18,0xdead0000+18
li x19,0xdead0000+19
li x20,0xdead0000+20
li x21,0xdead0000+21
li x22,0xdead0000+22
li x23,0xdead0000+23
li x24,0xdead0000+24
li x25,0xdead0000+25
li x26,0xdead0000+26
li x27,0xdead0000+27
li x28,0xdead0000+28
# don't trash the stack otherwise the signal handler won't run
#li x29,0xdead0000+29
li x30,0xdead0000+30
li x31,0xdead0000+31
li x0,0xa5a50000
li x1,0xa5a50001
li x2,0xa5a50002
li x3,0xa5a50003
li x4,0xa5a50004
li x5,0xa5a50005
li x6,0xa5a50006
li x7,0xa5a50007
li x8,0xa5a50008
li x9,0xa5a50009
li x10,0xa5a50010
li x11,0xa5a50011
li x12,0xa5a50012
li x13,0xa5a50013
li x14,0xa5a50014
li x15,0xa5a50015
li x16,0xa5a50016
li x17,0xa5a50017
li x18,0xa5a50018
li x19,0xa5a50019
li x20,0xa5a50020
li x21,0xa5a50021
li x22,0xa5a50022
li x23,0xa5a50023
li x24,0xa5a50024
li x25,0xa5a50025
li x26,0xa5a50026
li x27,0xa5a50027
li x28,0xa5a50028
li x29,0xa5a50029
li x30,0xa5a50030
li x31,0xa5a50031
li sp, 0
ld t2, 0(zero)