Merge "Remove mips pixelflinger."
This commit is contained in:
Elliott Hughes
Gerrit Code Review
commit
86f83cf41e
18 changed files with 0 additions and 2098 deletions
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@ -93,23 +93,5 @@ cc_library {
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"arch-arm64/t32cb16blend.S",
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],
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},
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mips: {
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mips32r6: {
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srcs: [
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"codeflinger/MIPSAssembler.cpp",
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"codeflinger/mips_disassem.c",
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"arch-mips/t32cb16blend.S",
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],
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},
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},
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mips64: {
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srcs: [
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"codeflinger/MIPSAssembler.cpp",
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"codeflinger/MIPS64Assembler.cpp",
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"codeflinger/mips64_disassem.c",
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"arch-mips64/col32cb16blend.S",
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"arch-mips64/t32cb16blend.S",
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],
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},
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},
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}
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@ -1,134 +0,0 @@
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/*
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** Copyright 2015, The Android Open Source Project
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**
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** Licensed under the Apache License, Version 2.0 (the "License");
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** you may not use this file except in compliance with the License.
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** You may obtain a copy of the License at
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**
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** http://www.apache.org/licenses/LICENSE-2.0
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**
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** Unless required by applicable law or agreed to in writing, software
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** distributed under the License is distributed on an "AS IS" BASIS,
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** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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** See the License for the specific language governing permissions and
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** limitations under the License.
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*/
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.macro pixel dreg src f sR sG sB shift
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#if __mips==32 && __mips_isa_rev>=2
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/* extract red */
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ext $t4,\src,\shift+11,5
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mul $t4,$t4,\f
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/* extract green */
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ext $t5,\src,\shift+5,6
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mul $t5,$t5,\f
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/* extract blue */
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ext $t6,\src,\shift,5
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mul $t6,$t6,\f
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#else
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/* extract red */
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srl $t4,\src,\shift+11
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andi $t4, 0x1f
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mul $t4,$t4,\f
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/* extract green */
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srl $t5,\src,\shift+5
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andi $t5, 0x3f
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mul $t5,$t5,\f
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/* extract blue */
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srl $t6,\src,\shift
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andi $t6, 0x1f
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mul $t6,$t6,\f
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#endif
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srl $t4,$t4,8
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srl $t5,$t5,8
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srl $t6,$t6,8
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addu $t4,$t4,\sR
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addu $t5,$t5,\sG
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addu \dreg,$t6,\sB
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sll $t4,$t4,11
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sll $t5,$t5,5
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or \dreg,\dreg,$t4
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or \dreg,\dreg,$t5
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andi \dreg, 0xffff
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.endm
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.text
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.balign 4
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.global scanline_col32cb16blend_mips
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.ent scanline_col32cb16blend_mips
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scanline_col32cb16blend_mips:
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/* check if count is zero */
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srl $v0,$a1,24 /* sA */
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beqz $a2,done
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li $t4, 0x100
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srl $v1,$v0,7
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addu $v0,$v1,$v0
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subu $v0,$t4,$v0 /* f */
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#if __mips==32 && __mips_isa_rev>=2
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ext $a3,$a1,3,5 /* sR */
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ext $t0,$a1,10,6 /* sG */
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ext $t1,$a1,19,5 /* sB */
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#else
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srl $a3, $a1, 3
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andi $a3, 0x1f /* sR */
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srl $t0, $a1, 10
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andi $t0, 0x3f /* sG */
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srl $t1, $a1, 19
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andi $t1, 0x1f /* sB */
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#endif
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/* check if cnt is at least 4 */
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addiu $a2,$a2,-4
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bltz $a2,tail
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loop_4pixels:
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lw $t7,0($a0)
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lw $t8,4($a0)
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addiu $a0,$a0,8
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addiu $a2,$a2,-4
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pixel $t2 $t7 $v0 $a3 $t0 $t1 0
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pixel $t3 $t7 $v0 $a3 $t0 $t1 16
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#if __mips==32 && __mips_isa_rev>=2
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ins $t2,$t3,16,16
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#else
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sll $t3, 16
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or $t2, $t2, $t3
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#endif
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pixel $t7 $t8 $v0 $a3 $t0 $t1 0
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pixel $t3 $t8 $v0 $a3 $t0 $t1 16
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#if __mips==32 && __mips_isa_rev>=2
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ins $t7,$t3,16,16
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#else
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sll $t3, 16
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or $t7, $t7, $t3
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#endif
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sw $t2,-8($a0)
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sw $t7,-4($a0)
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bgez $a2, loop_4pixels
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tail:
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/* the pixel count underran, restore it now */
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addiu $a2,$a2,4
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/* handle the last 0..3 pixels */
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beqz $a2,done
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loop_1pixel:
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lhu $t7,0($a0)
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addiu $a0,$a0,2
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addiu $a2,$a2,-1
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pixel $t2 $t7 $v0 $a3 $t0 $t1 0
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sh $t2, -2($a0)
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bnez $a2,loop_1pixel
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done:
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j $ra
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.end scanline_col32cb16blend_mips
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@ -1,273 +0,0 @@
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/* libs/pixelflinger/t32cb16blend.S
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**
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** Copyright 2010, The Android Open Source Project
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**
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** Licensed under the Apache License, Version 2.0 (the "License");
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** you may not use this file except in compliance with the License.
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** You may obtain a copy of the License at
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**
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** http://www.apache.org/licenses/LICENSE-2.0
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**
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** Unless required by applicable law or agreed to in writing, software
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** distributed under the License is distributed on an "AS IS" BASIS,
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** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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** See the License for the specific language governing permissions and
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** limitations under the License.
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*/
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#ifdef DEBUG
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#define DBG
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#else
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#define DBG #
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#endif
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/*
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* blend one of 2 16bpp RGB pixels held in dreg selected by shift
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* with the 32bpp ABGR pixel held in src and store the result in fb
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*
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* Assumes that the dreg data is little endian and that
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* the the second pixel (shift==16) will be merged into
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* the fb result
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*
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* Uses $t0,$t6,$t7,$t8
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*/
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#if __mips==32 && __mips_isa_rev>=2
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.macro pixel dreg src fb shift
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/*
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* sA = s >> 24
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* f = 0x100 - (sA + (sA>>7))
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*/
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DBG .set noat
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DBG rdhwr $at,$2
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DBG .set at
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srl $t7,\src,24
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srl $t6,$t7,7
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addu $t7,$t6
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li $t6,0x100
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subu $t7,$t6,$t7
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/* red */
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ext $t8,\dreg,\shift+6+5,5 # dst[\shift:15..11]
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mul $t6,$t8,$t7
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ext $t0,\dreg,\shift+5,6 # start green extraction dst[\shift:10..5]
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ext $t8,\src,3,5 # src[7..3]
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srl $t6,8
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addu $t8,$t6
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.if \shift!=0
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sll $t8,\shift+11
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or \fb,$t8
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.else
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sll \fb,$t8,11
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.endif
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/* green */
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mul $t8,$t0,$t7
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ext $t0,\dreg,\shift,5 # start blue extraction dst[\shift:4..0]
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ext $t6,\src,2+8,6 # src[15..10]
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srl $t8,8
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addu $t8,$t6
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/* blue */
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mul $t0,$t0,$t7
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sll $t8, $t8, \shift+5
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or \fb, \fb, $t8
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ext $t6,\src,(3+8+8),5
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srl $t8,$t0,8
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addu $t8,$t6
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sll $t8, $t8, \shift
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or \fb, \fb, $t8
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DBG .set noat
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DBG rdhwr $t8,$2
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DBG subu $t8,$at
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DBG sltu $at,$t8,$v0
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DBG movn $v0,$t8,$at
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DBG sgtu $at,$t8,$v1
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DBG movn $v1,$t8,$at
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DBG .set at
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.endm
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#else
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.macro pixel dreg src fb shift
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/*
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* sA = s >> 24
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* f = 0x100 - (sA + (sA>>7))
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*/
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DBG .set push
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DBG .set noat
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DBG .set mips32r2
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DBG rdhwr $at,$2
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DBG .set pop
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srl $t7,\src,24
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srl $t6,$t7,7
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addu $t7,$t6
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li $t6,0x100
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subu $t7,$t6,$t7
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/*
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* red
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* dR = (d >> (6 + 5)) & 0x1f;
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* dR = (f*dR)>>8
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* sR = (s >> ( 3)) & 0x1f;
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* sR += dR
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* fb |= sR << 11
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*/
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srl $t8,\dreg,\shift+6+5
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.if \shift==0
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and $t8,0x1f
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.endif
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mul $t8,$t8,$t7
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srl $t6,\src,3
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and $t6,0x1f
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srl $t8,8
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addu $t8,$t6
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.if \shift!=0
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sll $t8,\shift+11
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or \fb,$t8
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.else
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sll \fb,$t8,11
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.endif
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/*
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* green
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* dG = (d >> 5) & 0x3f
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* dG = (f*dG) >> 8
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* sG = (s >> ( 8+2))&0x3F;
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*/
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srl $t8,\dreg,\shift+5
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and $t8,0x3f
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mul $t8,$t8,$t7
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srl $t6,\src,8+2
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and $t6,0x3f
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srl $t8,8
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addu $t8,$t6
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sll $t8,\shift + 5
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or \fb,$t8
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/* blue */
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.if \shift!=0
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srl $t8,\dreg,\shift
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and $t8,0x1f
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.else
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and $t8,\dreg,0x1f
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.endif
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mul $t8,$t8,$t7
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srl $t6,\src,(8+8+3)
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and $t6,0x1f
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srl $t8,8
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addu $t8,$t6
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.if \shift!=0
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sll $t8,\shift
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.endif
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or \fb,$t8
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DBG .set push
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DBG .set noat
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DBG .set mips32r2
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DBG rdhwr $t8,$2
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DBG subu $t8,$at
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DBG sltu $at,$t8,$v0
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DBG movn $v0,$t8,$at
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DBG sgtu $at,$t8,$v1
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DBG movn $v1,$t8,$at
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DBG .set pop
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.endm
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#endif
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.text
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.balign 4
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.global scanline_t32cb16blend_mips
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.ent scanline_t32cb16blend_mips
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scanline_t32cb16blend_mips:
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DBG li $v0,0xffffffff
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DBG li $v1,0
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/* Align the destination if necessary */
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and $t0,$a0,3
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beqz $t0,aligned
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/* as long as there is at least one pixel */
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beqz $a2,done
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lw $t4,($a1)
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addu $a0,2
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addu $a1,4
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beqz $t4,1f
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lhu $t3,-2($a0)
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pixel $t3,$t4,$t1,0
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sh $t1,-2($a0)
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1: subu $a2,1
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aligned:
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/* Check to see if its worth unrolling the loop */
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subu $a2,4
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bltz $a2,tail
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/* Process 4 pixels at a time */
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fourpixels:
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/* 1st pair of pixels */
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lw $t4,0($a1)
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lw $t5,4($a1)
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addu $a0,8
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addu $a1,16
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/* both are zero, skip this pair */
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or $t3,$t4,$t5
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beqz $t3,1f
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/* load the destination */
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lw $t3,-8($a0)
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pixel $t3,$t4,$t1,0
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andi $t1, 0xFFFF
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pixel $t3,$t5,$t1,16
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sw $t1,-8($a0)
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1:
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/* 2nd pair of pixels */
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lw $t4,-8($a1)
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lw $t5,-4($a1)
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/* both are zero, skip this pair */
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or $t3,$t4,$t5
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beqz $t3,1f
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/* load the destination */
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lw $t3,-4($a0)
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pixel $t3,$t4,$t1,0
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andi $t1, 0xFFFF
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pixel $t3,$t5,$t1,16
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sw $t1,-4($a0)
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1: subu $a2,4
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bgtz $a2,fourpixels
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tail:
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/* the pixel count underran, restore it now */
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addu $a2,4
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/* handle the last 0..3 pixels */
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beqz $a2,done
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onepixel:
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lw $t4,($a1)
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addu $a0,2
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addu $a1,4
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beqz $t4,1f
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lhu $t3,-2($a0)
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pixel $t3,$t4,$t1,0
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sh $t1,-2($a0)
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1: subu $a2,1
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bnez $a2,onepixel
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done:
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DBG .set push
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DBG .set mips32r2
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DBG rdhwr $a0,$3
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DBG mul $v0,$a0
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DBG mul $v1,$a0
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DBG .set pop
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j $ra
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.end scanline_t32cb16blend_mips
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|
|
@ -1,108 +0,0 @@
|
|||
/*
|
||||
** Copyright 2015, The Android Open Source Project
|
||||
**
|
||||
** Licensed under the Apache License, Version 2.0 (the "License");
|
||||
** you may not use this file except in compliance with the License.
|
||||
** You may obtain a copy of the License at
|
||||
**
|
||||
** http://www.apache.org/licenses/LICENSE-2.0
|
||||
**
|
||||
** Unless required by applicable law or agreed to in writing, software
|
||||
** distributed under the License is distributed on an "AS IS" BASIS,
|
||||
** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
** See the License for the specific language governing permissions and
|
||||
** limitations under the License.
|
||||
*/
|
||||
|
||||
.macro pixel dreg src f sR sG sB shift
|
||||
|
||||
/* extract red */
|
||||
.if \shift < 32
|
||||
dext $t0,\src,\shift+11,5
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||||
.else
|
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dextu $t0,\src,\shift+11,5
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||||
.endif
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||||
mul $t0,$t0,\f
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||||
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||||
/* extract green */
|
||||
.if \shift < 32
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||||
dext $t1,\src,\shift+5,6
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||||
.else
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dextu $t1,\src,\shift+5,6
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||||
.endif
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||||
mul $t1,$t1,\f
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||||
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||||
/* extract blue */
|
||||
.if \shift < 32
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||||
dext $t2,\src,\shift,5
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.else
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dextu $t2,\src,\shift,5
|
||||
.endif
|
||||
mul $t2,$t2,\f
|
||||
|
||||
srl $t0,$t0,8
|
||||
srl $t1,$t1,8
|
||||
srl $t2,$t2,8
|
||||
addu $t0,$t0,\sR
|
||||
addu $t1,$t1,\sG
|
||||
addu \dreg,$t2,\sB
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||||
sll $t0,$t0,11
|
||||
sll $t1,$t1,5
|
||||
or \dreg,\dreg,$t0
|
||||
or \dreg,\dreg,$t1
|
||||
.endm
|
||||
|
||||
.text
|
||||
.balign 4
|
||||
|
||||
.global scanline_col32cb16blend_mips64
|
||||
.ent scanline_col32cb16blend_mips64
|
||||
scanline_col32cb16blend_mips64:
|
||||
|
||||
/* check if count is zero */
|
||||
srl $v0,$a1,24 /* sA */
|
||||
beqz $a2,done
|
||||
li $t0, 0x100
|
||||
srl $v1,$v0,7
|
||||
addu $v0,$v1,$v0
|
||||
subu $v0,$t0,$v0 /* f */
|
||||
ext $a3,$a1,3,5 /* sR */
|
||||
ext $a4,$a1,10,6 /* sG */
|
||||
ext $a5,$a1,19,5 /* sB */
|
||||
|
||||
/* check if cnt is at least 4 */
|
||||
addiu $a2,$a2,-4
|
||||
bltz $a2,tail
|
||||
|
||||
loop_4pixels:
|
||||
ld $t3,0($a0)
|
||||
daddiu $a0,$a0,8
|
||||
addiu $a2,$a2,-4
|
||||
pixel $a6 $t3 $v0 $a3 $a4 $a5 0
|
||||
pixel $a7 $t3 $v0 $a3 $a4 $a5 16
|
||||
pixel $t8 $t3 $v0 $a3 $a4 $a5 32
|
||||
pixel $t9 $t3 $v0 $a3 $a4 $a5 48
|
||||
dins $a6,$a7,16,16
|
||||
dinsu $a6,$t8,32,16
|
||||
dinsu $a6,$t9,48,16
|
||||
sd $a6,-8($a0)
|
||||
bgez $a2, loop_4pixels
|
||||
|
||||
tail:
|
||||
/* the pixel count underran, restore it now */
|
||||
addiu $a2,$a2,4
|
||||
|
||||
/* handle the last 0..3 pixels */
|
||||
beqz $a2,done
|
||||
|
||||
loop_1pixel:
|
||||
lhu $t3,0($a0)
|
||||
daddiu $a0,$a0,2
|
||||
addiu $a2,$a2,-1
|
||||
pixel $a6 $t3 $v0 $a3 $a4 $a5 0
|
||||
sh $a6, -2($a0)
|
||||
bnez $a2,loop_1pixel
|
||||
|
||||
done:
|
||||
j $ra
|
||||
.end scanline_col32cb16blend_mips64
|
||||
|
|
@ -1,172 +0,0 @@
|
|||
/*
|
||||
** Copyright 2015, The Android Open Source Project
|
||||
**
|
||||
** Licensed under the Apache License, Version 2.0 (the "License");
|
||||
** you may not use this file except in compliance with the License.
|
||||
** You may obtain a copy of the License at
|
||||
**
|
||||
** http://www.apache.org/licenses/LICENSE-2.0
|
||||
**
|
||||
** Unless required by applicable law or agreed to in writing, software
|
||||
** distributed under the License is distributed on an "AS IS" BASIS,
|
||||
** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
** See the License for the specific language governing permissions and
|
||||
** limitations under the License.
|
||||
*/
|
||||
|
||||
#ifdef DEBUG
|
||||
#define DBG
|
||||
#else
|
||||
#define DBG #
|
||||
#endif
|
||||
|
||||
/*
|
||||
* blend one of 2 16bpp RGB pixels held in dreg selected by shift
|
||||
* with the 32bpp ABGR pixel held in src and store the result in fb
|
||||
*
|
||||
* Assumes that the dreg data is little endian and that
|
||||
* the the second pixel (shift==16) will be merged into
|
||||
* the fb result
|
||||
*
|
||||
* Uses $a4,$t2,$t3,$t8
|
||||
*/
|
||||
|
||||
.macro pixel dreg src fb shift
|
||||
/*
|
||||
* sA = s >> 24
|
||||
* f = 0x100 - (sA + (sA>>7))
|
||||
*/
|
||||
srl $t3,\src,24
|
||||
srl $t2,$t3,7
|
||||
addu $t3,$t2
|
||||
li $t2,0x100
|
||||
subu $t3,$t2,$t3
|
||||
|
||||
/* red */
|
||||
ext $t8,\dreg,\shift+6+5,5 # dst[\shift:15..11]
|
||||
mul $t2,$t8,$t3
|
||||
ext $a4,\dreg,\shift+5,6 # start green extraction dst[\shift:10..5]
|
||||
ext $t8,\src,3,5 # src[7..3]
|
||||
srl $t2,8
|
||||
addu $t8,$t2
|
||||
.if \shift!=0
|
||||
sll $t8,\shift+11 # dst[\shift:15..11]
|
||||
or \fb,$t8
|
||||
.else
|
||||
sll \fb,$t8,11
|
||||
.endif
|
||||
|
||||
/* green */
|
||||
mul $t8,$a4,$t3
|
||||
ext $a4,\dreg,\shift,5 # start blue extraction dst[\shift:4..0]
|
||||
ext $t2,\src,2+8,6 # src[15..10]
|
||||
srl $t8,8
|
||||
addu $t8,$t2
|
||||
|
||||
/* blue */
|
||||
mul $a4,$a4,$t3
|
||||
sll $t8, $t8, \shift+5 # finish green insertion dst[\shift:10..5]
|
||||
or \fb, \fb, $t8
|
||||
ext $t2,\src,(3+8+8),5
|
||||
srl $t8,$a4,8
|
||||
addu $t8,$t2
|
||||
sll $t8, $t8, \shift
|
||||
or \fb, \fb, $t8
|
||||
.endm
|
||||
|
||||
.text
|
||||
.balign 4
|
||||
|
||||
.global scanline_t32cb16blend_mips64
|
||||
.ent scanline_t32cb16blend_mips64
|
||||
scanline_t32cb16blend_mips64:
|
||||
daddiu $sp, $sp, -40
|
||||
DBG li $v0,0xffffffff
|
||||
DBG li $v1,0
|
||||
/* Align the destination if necessary */
|
||||
and $a4,$a0,3
|
||||
beqz $a4,aligned
|
||||
|
||||
/* as long as there is at least one pixel */
|
||||
beqz $a2,done
|
||||
|
||||
lw $t0,($a1)
|
||||
daddu $a0,2
|
||||
daddu $a1,4
|
||||
beqz $t0,1f
|
||||
lhu $a7,-2($a0)
|
||||
pixel $a7,$t0,$a5,0
|
||||
sh $a5,-2($a0)
|
||||
1: subu $a2,1
|
||||
|
||||
aligned:
|
||||
/* Check to see if its worth unrolling the loop */
|
||||
subu $a2,4
|
||||
bltz $a2,tail
|
||||
|
||||
/* Process 4 pixels at a time */
|
||||
fourpixels:
|
||||
/* 1st pair of pixels */
|
||||
lw $t0,0($a1)
|
||||
lw $t1,4($a1)
|
||||
daddu $a0,8
|
||||
daddu $a1,16
|
||||
|
||||
/* both are zero, skip this pair */
|
||||
or $a7,$t0,$t1
|
||||
beqz $a7,1f
|
||||
|
||||
/* load the destination */
|
||||
lw $a7,-8($a0)
|
||||
|
||||
pixel $a7,$t0,$a5,0
|
||||
andi $a5, 0xFFFF
|
||||
pixel $a7,$t1,$a5,16
|
||||
sw $a5,-8($a0)
|
||||
|
||||
1:
|
||||
/* 2nd pair of pixels */
|
||||
lw $t0,-8($a1)
|
||||
lw $t1,-4($a1)
|
||||
|
||||
/* both are zero, skip this pair */
|
||||
or $a7,$t0,$t1
|
||||
beqz $a7,1f
|
||||
|
||||
/* load the destination */
|
||||
lw $a7,-4($a0)
|
||||
|
||||
pixel $a7,$t0,$a5,0
|
||||
andi $a5, 0xFFFF
|
||||
pixel $a7,$t1,$a5,16
|
||||
sw $a5,-4($a0)
|
||||
|
||||
1: subu $a2,4
|
||||
bgtz $a2,fourpixels
|
||||
|
||||
tail:
|
||||
/* the pixel count underran, restore it now */
|
||||
addu $a2,4
|
||||
|
||||
/* handle the last 0..3 pixels */
|
||||
beqz $a2,done
|
||||
onepixel:
|
||||
lw $t0,($a1)
|
||||
daddu $a0,2
|
||||
daddu $a1,4
|
||||
beqz $t0,1f
|
||||
lhu $a7,-2($a0)
|
||||
pixel $a7,$t0,$a5,0
|
||||
sh $a5,-2($a0)
|
||||
1: subu $a2,1
|
||||
bnez $a2,onepixel
|
||||
done:
|
||||
DBG .set push
|
||||
DBG .set mips32r2
|
||||
DBG rdhwr $a0,$3
|
||||
DBG mul $v0,$a0
|
||||
DBG mul $v1,$a0
|
||||
DBG .set pop
|
||||
daddiu $sp, $sp, 40
|
||||
j $ra
|
||||
.end scanline_t32cb16blend_mips64
|
||||
|
|
@ -1,11 +0,0 @@
|
|||
cc_defaults {
|
||||
name: "pixelflinger-tests-mips",
|
||||
defaults: ["pixelflinger-tests"],
|
||||
|
||||
enabled: false,
|
||||
arch: {
|
||||
mips: {
|
||||
enabled: true,
|
||||
},
|
||||
},
|
||||
}
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
cc_test {
|
||||
name: "test-pixelflinger-mips-col32cb16blend",
|
||||
defaults: ["pixelflinger-tests-mips"],
|
||||
|
||||
srcs: ["col32cb16blend_test.c"],
|
||||
}
|
||||
|
|
@ -1,125 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2015 The Android Open Source Project
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <assert.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <inttypes.h>
|
||||
|
||||
|
||||
#define ARGB_8888_MAX 0xFFFFFFFF
|
||||
#define ARGB_8888_MIN 0x00000000
|
||||
#define RGB_565_MAX 0xFFFF
|
||||
#define RGB_565_MIN 0x0000
|
||||
|
||||
struct test_t
|
||||
{
|
||||
char name[256];
|
||||
uint32_t src_color;
|
||||
uint16_t dst_color;
|
||||
size_t count;
|
||||
};
|
||||
|
||||
struct test_t tests[] =
|
||||
{
|
||||
{"Count 1, Src=Max, Dst=Min", ARGB_8888_MAX, RGB_565_MIN, 1},
|
||||
{"Count 2, Src=Min, Dst=Max", ARGB_8888_MIN, RGB_565_MAX, 2},
|
||||
{"Count 3, Src=Max, Dst=Max", ARGB_8888_MAX, RGB_565_MAX, 3},
|
||||
{"Count 4, Src=Min, Dst=Min", ARGB_8888_MAX, RGB_565_MAX, 4},
|
||||
{"Count 1, Src=Rand, Dst=Rand", 0x12345678, 0x9ABC, 1},
|
||||
{"Count 2, Src=Rand, Dst=Rand", 0xABCDEF12, 0x2345, 2},
|
||||
{"Count 3, Src=Rand, Dst=Rand", 0x11111111, 0xEDFE, 3},
|
||||
{"Count 4, Src=Rand, Dst=Rand", 0x12345678, 0x9ABC, 4},
|
||||
{"Count 5, Src=Rand, Dst=Rand", 0xEFEFFEFE, 0xFACC, 5},
|
||||
{"Count 10, Src=Rand, Dst=Rand", 0x12345678, 0x9ABC, 10}
|
||||
};
|
||||
|
||||
void scanline_col32cb16blend_mips(uint16_t *dst, uint32_t src, size_t count);
|
||||
void scanline_col32cb16blend_c(uint16_t * dst, uint32_t src, size_t count)
|
||||
{
|
||||
uint32_t srcAlpha = (src>>24);
|
||||
uint32_t f = 0x100 - (srcAlpha + (srcAlpha>>7));
|
||||
|
||||
while (count--)
|
||||
{
|
||||
uint16_t d = *dst;
|
||||
int dstR = (d>>11)&0x1f;
|
||||
int dstG = (d>>5)&0x3f;
|
||||
int dstB = (d)&0x1f;
|
||||
int srcR = (src >> ( 3))&0x1F;
|
||||
int srcG = (src >> ( 8+2))&0x3F;
|
||||
int srcB = (src >> (16+3))&0x1F;
|
||||
srcR += (f*dstR)>>8;
|
||||
srcG += (f*dstG)>>8;
|
||||
srcB += (f*dstB)>>8;
|
||||
*dst++ = (uint16_t)((srcR<<11)|(srcG<<5)|srcB);
|
||||
}
|
||||
}
|
||||
|
||||
void scanline_col32cb16blend_test()
|
||||
{
|
||||
uint16_t dst_c[16], dst_asm[16];
|
||||
uint32_t i, j;
|
||||
|
||||
for(i = 0; i < sizeof(tests)/sizeof(struct test_t); ++i)
|
||||
{
|
||||
struct test_t test = tests[i];
|
||||
|
||||
printf("Testing - %s:",test.name);
|
||||
|
||||
memset(dst_c, 0, sizeof(dst_c));
|
||||
memset(dst_asm, 0, sizeof(dst_asm));
|
||||
|
||||
for(j = 0; j < test.count; ++j)
|
||||
{
|
||||
dst_c[j] = test.dst_color;
|
||||
dst_asm[j] = test.dst_color;
|
||||
}
|
||||
|
||||
|
||||
scanline_col32cb16blend_c(dst_c, test.src_color, test.count);
|
||||
scanline_col32cb16blend_mips(dst_asm, test.src_color, test.count);
|
||||
|
||||
if(memcmp(dst_c, dst_asm, sizeof(dst_c)) == 0)
|
||||
printf("Passed\n");
|
||||
else
|
||||
printf("Failed\n");
|
||||
|
||||
for(j = 0; j < test.count; ++j)
|
||||
{
|
||||
printf("dst_c[%d] = %x, dst_asm[%d] = %x \n", j, dst_c[j], j, dst_asm[j]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int main()
|
||||
{
|
||||
scanline_col32cb16blend_test();
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
cc_test {
|
||||
name: "test-pixelflinger-mips-t32cb16blend",
|
||||
defaults: ["pixelflinger-tests-mips"],
|
||||
|
||||
srcs: ["t32cb16blend_test.c"],
|
||||
}
|
||||
|
|
@ -1,134 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2015 The Android Open Source Project
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <assert.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <inttypes.h>
|
||||
|
||||
#define ARGB_8888_MAX 0xFFFFFFFF
|
||||
#define ARGB_8888_MIN 0x00000000
|
||||
#define RGB_565_MAX 0xFFFF
|
||||
#define RGB_565_MIN 0x0000
|
||||
|
||||
struct test_t
|
||||
{
|
||||
char name[256];
|
||||
uint32_t src_color;
|
||||
uint16_t dst_color;
|
||||
size_t count;
|
||||
};
|
||||
|
||||
struct test_t tests[] =
|
||||
{
|
||||
{"Count 0", 0, 0, 0},
|
||||
{"Count 1, Src=Max, Dst=Min", ARGB_8888_MAX, RGB_565_MIN, 1},
|
||||
{"Count 2, Src=Min, Dst=Max", ARGB_8888_MIN, RGB_565_MAX, 2},
|
||||
{"Count 3, Src=Max, Dst=Max", ARGB_8888_MAX, RGB_565_MAX, 3},
|
||||
{"Count 4, Src=Min, Dst=Min", ARGB_8888_MAX, RGB_565_MAX, 4},
|
||||
{"Count 1, Src=Rand, Dst=Rand", 0x12345678, 0x9ABC, 1},
|
||||
{"Count 2, Src=Rand, Dst=Rand", 0xABCDEF12, 0x2345, 2},
|
||||
{"Count 3, Src=Rand, Dst=Rand", 0x11111111, 0xEDFE, 3},
|
||||
{"Count 4, Src=Rand, Dst=Rand", 0x12345678, 0x9ABC, 4},
|
||||
{"Count 5, Src=Rand, Dst=Rand", 0xEFEFFEFE, 0xFACC, 5},
|
||||
{"Count 10, Src=Rand, Dst=Rand", 0x12345678, 0x9ABC, 10}
|
||||
|
||||
};
|
||||
|
||||
void scanline_t32cb16blend_mips(uint16_t*, uint32_t*, size_t);
|
||||
void scanline_t32cb16blend_c(uint16_t * dst, uint32_t* src, size_t count)
|
||||
{
|
||||
while (count--)
|
||||
{
|
||||
uint16_t d = *dst;
|
||||
uint32_t s = *src++;
|
||||
int dstR = (d>>11)&0x1f;
|
||||
int dstG = (d>>5)&0x3f;
|
||||
int dstB = (d)&0x1f;
|
||||
int srcR = (s >> ( 3))&0x1F;
|
||||
int srcG = (s >> ( 8+2))&0x3F;
|
||||
int srcB = (s >> (16+3))&0x1F;
|
||||
int srcAlpha = (s>>24) & 0xFF;
|
||||
|
||||
|
||||
int f = 0x100 - (srcAlpha + ((srcAlpha>>7) & 0x1));
|
||||
srcR += (f*dstR)>>8;
|
||||
srcG += (f*dstG)>>8;
|
||||
srcB += (f*dstB)>>8;
|
||||
// srcR = srcR > 0x1F? 0x1F: srcR;
|
||||
// srcG = srcG > 0x3F? 0x3F: srcG;
|
||||
// srcB = srcB > 0x1F? 0x1F: srcB;
|
||||
*dst++ = (uint16_t)((srcR<<11)|(srcG<<5)|srcB);
|
||||
}
|
||||
}
|
||||
|
||||
void scanline_t32cb16blend_test()
|
||||
{
|
||||
uint16_t dst_c[16], dst_asm[16];
|
||||
uint32_t src[16];
|
||||
uint32_t i;
|
||||
uint32_t j;
|
||||
|
||||
for(i = 0; i < sizeof(tests)/sizeof(struct test_t); ++i)
|
||||
{
|
||||
struct test_t test = tests[i];
|
||||
|
||||
printf("Testing - %s:",test.name);
|
||||
|
||||
memset(dst_c, 0, sizeof(dst_c));
|
||||
memset(dst_asm, 0, sizeof(dst_asm));
|
||||
|
||||
for(j = 0; j < test.count; ++j)
|
||||
{
|
||||
dst_c[j] = test.dst_color;
|
||||
dst_asm[j] = test.dst_color;
|
||||
src[j] = test.src_color;
|
||||
}
|
||||
|
||||
scanline_t32cb16blend_c(dst_c,src,test.count);
|
||||
scanline_t32cb16blend_mips(dst_asm,src,test.count);
|
||||
|
||||
|
||||
if(memcmp(dst_c, dst_asm, sizeof(dst_c)) == 0)
|
||||
printf("Passed\n");
|
||||
else
|
||||
printf("Failed\n");
|
||||
|
||||
for(j = 0; j < test.count; ++j)
|
||||
{
|
||||
printf("dst_c[%d] = %x, dst_asm[%d] = %x \n", j, dst_c[j], j, dst_asm[j]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int main()
|
||||
{
|
||||
scanline_t32cb16blend_test();
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1,11 +0,0 @@
|
|||
cc_defaults {
|
||||
name: "pixelflinger-tests-mips64",
|
||||
defaults: ["pixelflinger-tests"],
|
||||
|
||||
enabled: false,
|
||||
arch: {
|
||||
mips64: {
|
||||
enabled: true,
|
||||
},
|
||||
},
|
||||
}
|
||||
|
|
@ -1,9 +0,0 @@
|
|||
cc_test {
|
||||
name: "test-pixelflinger-mips64-assembler-test",
|
||||
defaults: ["pixelflinger-tests-mips64"],
|
||||
|
||||
srcs: [
|
||||
"mips64_assembler_test.cpp",
|
||||
"asm_mips_test_jacket.S",
|
||||
],
|
||||
}
|
||||
|
|
@ -1,93 +0,0 @@
|
|||
# /*
|
||||
# * Copyright (C) 2015 The Android Open Source Project
|
||||
# * All rights reserved.
|
||||
# *
|
||||
# * Redistribution and use in source and binary forms, with or without
|
||||
# * modification, are permitted provided that the following conditions
|
||||
# * are met:
|
||||
# * * Redistributions of source code must retain the above copyright
|
||||
# * notice, this list of conditions and the following disclaimer.
|
||||
# * * Redistributions in binary form must reproduce the above copyright
|
||||
# * notice, this list of conditions and the following disclaimer in
|
||||
# * the documentation and/or other materials provided with the
|
||||
# * distribution.
|
||||
# *
|
||||
# * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
# * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
# * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
# * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
# * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
# * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
# * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
# * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
# * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
# * SUCH DAMAGE.
|
||||
# */
|
||||
|
||||
.text
|
||||
.balign 8
|
||||
|
||||
.global asm_mips_test_jacket
|
||||
|
||||
# // Set the register
|
||||
# // Calls the asm function
|
||||
# // Reads the register values to output register
|
||||
|
||||
# // Parameters
|
||||
# // a0 - Function to jump
|
||||
# // a1 - register values array
|
||||
# // a2 - flag values array
|
||||
asm_mips_test_jacket:
|
||||
# // Save registers to stack
|
||||
daddiu $sp, $sp, -96
|
||||
sd $s0, 64($sp)
|
||||
sd $s1, 72($sp)
|
||||
sd $s2, 80($sp)
|
||||
sd $ra, 88($sp)
|
||||
|
||||
move $s0, $a0
|
||||
move $s1, $a1
|
||||
move $s2, $a2
|
||||
|
||||
ld $v0, 16($s1)
|
||||
ld $v1, 24($s1)
|
||||
ld $a0, 32($s1)
|
||||
ld $a1, 40($s1)
|
||||
ld $a2, 48($s1)
|
||||
ld $a3, 56($s1)
|
||||
ld $a4, 64($s1)
|
||||
ld $a5, 72($s1)
|
||||
ld $a6, 80($s1)
|
||||
ld $a7, 88($s1)
|
||||
ld $t0, 96($s1)
|
||||
ld $t1, 104($s1)
|
||||
ld $t2, 112($s1)
|
||||
ld $t3, 120($s1)
|
||||
|
||||
jal $s0
|
||||
|
||||
sd $v0, 16($s1)
|
||||
sd $v1, 24($s1)
|
||||
sd $a0, 32($s1)
|
||||
sd $a1, 40($s1)
|
||||
sd $a2, 48($s1)
|
||||
sd $a3, 56($s1)
|
||||
sd $a4, 64($s1)
|
||||
sd $a5, 72($s1)
|
||||
sd $a6, 80($s1)
|
||||
sd $a7, 88($s1)
|
||||
sd $t0, 96($s1)
|
||||
sd $t1, 104($s1)
|
||||
sd $t2, 112($s1)
|
||||
sd $t3, 120($s1)
|
||||
|
||||
ld $s0, 64($sp)
|
||||
ld $s1, 72($sp)
|
||||
ld $s2, 80($sp)
|
||||
ld $ra, 88($sp)
|
||||
|
||||
daddiu $sp, $sp, 96
|
||||
|
||||
j $ra
|
||||
|
|
@ -1,643 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2015 The Android Open Source Project
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <errno.h>
|
||||
#define __STDC_FORMAT_MACROS
|
||||
#include <inttypes.h>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <sys/mman.h>
|
||||
#include <unistd.h>
|
||||
|
||||
#include <android/log.h>
|
||||
#include <cutils/ashmem.h>
|
||||
|
||||
#include "codeflinger/ARMAssemblerInterface.h"
|
||||
#include "codeflinger/MIPS64Assembler.h"
|
||||
|
||||
using namespace android;
|
||||
|
||||
#define TESTS_DATAOP_ENABLE 1
|
||||
#define TESTS_DATATRANSFER_ENABLE 1
|
||||
#define ASSEMBLY_SCRATCH_SIZE 4096
|
||||
|
||||
void *instrMem;
|
||||
uint32_t instrMemSize = 128 * 1024;
|
||||
char dataMem[8192];
|
||||
|
||||
typedef void (*asm_function_t)();
|
||||
extern "C" void asm_mips_test_jacket(asm_function_t function,
|
||||
int64_t regs[], int32_t flags[]);
|
||||
|
||||
#define MAX_32BIT (uint32_t)(((uint64_t)1 << 32) - 1)
|
||||
#define MAX_64BIT ((uint64_t)0xFFFFFFFFFFFFFFFF)
|
||||
const uint32_t NA = 0;
|
||||
const uint32_t NUM_REGS = 32;
|
||||
const uint32_t NUM_FLAGS = 16;
|
||||
|
||||
enum instr_t
|
||||
{
|
||||
INSTR_ADD,
|
||||
INSTR_SUB,
|
||||
INSTR_AND,
|
||||
INSTR_ORR,
|
||||
INSTR_RSB,
|
||||
INSTR_BIC,
|
||||
INSTR_CMP,
|
||||
INSTR_MOV,
|
||||
INSTR_MVN,
|
||||
INSTR_MUL,
|
||||
INSTR_MLA,
|
||||
INSTR_SMULBB,
|
||||
INSTR_SMULBT,
|
||||
INSTR_SMULTB,
|
||||
INSTR_SMULTT,
|
||||
INSTR_SMULWB,
|
||||
INSTR_SMULWT,
|
||||
INSTR_SMLABB,
|
||||
INSTR_UXTB16,
|
||||
INSTR_UBFX,
|
||||
INSTR_ADDR_ADD,
|
||||
INSTR_ADDR_SUB,
|
||||
INSTR_LDR,
|
||||
INSTR_LDRB,
|
||||
INSTR_LDRH,
|
||||
INSTR_ADDR_LDR,
|
||||
INSTR_LDM,
|
||||
INSTR_STR,
|
||||
INSTR_STRB,
|
||||
INSTR_STRH,
|
||||
INSTR_ADDR_STR,
|
||||
INSTR_STM
|
||||
};
|
||||
|
||||
enum shift_t
|
||||
{
|
||||
SHIFT_LSL,
|
||||
SHIFT_LSR,
|
||||
SHIFT_ASR,
|
||||
SHIFT_ROR,
|
||||
SHIFT_NONE
|
||||
};
|
||||
|
||||
enum offset_t
|
||||
{
|
||||
REG_SCALE_OFFSET,
|
||||
REG_OFFSET,
|
||||
IMM8_OFFSET,
|
||||
IMM12_OFFSET,
|
||||
NO_OFFSET
|
||||
};
|
||||
|
||||
enum cond_t
|
||||
{
|
||||
EQ, NE, CS, CC, MI, PL, VS, VC, HI, LS, GE, LT, GT, LE, AL, NV,
|
||||
HS = CS,
|
||||
LO = CC
|
||||
};
|
||||
|
||||
const char * cc_code[] =
|
||||
{
|
||||
"EQ", "NE", "CS", "CC", "MI", "PL", "VS", "VC",
|
||||
"HI", "LS","GE","LT", "GT", "LE", "AL", "NV"
|
||||
};
|
||||
|
||||
struct condTest_t
|
||||
{
|
||||
int mode;
|
||||
int32_t Rcond1;
|
||||
int32_t Rcond2;
|
||||
uint64_t Rcond1Value;
|
||||
uint64_t Rcond2Value;
|
||||
};
|
||||
|
||||
|
||||
struct dataOpTest_t
|
||||
{
|
||||
uint32_t id;
|
||||
instr_t op;
|
||||
condTest_t preCond;
|
||||
cond_t cond;
|
||||
bool setFlags;
|
||||
uint64_t RnValue;
|
||||
uint64_t RsValue;
|
||||
bool immediate;
|
||||
uint32_t immValue;
|
||||
uint64_t RmValue;
|
||||
uint32_t shiftMode;
|
||||
uint32_t shiftAmount;
|
||||
uint64_t RdValue;
|
||||
bool checkRd;
|
||||
uint64_t postRdValue;
|
||||
};
|
||||
|
||||
struct dataTransferTest_t
|
||||
{
|
||||
uint32_t id;
|
||||
instr_t op;
|
||||
uint32_t preFlag;
|
||||
cond_t cond;
|
||||
bool setMem;
|
||||
uint64_t memOffset;
|
||||
uint64_t memValue;
|
||||
uint64_t RnValue;
|
||||
offset_t offsetType;
|
||||
uint64_t RmValue;
|
||||
uint32_t immValue;
|
||||
bool writeBack;
|
||||
bool preIndex;
|
||||
bool postIndex;
|
||||
uint64_t RdValue;
|
||||
uint64_t postRdValue;
|
||||
uint64_t postRnValue;
|
||||
bool checkMem;
|
||||
uint64_t postMemOffset;
|
||||
uint32_t postMemLength;
|
||||
uint64_t postMemValue;
|
||||
};
|
||||
|
||||
|
||||
dataOpTest_t dataOpTests [] =
|
||||
{
|
||||
{0xA000,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,1,MAX_32BIT,NA,NA,NA,NA,1,0},
|
||||
{0xA001,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,1,MAX_32BIT-1,NA,NA,NA,NA,1,MAX_64BIT},
|
||||
{0xA002,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,0,NA,MAX_32BIT,NA,NA,NA,1,0},
|
||||
{0xA003,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,0,NA,MAX_32BIT-1,NA,NA,NA,1,MAX_64BIT},
|
||||
{0xA004,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT,SHIFT_LSL, 0,NA,1,0},
|
||||
{0xA005,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT,SHIFT_LSL,31,NA,1,0xFFFFFFFF80000001},
|
||||
{0xA006,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,0,0,3,SHIFT_LSR,1,NA,1,2},
|
||||
{0xA007,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT,SHIFT_LSR,31,NA,1,2},
|
||||
{0xA008,INSTR_ADD,{0,0,0,0,0},AL,0,0,NA,0,0,3,SHIFT_ASR,1,NA,1,1},
|
||||
{0xA009,INSTR_ADD,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_64BIT,SHIFT_ASR,31,NA,1,0},
|
||||
{0xA010,INSTR_AND,{0,0,0,0,0},AL,0,1,NA,1,MAX_32BIT,0,0,0,NA,1,1},
|
||||
{0xA011,INSTR_AND,{0,0,0,0,0},AL,0,1,NA,1,MAX_32BIT-1,0,0,0,NA,1,0},
|
||||
{0xA012,INSTR_AND,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT,0,0,NA,1,1},
|
||||
{0xA013,INSTR_AND,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT-1,0,0,NA,1,0},
|
||||
{0xA014,INSTR_AND,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT,SHIFT_LSL,0,NA,1,1},
|
||||
{0xA015,INSTR_AND,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT,SHIFT_LSL,31,NA,1,0},
|
||||
{0xA016,INSTR_AND,{0,0,0,0,0},AL,0,1,NA,0,0,3,SHIFT_LSR,1,NA,1,1},
|
||||
{0xA017,INSTR_AND,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT,SHIFT_LSR,31,NA,1,1},
|
||||
{0xA018,INSTR_AND,{0,0,0,0,0},AL,0,0,NA,0,0,3,SHIFT_ASR,1,NA,1,0},
|
||||
{0xA019,INSTR_AND,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT,SHIFT_ASR,31,NA,1,1},
|
||||
{0xA020,INSTR_ORR,{0,0,0,0,0},AL,0,3,NA,1,MAX_32BIT,0,0,0,NA,1,MAX_64BIT},
|
||||
{0xA021,INSTR_ORR,{0,0,0,0,0},AL,0,2,NA,1,MAX_32BIT-1,0,0,0,NA,1,MAX_64BIT-1},
|
||||
{0xA022,INSTR_ORR,{0,0,0,0,0},AL,0,3,NA,0,0,MAX_32BIT,0,0,NA,1,MAX_64BIT},
|
||||
{0xA023,INSTR_ORR,{0,0,0,0,0},AL,0,2,NA,0,0,MAX_32BIT-1,0,0,NA,1,MAX_64BIT-1},
|
||||
{0xA024,INSTR_ORR,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT,SHIFT_LSL,0,NA,1,MAX_64BIT},
|
||||
{0xA025,INSTR_ORR,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT,SHIFT_LSL,31,NA,1,0xFFFFFFFF80000001},
|
||||
{0xA026,INSTR_ORR,{0,0,0,0,0},AL,0,1,NA,0,0,3,SHIFT_LSR,1,NA,1,1},
|
||||
{0xA027,INSTR_ORR,{0,0,0,0,0},AL,0,0,NA,0,0,MAX_32BIT,SHIFT_LSR,31,NA,1,1},
|
||||
{0xA028,INSTR_ORR,{0,0,0,0,0},AL,0,0,NA,0,0,3,SHIFT_ASR,1,NA,1,1},
|
||||
{0xA029,INSTR_ORR,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_64BIT,SHIFT_ASR,31,NA,1,MAX_64BIT},
|
||||
{0xA030,INSTR_CMP,{0,0,0,0,0},AL,1,0x10000,NA,1,0x10000,0,0,0,NA,0,0},
|
||||
{0xA031,INSTR_MUL,{0,0,0,0,0},AL,0,0,0x10000,0,0,0x10000,0,0,NA,1,0},
|
||||
{0xA032,INSTR_MUL,{0,0,0,0,0},AL,0,0,0x1000,0,0,0x10000,0,0,NA,1,0x10000000},
|
||||
{0xA033,INSTR_MUL,{0,0,0,0,0},AL,0,0,MAX_32BIT,0,0,1,0,0,NA,1,MAX_64BIT},
|
||||
{0xA034,INSTR_MLA,{0,0,0,0,0},AL,0,0x10000,0x10000,0,0,0x10000,0,0,NA,1,0x10000},
|
||||
{0xA035,INSTR_MLA,{0,0,0,0,0},AL,0,0x10000,0x1000,0,0,0x10000,0,0,NA,1,0x10010000},
|
||||
{0xA036,INSTR_SUB,{1,R_v1,R_a6,2,4},MI,0,2,NA,0,NA,1,NA,NA,2,1,1},
|
||||
{0xA037,INSTR_SUB,{2,R_v1,R_a6,2,0},MI,0,2,NA,0,NA,1,NA,NA,2,1,2},
|
||||
{0xA038,INSTR_SUB,{1,R_v1,R_a6,4,2},GE,0,2,NA,1,1,NA,NA,NA,2,1,1},
|
||||
{0xA039,INSTR_SUB,{1,R_a5,R_a6,2,7},GE,0,2,NA,1,1,NA,NA,NA,2,1,2},
|
||||
{0xA040,INSTR_SUB,{1,R_a5,R_a6,1,1},HS,0,2,NA,1,1,NA,NA,NA,2,1,1},
|
||||
{0xA041,INSTR_SUB,{1,R_a5,R_a6,0,1},HS,0,2,NA,1,1,NA,NA,NA,2,1,2},
|
||||
{0xA042,INSTR_SUB,{0,0,0,0,0},AL,0,1,NA,1,1<< 16,0,0,0,NA,1,UINT64_C(1) -(1<<16)},
|
||||
{0xA043,INSTR_SUB,{0,0,0,0,0},AL,0,MAX_32BIT,NA,1,1,0,0,0,NA,1,MAX_64BIT-1},
|
||||
{0xA044,INSTR_SUB,{0,0,0,0,0},AL,0,1,NA,1,1,0,0,0,NA,1,0},
|
||||
{0xA045,INSTR_SUB,{0,0,0,0,0},AL,0,1,NA,0,NA,1<<16,0,0,NA,1,UINT64_C(1) -(1<<16)},
|
||||
{0xA046,INSTR_SUB,{0,0,0,0,0},AL,0,MAX_32BIT,NA,0,NA,1,0,0,NA,1,MAX_64BIT-1},
|
||||
{0xA047,INSTR_SUB,{0,0,0,0,0},AL,0,1,NA,0,NA,1,0,0,NA,1,0},
|
||||
{0xA048,INSTR_SUB,{0,0,0,0,0},AL,0,1,NA,0,NA,1,SHIFT_LSL,16,NA,1,UINT64_C(1) -(1<<16)},
|
||||
{0xA049,INSTR_SUB,{0,0,0,0,0},AL,0,0x80000001,NA,0,NA,MAX_32BIT,SHIFT_LSL,31,NA,1,1},
|
||||
{0xA050,INSTR_SUB,{0,0,0,0,0},AL,0,1,NA,0,NA,3,SHIFT_LSR,1,NA,1,0},
|
||||
{0xA051,INSTR_SUB,{0,0,0,0,0},AL,0,1,NA,0,NA,MAX_32BIT,SHIFT_LSR,31,NA,1,0},
|
||||
{0xA052,INSTR_RSB,{1,R_a5,R_a6,4,1},GE,0,2,NA,1,0,NA,NA,NA,2,1,UINT64_C(-2)},
|
||||
{0xA053,INSTR_RSB,{1,R_a5,R_a6,UINT64_C(-1),1},GE,0,2,NA,1,0,NA,NA,NA,2,1,2},
|
||||
{0xA054,INSTR_RSB,{0,0,0,0,0},AL,0,1,NA,1,1<<16,NA,NA,NA,NA,1,(1<<16)-1},
|
||||
{0xA055,INSTR_RSB,{0,0,0,0,0},AL,0,MAX_32BIT,NA,1,1,NA,NA,NA,NA,1,UINT64_C(1)-MAX_64BIT},
|
||||
{0xA056,INSTR_RSB,{0,0,0,0,0},AL,0,1,NA,1,1,NA,NA,NA,NA,1,0},
|
||||
{0xA057,INSTR_RSB,{0,0,0,0,0},AL,0,1,NA,0,NA,1<<16,0,0,NA,1,(1<<16)-1},
|
||||
{0xA058,INSTR_RSB,{0,0,0,0,0},AL,0,MAX_32BIT,NA,0,NA,1,0,0,NA,1,UINT64_C(1)-MAX_64BIT},
|
||||
{0xA059,INSTR_RSB,{0,0,0,0,0},AL,0,1,NA,0,NA,1,0,0,NA,1,0},
|
||||
{0xA060,INSTR_RSB,{0,0,0,0,0},AL,0,1,NA,0,NA,1,SHIFT_LSL,16,NA,1,(1<<16)-1},
|
||||
{0xA061,INSTR_RSB,{0,0,0,0,0},AL,0,0x80000001,NA,0,NA,MAX_32BIT ,SHIFT_LSL,31,NA,1,UINT64_C(-1)},
|
||||
{0xA062,INSTR_RSB,{0,0,0,0,0},AL,0,1,NA,0,NA,3,SHIFT_LSR,1,NA,1,0},
|
||||
{0xA063,INSTR_RSB,{0,0,0,0,0},AL,0,1,NA,0,NA,MAX_32BIT,SHIFT_LSR,31,NA,1,0},
|
||||
{0xA064,INSTR_MOV,{0,0,0,0,0},AL,0,NA,NA,1,0x80000001,NA,NA,NA,NA,1,0xFFFFFFFF80000001},
|
||||
{0xA065,INSTR_MOV,{0,0,0,0,0},AL,0,NA,NA,0,0,0x80000001,0,0,NA,1,0xFFFFFFFF80000001},
|
||||
{0xA066,INSTR_MOV,{0,0,0,0,0},AL,0,NA,NA,0,0,MAX_32BIT,SHIFT_LSL,1,NA,1,MAX_64BIT-1},
|
||||
{0xA067,INSTR_MOV,{0,0,0,0,0},AL,0,NA,NA,0,0,MAX_32BIT,SHIFT_LSL,31,NA,1,0xFFFFFFFF80000000},
|
||||
{0xA068,INSTR_MOV,{0,0,0,0,0},AL,0,NA,NA,0,0,3,SHIFT_LSR,1,NA,1,1},
|
||||
{0xA069,INSTR_MOV,{0,0,0,0,0},AL,0,NA,NA,0,0,MAX_32BIT,SHIFT_LSR,31,NA,1,1},
|
||||
{0xA070,INSTR_MOV,{0,0,0,0,0},AL,0,NA,NA,0,0,3,SHIFT_ASR,1,NA,1,1},
|
||||
{0xA071,INSTR_MOV,{0,0,0,0,0},AL,0,NA,NA,0,0,MAX_64BIT ,SHIFT_ASR,31,NA,1,MAX_64BIT},
|
||||
{0xA072,INSTR_MOV,{0,0,0,0,0},AL,0,NA,NA,0,0,3,SHIFT_ROR,1,NA,1,0xFFFFFFFF80000001},
|
||||
{0xA073,INSTR_MOV,{0,0,0,0,0},AL,0,NA,NA,0,0,0x80000001,SHIFT_ROR,31,NA,1,3},
|
||||
{0xA074,INSTR_MOV,{0,0,0,0,0},AL,1,NA,NA,0,0,MAX_64BIT -1,SHIFT_ASR,1,NA,1,MAX_64BIT},
|
||||
{0xA075,INSTR_MOV,{0,0,0,0,0},AL,1,NA,NA,0,0,3,SHIFT_ASR,1,NA,1,1},
|
||||
{0xA076,INSTR_MOV,{2,R_a5,R_a6,6,8},MI,0,NA,NA,1,0x80000001,NA,NA,NA,2,1,2},
|
||||
{0xA077,INSTR_MOV,{2,R_a5,R_a6,UINT64_C(-4),UINT64_C(-8)},MI,0,NA,NA,0,0,0x80000001,0,0,2,1,0xFFFFFFFF80000001},
|
||||
{0xA078,INSTR_MOV,{1,R_a5,R_a6,UINT64_C(-1),UINT64_C(-1)},LT,0,NA,NA,1,0x80000001,NA,NA,NA,2,1,2},
|
||||
{0xA079,INSTR_MOV,{1,R_a5,R_a6,UINT64_C(-1),1},LT,0,NA,NA,1,0x80000001,NA,NA,NA,2,1,0xFFFFFFFF80000001},
|
||||
{0xA080,INSTR_MOV,{1,R_a5,R_a6,UINT64_C(-1),UINT64_C(-5)},GE,0,NA,NA,0,0,MAX_32BIT,SHIFT_LSL,1,2,1,MAX_64BIT-1},
|
||||
{0xA081,INSTR_MOV,{1,R_a5,R_a6,5,5},GE,0,NA,NA,0,0,MAX_32BIT,SHIFT_LSL,31,2,1,0xFFFFFFFF80000000},
|
||||
{0xA082,INSTR_MOV,{1,R_a5,R_a6,UINT64_C(-1),1},GE,0,NA,NA,0,0,MAX_32BIT,SHIFT_LSL,31,2,1,2},
|
||||
{0xA083,INSTR_MOV,{1,R_a5,R_a6,4,1},LE,0,NA,NA,0,0,MAX_32BIT,SHIFT_LSL,1,2,1,2},
|
||||
{0xA084,INSTR_MOV,{1,R_a5,R_a6,UINT64_C(-1),UINT64_C(-1)},LE,0,NA,NA,1,0x80000001,NA,NA,NA,2,1,0xFFFFFFFF80000001},
|
||||
{0xA085,INSTR_MOV,{1,R_a5,R_a6,UINT64_C(-1),1},LE,0,NA,NA,0,0,MAX_32BIT,SHIFT_LSL,31,2,1,0xFFFFFFFF80000000},
|
||||
{0xA086,INSTR_MOV,{1,R_a5,R_a6,1,1},GT,0,NA,NA,1,0x80000001,NA,NA,NA,2,1,2},
|
||||
{0xA087,INSTR_MOV,{1,R_a5,R_a6,UINT64_C(-1),UINT64_C(-3)},GT,0,NA,NA,1,0x80000001,NA,NA,NA,2,1,0xFFFFFFFF80000001},
|
||||
{0xA088,INSTR_MOV,{1,R_a5,R_a6,UINT64_C(-1),0},GT,0,NA,NA,1,0x80000001,NA,NA,NA,2,1,2},
|
||||
{0xA089,INSTR_MOV,{1,R_a5,R_a6,UINT64_C(-1),UINT64_C(-1)},GT,0,NA,NA,0,0,0x80000001,0,0,2,1,2},
|
||||
{0xA090,INSTR_MOV,{1,R_a5,R_a6,6,1},GT,0,NA,NA,0,0,0x80000001,0,0,2,1,0xFFFFFFFF80000001},
|
||||
{0xA091,INSTR_MOV,{1,R_a5,R_a6,UINT64_C(-1),1},GT,0,NA,NA,0,0,0x80000001,0,0,2,1,2},
|
||||
{0xA092,INSTR_MOV,{1,R_a5,R_a6,1,1},GT,0,NA,NA,0,0,MAX_32BIT,SHIFT_LSL,1,2,1,2},
|
||||
{0xA093,INSTR_MOV,{1,R_a5,R_a6,4,1},GT,0,NA,NA,0,0,MAX_32BIT,SHIFT_LSL,1,2,1,MAX_64BIT-1},
|
||||
{0xA094,INSTR_MOV,{1,R_a5,R_a6,UINT64_C(-1),1},GT,0,NA,NA,0,0,MAX_32BIT ,SHIFT_LSL,1,2,1,2},
|
||||
{0xA095,INSTR_MOV,{1,R_a5,R_a6,1,UINT64_C(-1)},HS,0,NA,NA,1,0x80000001,NA,NA,NA,2,1,2},
|
||||
{0xA096,INSTR_MOV,{1,R_a5,R_a6,UINT64_C(-1),1},HS,0,NA,NA,1,0x80000001,NA,NA,NA,2,1,0xFFFFFFFF80000001},
|
||||
{0xA097,INSTR_MVN,{1,R_a5,R_a6,1,4},HS,0,NA,NA,1,MAX_32BIT-1,NA,NA,NA,2,1,2},
|
||||
{0xA098,INSTR_MVN,{1,R_a5,R_a6,UINT64_C(-1),1},HS,0,NA,NA,1,MAX_32BIT-1,NA,NA,NA,2,1,1},
|
||||
{0xA099,INSTR_MVN,{0,0,0,0,0},AL,0,NA,NA,1,0,NA,NA,NA,2,1,MAX_64BIT},
|
||||
{0xA100,INSTR_MVN,{0,0,0,0,0},AL,0,NA,NA,0,NA,MAX_32BIT-1,NA,0,2,1,1},
|
||||
{0xA101,INSTR_MVN,{0,0,0,0,0},AL,0,NA,NA,0,NA,0x80000001,NA,0,2,1,0x7FFFFFFE},
|
||||
{0xA102,INSTR_BIC,{0,0,0,0,0},AL,0,1,NA,1,MAX_32BIT,NA,NA,NA,NA,1,0},
|
||||
{0xA103,INSTR_BIC,{0,0,0,0,0},AL,0,1,NA,1,MAX_32BIT-1,NA,NA,NA,NA,1,1},
|
||||
{0xA104,INSTR_BIC,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT,0,0,NA,1,0},
|
||||
{0xA105,INSTR_BIC,{0,0,0,0,0},AL,0,1,NA,0,0,MAX_32BIT-1,0,0,NA,1,1},
|
||||
{0xA106,INSTR_BIC,{0,0,0,0,0},AL,0,0xF0,NA,0,0,3,SHIFT_ASR,1,NA,1,0xF0},
|
||||
{0xA107,INSTR_BIC,{0,0,0,0,0},AL,0,0xF0,NA,0,0,MAX_64BIT,SHIFT_ASR,31,NA,1,0},
|
||||
{0xA108,INSTR_SMULBB,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFABCDFFFF,0,NA,0xFFFFFFFFABCD0001,NA,NA,NA,1,0xFFFFFFFFFFFFFFFF},
|
||||
{0xA109,INSTR_SMULBB,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFABCD0001,0,NA,0xFFFFFFFFABCD0FFF,NA,NA,NA,1,0x00000FFF},
|
||||
{0xA110,INSTR_SMULBB,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFABCD0001,0,NA,0xFFFFFFFFABCDFFFF,NA,NA,NA,1,0xFFFFFFFFFFFFFFFF},
|
||||
{0xA111,INSTR_SMULBB,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFABCDFFFF,0,NA,0xFFFFFFFFABCDFFFF,NA,NA,NA,1,1},
|
||||
{0xA112,INSTR_SMULBT,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFFFFFABCD,0,NA,0xFFFFFFFFABCD0001,NA,NA,NA,1,0xFFFFFFFFFFFFFFFF},
|
||||
{0xA113,INSTR_SMULBT,{0,0,0,0,0},AL,0,NA,0x000000000001ABCD,0,NA,0xFFFFFFFFABCD0FFF,NA,NA,NA,1,0x00000FFF},
|
||||
{0xA114,INSTR_SMULBT,{0,0,0,0,0},AL,0,NA,0x000000000001ABCD,0,NA,0xFFFFFFFFABCDFFFF,NA,NA,NA,1,0xFFFFFFFFFFFFFFFF},
|
||||
{0xA115,INSTR_SMULBT,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFFFFFABCD,0,NA,0xFFFFFFFFABCDFFFF,NA,NA,NA,1,1},
|
||||
{0xA116,INSTR_SMULTB,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFABCDFFFF,0,NA,0x000000000001ABCD,NA,NA,NA,1,0xFFFFFFFFFFFFFFFF},
|
||||
{0xA117,INSTR_SMULTB,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFABCD0001,0,NA,0x000000000FFFABCD,NA,NA,NA,1,0x00000FFF},
|
||||
{0xA118,INSTR_SMULTB,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFABCD0001,0,NA,0xFFFFFFFFFFFFABCD,NA,NA,NA,1,0xFFFFFFFFFFFFFFFF},
|
||||
{0xA119,INSTR_SMULTB,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFABCDFFFF,0,NA,0xFFFFFFFFFFFFABCD,NA,NA,NA,1,1},
|
||||
{0xA120,INSTR_SMULTT,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFFFFFABCD,0,NA,0x000000000001ABCD,NA,NA,NA,1,0xFFFFFFFFFFFFFFFF},
|
||||
{0xA121,INSTR_SMULTT,{0,0,0,0,0},AL,0,NA,0x000000000001ABCD,0,NA,0x000000000FFFABCD,NA,NA,NA,1,0x00000FFF},
|
||||
{0xA122,INSTR_SMULTT,{0,0,0,0,0},AL,0,NA,0x000000000001ABCD,0,NA,0xFFFFFFFFFFFFABCD,NA,NA,NA,1,0xFFFFFFFFFFFFFFFF},
|
||||
{0xA123,INSTR_SMULTT,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFFFFFABCD,0,NA,0xFFFFFFFFFFFFABCD,NA,NA,NA,1,1},
|
||||
{0xA124,INSTR_SMULWB,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFABCDFFFF,0,NA,0x000000000001ABCD,NA,NA,NA,1,0xFFFFFFFFFFFFFFFE},
|
||||
{0xA125,INSTR_SMULWB,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFABCD0001,0,NA,0x000000000FFFABCD,NA,NA,NA,1,0x00000FFF},
|
||||
{0xA126,INSTR_SMULWB,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFABCD0001,0,NA,0xFFFFFFFFFFFFABCD,NA,NA,NA,1,0xFFFFFFFFFFFFFFFF},
|
||||
{0xA127,INSTR_SMULWB,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFABCDFFFF,0,NA,0xFFFFFFFFFFFFABCD,NA,NA,NA,1,0},
|
||||
{0xA128,INSTR_SMULWT,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFFFFFABCD,0,NA,0x000000000001ABCD,NA,NA,NA,1,0xFFFFFFFFFFFFFFFE},
|
||||
{0xA129,INSTR_SMULWT,{0,0,0,0,0},AL,0,NA,0x000000000001ABCD,0,NA,0x000000000FFFABCD,NA,NA,NA,1,0x00000FFF},
|
||||
{0xA130,INSTR_SMULWT,{0,0,0,0,0},AL,0,NA,0x000000000001ABCD,0,NA,0xFFFFFFFFFFFFABCD,NA,NA,NA,1,0xFFFFFFFFFFFFFFFF},
|
||||
{0xA131,INSTR_SMULWT,{0,0,0,0,0},AL,0,NA,0xFFFFFFFFFFFFABCD,0,NA,0xFFFFFFFFFFFFABCD,NA,NA,NA,1,0},
|
||||
{0xA132,INSTR_SMLABB,{0,0,0,0,0},AL,0,1,0xFFFFFFFFABCDFFFF,0,NA,0xFFFFFFFFABCD0001,NA,NA,NA,1,0},
|
||||
{0xA133,INSTR_SMLABB,{0,0,0,0,0},AL,0,1,0xFFFFFFFFABCD0001,0,NA,0xFFFFFFFFABCD0FFF,NA,NA,NA,1,0x00001000},
|
||||
{0xA134,INSTR_SMLABB,{0,0,0,0,0},AL,0,0xFFFFFFFFFFFFFFFF,0xFFFFFFFFABCD0001,0,NA,0xABCDFFFF,NA,NA,NA,1,0xFFFFFFFFFFFFFFFE},
|
||||
{0xA135,INSTR_SMLABB,{0,0,0,0,0},AL,0,0xFFFFFFFFFFFFFFFF,0xFFFFFFFFABCDFFFF,0,NA,0xABCDFFFF,NA,NA,NA,1,0},
|
||||
{0xA136,INSTR_UXTB16,{0,0,0,0,0},AL,0,NA,NA,0,NA,0xABCDEF01,SHIFT_ROR,0,NA,1,0x00CD0001},
|
||||
{0xA137,INSTR_UXTB16,{0,0,0,0,0},AL,0,NA,NA,0,NA,0xABCDEF01,SHIFT_ROR,1,NA,1,0x00AB00EF},
|
||||
{0xA138,INSTR_UXTB16,{0,0,0,0,0},AL,0,NA,NA,0,NA,0xABCDEF01,SHIFT_ROR,2,NA,1,0x000100CD},
|
||||
{0xA139,INSTR_UXTB16,{0,0,0,0,0},AL,0,NA,NA,0,NA,0xABCDEF01,SHIFT_ROR,3,NA,1,0x00EF00AB},
|
||||
{0xA140,INSTR_ADDR_ADD,{0,0,0,0,0},AL,0,0xCFFFFFFFF,NA,0,NA,0x1,SHIFT_LSL,1,NA,1,0xD00000001},
|
||||
{0xA141,INSTR_ADDR_ADD,{0,0,0,0,0},AL,0,0x01,NA,0,NA,0x1,SHIFT_LSL,2,NA,1,0x5},
|
||||
{0xA142,INSTR_ADDR_ADD,{0,0,0,0,0},AL,0,0xCFFFFFFFF,NA,0,NA,0x1,NA,0,NA,1,0xD00000000},
|
||||
{0xA143,INSTR_ADDR_SUB,{0,0,0,0,0},AL,0,0xD00000001,NA,0,NA,0x010000,SHIFT_LSR,15,NA,1,0xCFFFFFFFF},
|
||||
{0xA144,INSTR_ADDR_SUB,{0,0,0,0,0},AL,0,0xCFFFFFFFF,NA,0,NA,0x020000,SHIFT_LSR,15,NA,1,0xCFFFFFFFB},
|
||||
{0xA145,INSTR_ADDR_SUB,{0,0,0,0,0},AL,0,3,NA,0,NA,0x010000,SHIFT_LSR,15,NA,1,1},
|
||||
};
|
||||
|
||||
dataTransferTest_t dataTransferTests [] =
|
||||
{
|
||||
{0xB000,INSTR_LDR,AL,AL,1,24,0xABCDEF0123456789,0,REG_SCALE_OFFSET,24,NA,NA,NA,NA,NA,0x23456789,0,0,NA,NA,NA},
|
||||
{0xB001,INSTR_LDR,AL,AL,1,0,0xABCDEF0123456789,0,IMM12_OFFSET,NA,4,1,0,1,NA,0x23456789,4,0,NA,NA,NA},
|
||||
{0xB002,INSTR_LDR,AL,AL,1,0,0xABCDEF0123456789,0,NO_OFFSET,NA,NA,0,0,0,NA,0x23456789,0,0,NA,NA,NA},
|
||||
{0xB003,INSTR_LDRB,AL,AL,1,4064,0xABCDEF0123456789,0,REG_SCALE_OFFSET,4064,NA,NA,NA,NA,NA,0x89,0,0,NA,NA,NA},
|
||||
{0xB004,INSTR_LDRB,AL,AL,1,4064,0xABCDEF0123456789,4065,IMM12_OFFSET,NA,0,0,1,0,NA,0x67,4065,0,NA,NA,NA},
|
||||
{0xB005,INSTR_LDRB,AL,AL,1,4064,0xABCDEF0123456789,4065,IMM12_OFFSET,NA,1,0,1,0,NA,0x45,4065,0,NA,NA,NA},
|
||||
{0xB006,INSTR_LDRB,AL,AL,1,4064,0xABCDEF0123456789,4065,IMM12_OFFSET,NA,2,0,1,0,NA,0x23,4065,0,NA,NA,NA},
|
||||
{0xB007,INSTR_LDRB,AL,AL,1,4064,0xABCDEF0123456789,4065,IMM12_OFFSET,NA,1,1,0,1,NA,0x67,4066,0,NA,NA,NA},
|
||||
{0xB008,INSTR_LDRB,AL,AL,1,4064,0xABCDEF0123456789,0,NO_OFFSET,NA,NA,0,0,0,NA,0x89,0,0,NA,NA,NA},
|
||||
{0xB009,INSTR_LDRH,AL,AL,1,0,0xABCDEF0123456789,0,IMM8_OFFSET,NA,2,1,0,1,NA,0x6789,2,0,NA,NA,NA},
|
||||
{0xB010,INSTR_LDRH,AL,AL,1,4064,0xABCDEF0123456789,0,REG_OFFSET,4064,0,0,1,0,NA,0x6789,0,0,NA,NA,NA},
|
||||
{0xB011,INSTR_LDRH,AL,AL,1,4064,0xABCDEF0123456789,0,REG_OFFSET,4066,0,0,1,0,NA,0x2345,0,0,NA,NA,NA},
|
||||
{0xB012,INSTR_LDRH,AL,AL,1,0,0xABCDEF0123456789,0,NO_OFFSET,NA,0,0,0,0,NA,0x6789,0,0,NA,NA,NA},
|
||||
{0xB013,INSTR_LDRH,AL,AL,1,0,0xABCDEF0123456789,2,NO_OFFSET,NA,0,0,0,0,NA,0x2345,2,0,NA,NA,NA},
|
||||
{0xB014,INSTR_STR,AL,AL,1,2,0xDEADBEEFDEADBEEF,4,IMM12_OFFSET,NA,4,1,0,1,0xABCDEF0123456789,0xABCDEF0123456789,8,1,2,8,0xDEAD23456789BEEF},
|
||||
{0xB015,INSTR_STR,AL,AL,1,2,0xDEADBEEFDEADBEEF,4,NO_OFFSET,NA,NA,0,0,0,0xABCDEF0123456789,0xABCDEF0123456789,4,1,2,8,0xDEAD23456789BEEF},
|
||||
{0xB016,INSTR_STRB,AL,AL,1,0,0xDEADBEEFDEADBEEF,1,IMM12_OFFSET,NA,0,0,1,0,0xABCDEF0123456789,0xABCDEF0123456789,1,1,0,8,0xDEADBEEFDEAD89EF},
|
||||
{0xB017,INSTR_STRB,AL,AL,1,0,0xDEADBEEFDEADBEEF,1,IMM12_OFFSET,NA,1,0,1,0,0xABCDEF0123456789,0xABCDEF0123456789,1,1,0,8,0xDEADBEEFDE89BEEF},
|
||||
{0xB018,INSTR_STRB,AL,AL,1,0,0xDEADBEEFDEADBEEF,1,IMM12_OFFSET,NA,2,0,1,0,0xABCDEF0123456789,0xABCDEF0123456789,1,1,0,8,0xDEADBEEF89ADBEEF},
|
||||
{0xB019,INSTR_STRB,AL,AL,1,0,0xDEADBEEFDEADBEEF,1,IMM12_OFFSET,NA,4,1,0,1,0xABCDEF0123456789,0xABCDEF0123456789,5,1,0,8,0xDEADBEEFDEAD89EF},
|
||||
{0xB020,INSTR_STRB,AL,AL,1,0,0xDEADBEEFDEADBEEF,1,NO_OFFSET,NA,NA,0,0,0,0xABCDEF0123456789,0xABCDEF0123456789,1,1,0,8,0xDEADBEEFDEAD89EF},
|
||||
{0xB021,INSTR_STRH,AL,AL,1,4066,0xDEADBEEFDEADBEEF,4070,IMM8_OFFSET,NA,2,1,0,1,0xABCDEF0123456789,0xABCDEF0123456789,4072,1,4066,8,0xDEAD6789DEADBEEF},
|
||||
{0xB022,INSTR_STRH,AL,AL,1,4066,0xDEADBEEFDEADBEEF,4070,NO_OFFSET,NA,NA,0,0,0,0xABCDEF0123456789,0xABCDEF0123456789,4070,1,4066,8,0xDEAD6789DEADBEEF},
|
||||
};
|
||||
|
||||
|
||||
void flushcache()
|
||||
{
|
||||
const long base = long(instrMem);
|
||||
const long curr = base + long(instrMemSize);
|
||||
__builtin___clear_cache((char*)base, (char*)curr);
|
||||
}
|
||||
|
||||
void dataOpTest(dataOpTest_t test, ArmToMips64Assembler *a64asm, uint32_t Rd = R_v1,
|
||||
uint32_t Rn = R_t0, uint32_t Rm = R_t1, uint32_t Rs = R_t2)
|
||||
{
|
||||
int64_t regs[NUM_REGS] = {0};
|
||||
int32_t flags[NUM_FLAGS] = {0};
|
||||
int64_t savedRegs[NUM_REGS] = {0};
|
||||
uint32_t i;
|
||||
uint32_t op2;
|
||||
|
||||
for(i = 0; i < NUM_REGS; ++i)
|
||||
{
|
||||
regs[i] = i;
|
||||
}
|
||||
|
||||
regs[Rd] = test.RdValue;
|
||||
regs[Rn] = test.RnValue;
|
||||
regs[Rs] = test.RsValue;
|
||||
a64asm->reset();
|
||||
if (test.preCond.mode) {
|
||||
a64asm->set_condition(test.preCond.mode, test.preCond.Rcond1, test.preCond.Rcond2);
|
||||
regs[test.preCond.Rcond1] = test.preCond.Rcond1Value;
|
||||
regs[test.preCond.Rcond2] = test.preCond.Rcond2Value;
|
||||
}
|
||||
a64asm->prolog();
|
||||
if(test.immediate == true)
|
||||
{
|
||||
op2 = a64asm->imm(test.immValue);
|
||||
}
|
||||
else if(test.immediate == false && test.shiftAmount == 0)
|
||||
{
|
||||
op2 = Rm;
|
||||
regs[Rm] = (int64_t)((int32_t)(test.RmValue));
|
||||
}
|
||||
else
|
||||
{
|
||||
op2 = a64asm->reg_imm(Rm, test.shiftMode, test.shiftAmount);
|
||||
regs[Rm] = (int64_t)((int32_t)(test.RmValue));
|
||||
}
|
||||
switch(test.op)
|
||||
{
|
||||
case INSTR_ADD: a64asm->ADD(test.cond, test.setFlags, Rd,Rn,op2); break;
|
||||
case INSTR_SUB: a64asm->SUB(test.cond, test.setFlags, Rd,Rn,op2); break;
|
||||
case INSTR_RSB: a64asm->RSB(test.cond, test.setFlags, Rd,Rn,op2); break;
|
||||
case INSTR_AND: a64asm->AND(test.cond, test.setFlags, Rd,Rn,op2); break;
|
||||
case INSTR_ORR: a64asm->ORR(test.cond, test.setFlags, Rd,Rn,op2); break;
|
||||
case INSTR_BIC: a64asm->BIC(test.cond, test.setFlags, Rd,Rn,op2); break;
|
||||
case INSTR_MUL: a64asm->MUL(test.cond, test.setFlags, Rd,Rm,Rs); break;
|
||||
case INSTR_MLA: a64asm->MLA(test.cond, test.setFlags, Rd,Rm,Rs,Rn); break;
|
||||
case INSTR_CMP: a64asm->CMP(test.cond, Rn,op2); break;
|
||||
case INSTR_MOV: a64asm->MOV(test.cond, test.setFlags,Rd,op2); break;
|
||||
case INSTR_MVN: a64asm->MVN(test.cond, test.setFlags,Rd,op2); break;
|
||||
case INSTR_SMULBB:a64asm->SMULBB(test.cond, Rd,Rm,Rs); break;
|
||||
case INSTR_SMULBT:a64asm->SMULBT(test.cond, Rd,Rm,Rs); break;
|
||||
case INSTR_SMULTB:a64asm->SMULTB(test.cond, Rd,Rm,Rs); break;
|
||||
case INSTR_SMULTT:a64asm->SMULTT(test.cond, Rd,Rm,Rs); break;
|
||||
case INSTR_SMULWB:a64asm->SMULWB(test.cond, Rd,Rm,Rs); break;
|
||||
case INSTR_SMULWT:a64asm->SMULWT(test.cond, Rd,Rm,Rs); break;
|
||||
case INSTR_SMLABB:a64asm->SMLABB(test.cond, Rd,Rm,Rs,Rn); break;
|
||||
case INSTR_UXTB16:a64asm->UXTB16(test.cond, Rd,Rm,test.shiftAmount); break;
|
||||
case INSTR_ADDR_ADD: a64asm->ADDR_ADD(test.cond, test.setFlags, Rd,Rn,op2); break;
|
||||
case INSTR_ADDR_SUB: a64asm->ADDR_SUB(test.cond, test.setFlags, Rd,Rn,op2); break;
|
||||
default: printf("Error"); return;
|
||||
}
|
||||
a64asm->epilog(0);
|
||||
a64asm->fix_branches();
|
||||
flushcache();
|
||||
|
||||
asm_function_t asm_function = (asm_function_t)(instrMem);
|
||||
|
||||
for(i = 0; i < NUM_REGS; ++i)
|
||||
savedRegs[i] = regs[i];
|
||||
|
||||
asm_mips_test_jacket(asm_function, regs, flags);
|
||||
|
||||
/* Check if all regs except Rd is same */
|
||||
for(i = 0; i < NUM_REGS; ++i)
|
||||
{
|
||||
if((i == Rd) || i == 2) continue;
|
||||
if(regs[i] != savedRegs[i])
|
||||
{
|
||||
printf("Test %x failed Reg(%d) tampered Expected(0x%" PRIx64 "),"
|
||||
"Actual(0x%" PRIx64 ") t\n", test.id, i, savedRegs[i],
|
||||
regs[i]);
|
||||
exit(0);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
if(test.checkRd == 1 && regs[Rd] != test.postRdValue)
|
||||
{
|
||||
printf("Test %x failed, Expected(%" PRIx64 "), Actual(%" PRIx64 ")\n",
|
||||
test.id, test.postRdValue, regs[Rd]);
|
||||
exit(0);
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("Test %x passed\n", test.id);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void dataTransferTest(dataTransferTest_t test, ARMAssemblerInterface *a64asm,
|
||||
uint32_t Rd = R_v1, uint32_t Rn = R_t0,uint32_t Rm = R_t1)
|
||||
{
|
||||
int64_t regs[NUM_REGS] = {0};
|
||||
int64_t savedRegs[NUM_REGS] = {0};
|
||||
int32_t flags[NUM_FLAGS] = {0};
|
||||
uint32_t i;
|
||||
for(i = 0; i < NUM_REGS; ++i)
|
||||
{
|
||||
regs[i] = i;
|
||||
}
|
||||
|
||||
uint32_t op2;
|
||||
|
||||
regs[Rd] = test.RdValue;
|
||||
regs[Rn] = (uint64_t)(&dataMem[test.RnValue]);
|
||||
regs[Rm] = test.RmValue;
|
||||
flags[test.preFlag] = 1;
|
||||
|
||||
if(test.setMem == true)
|
||||
{
|
||||
unsigned char *mem = (unsigned char *)&dataMem[test.memOffset];
|
||||
uint64_t value = test.memValue;
|
||||
for(int j = 0; j < 8; ++j)
|
||||
{
|
||||
mem[j] = value & 0x00FF;
|
||||
value >>= 8;
|
||||
}
|
||||
}
|
||||
a64asm->reset();
|
||||
a64asm->prolog();
|
||||
if(test.offsetType == REG_SCALE_OFFSET)
|
||||
{
|
||||
op2 = a64asm->reg_scale_pre(Rm);
|
||||
}
|
||||
else if(test.offsetType == REG_OFFSET)
|
||||
{
|
||||
op2 = a64asm->reg_pre(Rm);
|
||||
}
|
||||
else if(test.offsetType == IMM12_OFFSET && test.preIndex == true)
|
||||
{
|
||||
op2 = a64asm->immed12_pre(test.immValue, test.writeBack);
|
||||
}
|
||||
else if(test.offsetType == IMM12_OFFSET && test.postIndex == true)
|
||||
{
|
||||
op2 = a64asm->immed12_post(test.immValue);
|
||||
}
|
||||
else if(test.offsetType == IMM8_OFFSET && test.preIndex == true)
|
||||
{
|
||||
op2 = a64asm->immed8_pre(test.immValue, test.writeBack);
|
||||
}
|
||||
else if(test.offsetType == IMM8_OFFSET && test.postIndex == true)
|
||||
{
|
||||
op2 = a64asm->immed8_post(test.immValue);
|
||||
}
|
||||
else if(test.offsetType == NO_OFFSET)
|
||||
{
|
||||
op2 = a64asm->__immed12_pre(0);
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("Error - Unknown offset\n"); return;
|
||||
}
|
||||
|
||||
switch(test.op)
|
||||
{
|
||||
case INSTR_LDR: a64asm->LDR(test.cond, Rd,Rn,op2); break;
|
||||
case INSTR_LDRB: a64asm->LDRB(test.cond, Rd,Rn,op2); break;
|
||||
case INSTR_LDRH: a64asm->LDRH(test.cond, Rd,Rn,op2); break;
|
||||
case INSTR_ADDR_LDR: a64asm->ADDR_LDR(test.cond, Rd,Rn,op2); break;
|
||||
case INSTR_STR: a64asm->STR(test.cond, Rd,Rn,op2); break;
|
||||
case INSTR_STRB: a64asm->STRB(test.cond, Rd,Rn,op2); break;
|
||||
case INSTR_STRH: a64asm->STRH(test.cond, Rd,Rn,op2); break;
|
||||
case INSTR_ADDR_STR: a64asm->ADDR_STR(test.cond, Rd,Rn,op2); break;
|
||||
default: printf("Error"); return;
|
||||
}
|
||||
a64asm->epilog(0);
|
||||
flushcache();
|
||||
|
||||
asm_function_t asm_function = (asm_function_t)(instrMem);
|
||||
|
||||
for(i = 0; i < NUM_REGS; ++i)
|
||||
savedRegs[i] = regs[i];
|
||||
|
||||
asm_mips_test_jacket(asm_function, regs, flags);
|
||||
|
||||
/* Check if all regs except Rd/Rn are same */
|
||||
for(i = 0; i < NUM_REGS; ++i)
|
||||
{
|
||||
if(i == Rd || i == Rn || i == R_v0) continue;
|
||||
|
||||
if(regs[i] != savedRegs[i])
|
||||
{
|
||||
printf("Test %x failed Reg(%d) tampered"
|
||||
" Expected(0x%" PRIx64 "), Actual(0x%" PRIx64 ") t\n",
|
||||
test.id, i, savedRegs[i], regs[i]);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
if((uint64_t)regs[Rd] != test.postRdValue)
|
||||
{
|
||||
printf("Test %x failed, "
|
||||
"Expected in Rd(0x%" PRIx64 "), Actual(0x%" PRIx64 ")\n",
|
||||
test.id, test.postRdValue, regs[Rd]);
|
||||
}
|
||||
else if((uint64_t)regs[Rn] != (uint64_t)(&dataMem[test.postRnValue]))
|
||||
{
|
||||
printf("Test %x failed, "
|
||||
"Expected in Rn(0x%" PRIx64 "), Actual(0x%" PRIx64 ")\n",
|
||||
test.id, test.postRnValue, regs[Rn] - (uint64_t)dataMem);
|
||||
}
|
||||
else if(test.checkMem == true)
|
||||
{
|
||||
unsigned char *addr = (unsigned char *)&dataMem[test.postMemOffset];
|
||||
uint64_t value;
|
||||
value = 0;
|
||||
for(uint32_t j = 0; j < test.postMemLength; ++j)
|
||||
value = (value << 8) | addr[test.postMemLength-j-1];
|
||||
if(value != test.postMemValue)
|
||||
{
|
||||
printf("Test %x failed, "
|
||||
"Expected in Mem(0x%" PRIx64 "), Actual(0x%" PRIx64 ")\n",
|
||||
test.id, test.postMemValue, value);
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("Test %x passed\n", test.id);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("Test %x passed\n", test.id);
|
||||
}
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
uint32_t i;
|
||||
|
||||
/* Allocate memory to store instructions generated by ArmToArm64Assembler */
|
||||
{
|
||||
int fd = ashmem_create_region("code cache", instrMemSize);
|
||||
if(fd < 0) {
|
||||
printf("IF < 0\n");
|
||||
printf("Creating code cache, ashmem_create_region "
|
||||
"failed with error '%s'", strerror(errno));
|
||||
}
|
||||
instrMem = mmap(NULL, instrMemSize,
|
||||
PROT_READ | PROT_WRITE | PROT_EXEC,
|
||||
MAP_PRIVATE, fd, 0);
|
||||
}
|
||||
|
||||
ArmToMips64Assembler a64asm(instrMem);
|
||||
|
||||
if(TESTS_DATAOP_ENABLE)
|
||||
{
|
||||
printf("Running data processing tests\n");
|
||||
for(i = 0; i < sizeof(dataOpTests)/sizeof(dataOpTest_t); ++i) {
|
||||
dataOpTest(dataOpTests[i], &a64asm);
|
||||
}
|
||||
}
|
||||
|
||||
if(TESTS_DATATRANSFER_ENABLE)
|
||||
{
|
||||
printf("Running data transfer tests\n");
|
||||
for(i = 0; i < sizeof(dataTransferTests)/sizeof(dataTransferTest_t); ++i)
|
||||
dataTransferTest(dataTransferTests[i], &a64asm);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
cc_test {
|
||||
name: "test-pixelflinger-mips64-col32cb16blend",
|
||||
defaults: ["pixelflinger-tests-mips64"],
|
||||
|
||||
srcs: ["col32cb16blend_test.c"],
|
||||
}
|
||||
|
|
@ -1,125 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2015 The Android Open Source Project
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <assert.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <inttypes.h>
|
||||
|
||||
|
||||
#define ARGB_8888_MAX 0xFFFFFFFF
|
||||
#define ARGB_8888_MIN 0x00000000
|
||||
#define RGB_565_MAX 0xFFFF
|
||||
#define RGB_565_MIN 0x0000
|
||||
|
||||
struct test_t
|
||||
{
|
||||
char name[256];
|
||||
uint32_t src_color;
|
||||
uint16_t dst_color;
|
||||
size_t count;
|
||||
};
|
||||
|
||||
struct test_t tests[] =
|
||||
{
|
||||
{"Count 1, Src=Max, Dst=Min", ARGB_8888_MAX, RGB_565_MIN, 1},
|
||||
{"Count 2, Src=Min, Dst=Max", ARGB_8888_MIN, RGB_565_MAX, 2},
|
||||
{"Count 3, Src=Max, Dst=Max", ARGB_8888_MAX, RGB_565_MAX, 3},
|
||||
{"Count 4, Src=Min, Dst=Min", ARGB_8888_MAX, RGB_565_MAX, 4},
|
||||
{"Count 1, Src=Rand, Dst=Rand", 0x12345678, 0x9ABC, 1},
|
||||
{"Count 2, Src=Rand, Dst=Rand", 0xABCDEF12, 0x2345, 2},
|
||||
{"Count 3, Src=Rand, Dst=Rand", 0x11111111, 0xEDFE, 3},
|
||||
{"Count 4, Src=Rand, Dst=Rand", 0x12345678, 0x9ABC, 4},
|
||||
{"Count 5, Src=Rand, Dst=Rand", 0xEFEFFEFE, 0xFACC, 5},
|
||||
{"Count 10, Src=Rand, Dst=Rand", 0x12345678, 0x9ABC, 10}
|
||||
};
|
||||
|
||||
void scanline_col32cb16blend_mips64(uint16_t *dst, uint32_t src, size_t count);
|
||||
void scanline_col32cb16blend_c(uint16_t * dst, uint32_t src, size_t count)
|
||||
{
|
||||
uint32_t srcAlpha = (src>>24);
|
||||
uint32_t f = 0x100 - (srcAlpha + (srcAlpha>>7));
|
||||
|
||||
while (count--)
|
||||
{
|
||||
uint16_t d = *dst;
|
||||
int dstR = (d>>11)&0x1f;
|
||||
int dstG = (d>>5)&0x3f;
|
||||
int dstB = (d)&0x1f;
|
||||
int srcR = (src >> ( 3))&0x1F;
|
||||
int srcG = (src >> ( 8+2))&0x3F;
|
||||
int srcB = (src >> (16+3))&0x1F;
|
||||
srcR += (f*dstR)>>8;
|
||||
srcG += (f*dstG)>>8;
|
||||
srcB += (f*dstB)>>8;
|
||||
*dst++ = (uint16_t)((srcR<<11)|(srcG<<5)|srcB);
|
||||
}
|
||||
}
|
||||
|
||||
void scanline_col32cb16blend_test()
|
||||
{
|
||||
uint16_t dst_c[16], dst_asm[16];
|
||||
uint32_t i, j;
|
||||
|
||||
for(i = 0; i < sizeof(tests)/sizeof(struct test_t); ++i)
|
||||
{
|
||||
struct test_t test = tests[i];
|
||||
|
||||
printf("Testing - %s:",test.name);
|
||||
|
||||
memset(dst_c, 0, sizeof(dst_c));
|
||||
memset(dst_asm, 0, sizeof(dst_asm));
|
||||
|
||||
for(j = 0; j < test.count; ++j)
|
||||
{
|
||||
dst_c[j] = test.dst_color;
|
||||
dst_asm[j] = test.dst_color;
|
||||
}
|
||||
|
||||
|
||||
scanline_col32cb16blend_c(dst_c, test.src_color, test.count);
|
||||
scanline_col32cb16blend_mips64(dst_asm, test.src_color, test.count);
|
||||
|
||||
if(memcmp(dst_c, dst_asm, sizeof(dst_c)) == 0)
|
||||
printf("Passed\n");
|
||||
else
|
||||
printf("Failed\n");
|
||||
|
||||
for(j = 0; j < test.count; ++j)
|
||||
{
|
||||
printf("dst_c[%d] = %x, dst_asm[%d] = %x \n", j, dst_c[j], j, dst_asm[j]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int main()
|
||||
{
|
||||
scanline_col32cb16blend_test();
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1,6 +0,0 @@
|
|||
cc_test {
|
||||
name: "test-pixelflinger-mips64-disassembler-test",
|
||||
defaults: ["pixelflinger-tests-mips64"],
|
||||
|
||||
srcs: ["mips64_disassembler_test.cpp"],
|
||||
}
|
||||
|
|
@ -1,218 +0,0 @@
|
|||
/*
|
||||
* Copyright (C) 2015 The Android Open Source Project
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include <inttypes.h>
|
||||
#include <string.h>
|
||||
#include "../../../codeflinger/mips64_disassem.h"
|
||||
|
||||
//typedef uint64_t db_addr_t;
|
||||
//db_addr_t mips_disassem(db_addr_t loc, char *di_buffer, int alt_format);
|
||||
|
||||
struct test_table_entry_t
|
||||
{
|
||||
uint32_t code;
|
||||
const char *instr;
|
||||
};
|
||||
|
||||
static test_table_entry_t test_table [] =
|
||||
{
|
||||
{ 0x00011020, "add\tv0,zero,at" },
|
||||
{ 0x00832820, "add\ta1,a0,v1" },
|
||||
{ 0x00c74020, "add\ta4,a2,a3" },
|
||||
{ 0x012a5820, "add\ta7,a5,a6" },
|
||||
{ 0x258dffff, "addiu\tt1,t0,-1" },
|
||||
{ 0x25cf0004, "addiu\tt3,t2,4" },
|
||||
{ 0x02119021, "addu\ts2,s0,s1" },
|
||||
{ 0x0274a821, "addu\ts5,s3,s4" },
|
||||
{ 0x02d7c024, "and\tt8,s6,s7" },
|
||||
{ 0x333aff00, "andi\tk0,t9,0xff00" },
|
||||
{ 0x3f7cffff, "aui\tgp,k1,-1" },
|
||||
{ 0x3c1dffff, "lui\tsp,0xffff" },
|
||||
{ 0x00e04051, "clo\ta4,a3" },
|
||||
{ 0x01205050, "clz\ta6,a5" },
|
||||
{ 0x016c682c, "dadd\tt1,a7,t0" },
|
||||
{ 0x65cf0008, "daddiu\tt3,t2,8" },
|
||||
{ 0x0211902d, "daddu\ts2,s0,s1" },
|
||||
{ 0x7e741403, "dext\ts4,s3,16,3" },
|
||||
{ 0x7eb6f801, "dextm\ts6,s5,0,64" },
|
||||
{ 0x7ef87c02, "dextu\tt8,s7,48,16" },
|
||||
{ 0x7f3a8207, "dins\tk0,t9,8,9" },
|
||||
{ 0x7f7c0005, "dinsm\tgp,k1,0,33" },
|
||||
{ 0x7fbe0806, "dinsu\ts8,sp,32,2" },
|
||||
{ 0x03e1102e, "dsub\tv0,ra,at" },
|
||||
{ 0x0064282f, "dsubu\ta1,v1,a0" },
|
||||
{ 0x7cc77a00, "ext\ta3,a2,8,16" },
|
||||
{ 0x7d09fc04, "ins\ta5,a4,16,16" },
|
||||
{ 0x00200009, "jr\tat" },
|
||||
{ 0x00201009, "jalr\tv0,at" },
|
||||
{ 0x0020f809, "jalr\tat" },
|
||||
{ 0x8082fff0, "lb\tv0,-16(a0)" },
|
||||
{ 0x916c0008, "lbu\tt0,8(a7)" },
|
||||
{ 0xdfa3ffe8, "ld\tv1,-24(sp)" },
|
||||
{ 0x84850080, "lh\ta1,128(a0)" },
|
||||
{ 0x94c7ff80, "lhu\ta3,-128(a2)" },
|
||||
{ 0x8d09000c, "lw\ta5,12(a4)" },
|
||||
{ 0x9d4bfff4, "lwu\ta7,-12(a6)" },
|
||||
{ 0x00620898, "mul\tat,v1,v0" },
|
||||
{ 0x006208d8, "muh\tat,v1,v0" },
|
||||
{ 0x00620899, "mulu\tat,v1,v0" },
|
||||
{ 0x006208d9, "muhu\tat,v1,v0" },
|
||||
{ 0x00000000, "nop" },
|
||||
{ 0x02329827, "nor\ts3,s1,s2" },
|
||||
{ 0x0295b025, "or\ts6,s4,s5" },
|
||||
{ 0x36f0ff00, "ori\ts0,s7,0xff00" },
|
||||
{ 0x7c03103b, "rdhwr\tv0,v1" },
|
||||
{ 0x00242a02, "rotr\ta1,a0,8" },
|
||||
{ 0x00c74046, "rotrv\ta4,a3,a2" },
|
||||
{ 0xa12afff0, "sb\ta6,-16(a5)" },
|
||||
{ 0xfd6c0100, "sd\tt0,256(a7)" },
|
||||
{ 0x7c0d7420, "seb\tt2,t1" },
|
||||
{ 0x7c0f8620, "seh\ts0,t3" },
|
||||
{ 0x02329835, "seleqz\ts3,s1,s2" },
|
||||
{ 0x0295b037, "selnez\ts6,s4,s5" },
|
||||
{ 0xa6f84000, "sh\tt8,16384(s7)" },
|
||||
{ 0x0019d100, "sll\tk0,t9,4" },
|
||||
{ 0x037ce804, "sllv\tsp,gp,k1" },
|
||||
{ 0x03df082a, "slt\tat,s8,ra" },
|
||||
{ 0x28430007, "slti\tv1,v0,7" },
|
||||
{ 0x2c850020, "sltiu\ta1,a0,32" },
|
||||
{ 0x00c7402b, "sltu\ta4,a2,a3" },
|
||||
{ 0x00095103, "sra\ta6,a5,4" },
|
||||
{ 0x016c6807, "srav\tt1,t0,a7" },
|
||||
{ 0x000e7a02, "srl\tt3,t2,8" },
|
||||
{ 0x02119006, "srlv\ts2,s1,s0" },
|
||||
{ 0x0274a822, "sub\ts5,s3,s4" },
|
||||
{ 0x02d7c023, "subu\tt8,s6,s7" },
|
||||
{ 0xaf3afffc, "sw\tk0,-4(t9)" },
|
||||
{ 0x7c1be0a0, "wsbh\tgp,k1" },
|
||||
{ 0x03bef826, "xor\tra,sp,s8" },
|
||||
{ 0x3801ffff, "li\tat,0xffff" },
|
||||
{ 0x3843ffff, "xori\tv1,v0,0xffff" },
|
||||
};
|
||||
|
||||
struct test_branches_table_entry_t
|
||||
{
|
||||
uint32_t code;
|
||||
const char *instr;
|
||||
int16_t offset;
|
||||
};
|
||||
|
||||
static test_branches_table_entry_t test_branches_table [] = {
|
||||
{ 0x1000ffff, "b\t", static_cast<int16_t>(0xffff) },
|
||||
{ 0x13df0008, "beq\ts8,ra,", 0x8 },
|
||||
{ 0x042100ff, "bgez\tat,", 0xff },
|
||||
{ 0x1c40ff00, "bgtz\tv0,", static_cast<int16_t>(0xff00) },
|
||||
{ 0x18605555, "blez\tv1,", 0x5555 },
|
||||
{ 0x0480aaaa, "bltz\ta0,", static_cast<int16_t>(0xaaaa) },
|
||||
{ 0x14a68888, "bne\ta1,a2,", static_cast<int16_t>(0x8888) },
|
||||
};
|
||||
|
||||
struct test_jump_table_entry_t
|
||||
{
|
||||
uint32_t code;
|
||||
const char *instr;
|
||||
int32_t offset;
|
||||
};
|
||||
|
||||
static test_jump_table_entry_t test_jump_table [] = {
|
||||
{ 0x0956ae66, "j\t", 0x156ae66 },
|
||||
{ 0x0d56ae66, "jal\t", 0x156ae66 },
|
||||
};
|
||||
|
||||
int main()
|
||||
{
|
||||
char instr[256];
|
||||
uint32_t failed = 0;
|
||||
|
||||
for(uint32_t i = 0; i < sizeof(test_table)/sizeof(test_table_entry_t); ++i)
|
||||
{
|
||||
test_table_entry_t *test;
|
||||
test = &test_table[i];
|
||||
mips_disassem(&test->code, instr, 0);
|
||||
if(strcmp(instr, test->instr) != 0)
|
||||
{
|
||||
printf("Test Failed \n"
|
||||
"Code : 0x%0x\n"
|
||||
"Expected : %s\n"
|
||||
"Actual : %s\n", test->code, test->instr, instr);
|
||||
failed++;
|
||||
}
|
||||
}
|
||||
for(uint32_t i = 0; i < sizeof(test_branches_table)/sizeof(test_branches_table_entry_t); ++i)
|
||||
{
|
||||
test_branches_table_entry_t *test;
|
||||
test = &test_branches_table[i];
|
||||
mips_disassem(&test->code, instr, 0);
|
||||
//printf("DBG code address: %lx\n", (uint64_t)(&test->code));
|
||||
uint64_t loc = (uint64_t)test + 4 + (test->offset << 2);
|
||||
//printf("DBG loc: %lx\n", loc);
|
||||
char temp[256], address[16];
|
||||
strcpy(temp, test->instr);
|
||||
sprintf(address, "0x%lx", loc);
|
||||
strcat(temp, address);
|
||||
if(strcmp(instr, temp) != 0)
|
||||
{
|
||||
printf("Test Failed \n"
|
||||
"Code : 0x%0x\n"
|
||||
"Expected : %s\n"
|
||||
"Actual : %s\n", test->code, temp, instr);
|
||||
failed++;
|
||||
}
|
||||
}
|
||||
for(uint32_t i = 0; i < sizeof(test_jump_table)/sizeof(test_jump_table_entry_t); ++i)
|
||||
{
|
||||
test_jump_table_entry_t *test;
|
||||
test = &test_jump_table[i];
|
||||
mips_disassem(&test->code, instr, 0);
|
||||
//printf("DBG code address: %lx\n", (uint64_t)(&test->code));
|
||||
uint64_t loc = ((uint64_t)test & 0xfffffffff0000000) | (test->offset << 2);
|
||||
//printf("DBG loc: %lx\n", loc);
|
||||
char temp[256], address[16];
|
||||
strcpy(temp, test->instr);
|
||||
sprintf(address, "0x%08lx", loc);
|
||||
strcat(temp, address);
|
||||
if(strcmp(instr, temp) != 0)
|
||||
{
|
||||
printf("Test Failed \n"
|
||||
"Code : 0x%0x\n"
|
||||
"Expected : '%s'\n"
|
||||
"Actual : '%s'\n", test->code, temp, instr);
|
||||
failed++;
|
||||
}
|
||||
}
|
||||
if(failed == 0)
|
||||
{
|
||||
printf("All tests PASSED\n");
|
||||
return 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
printf("%d tests FAILED\n", failed);
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
Loading…
Reference in a new issue