Merge "riscv64: increase ASLR randomness for Sv48/57" into main

This commit is contained in:
Sami Tolvanen 2024-05-22 15:31:05 +00:00 committed by Gerrit Code Review
commit f53c4a9d20

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@ -114,10 +114,9 @@ Result<void> SetMmapRndBitsAction(const BuiltinArguments&) {
return {};
}
#elif defined(__riscv)
// TODO: sv48 and sv57 have both been added to the kernel, but the kernel
// still doesn't support more than 24 bits.
// https://github.com/google/android-riscv64/issues/1
if (SetMmapRndBitsMin(24, 24, false)) {
// riscv64 supports 24 rnd bits with Sv39, and starting with the 6.9 kernel,
// 33 bits with Sv48 and Sv57.
if (SetMmapRndBitsMin(33, 24, false)) {
return {};
}
#elif defined(__x86_64__)