Merge "riscv64: increase ASLR randomness for Sv48/57" into main
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commit
f53c4a9d20
1 changed files with 3 additions and 4 deletions
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@ -114,10 +114,9 @@ Result<void> SetMmapRndBitsAction(const BuiltinArguments&) {
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return {};
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}
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#elif defined(__riscv)
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// TODO: sv48 and sv57 have both been added to the kernel, but the kernel
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// still doesn't support more than 24 bits.
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// https://github.com/google/android-riscv64/issues/1
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if (SetMmapRndBitsMin(24, 24, false)) {
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// riscv64 supports 24 rnd bits with Sv39, and starting with the 6.9 kernel,
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// 33 bits with Sv48 and Sv57.
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if (SetMmapRndBitsMin(33, 24, false)) {
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return {};
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}
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#elif defined(__x86_64__)
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