Commit graph

6 commits

Author SHA1 Message Date
Ryan Prichard
82a0841468 DO NOT MERGE - x86: Switch get_pc_thunk to comdat
Switch the __x86.get_pc_thunk.bx functions from .gnu.linkonce to comdat
section groups. lld doesn't implement .gnu.linkonce and will instead
discard the input sections. It might produce a faulty binary that has
no get_pc_thunk function in it, which would crash.

Normally, these functions are generated by GCC and are present in many
object files compiled with PIC. Clang doesn't use them, and instead
initializes the PIC base register with a "call 1f; 1: pop %ebx" pair.

I also added cfi_startproc / cfi_endproc to be consistent with current
GCC output.

I marked this CL with do-not-merge because the code it touches has been
removed in the next release, so it won't merge. I reviewed the
automerger graph, and this do-not-merge CL:
 - will be applied to qt-qpr1-dev-plus-aosp (which needs the CL)
 - won't be applied to rvc-dev-plus-aosp (which doesn't need the CL)

https://android-build.googleplex.com/builds/automerger/graph/project/googleplex-android/platform/system/core

Bug: http://b/154376560
Bug: https://bugs.llvm.org/show_bug.cgi?id=45594
Test: VM boots
Change-Id: I681c4c46503aff65f32a22c9da15397a42b67183
2020-04-18 14:07:19 -07:00
Varvara Rainchik
458d1253f5 Clean up memset[16,32] routines: unify files names, remove redundant wrapper
for 32-bit, remove Atom caches sizes for 64-bit, fix license.

Change-Id: Ieda6367d7b21cf25b2beda6dd8d77cf668d3f2af
Signed-off-by: Varvara Rainchik <varvara.rainchik@intel.com>
2014-09-17 18:11:18 +04:00
Henrik Smiding
c27a444e54 Add Silvermont architecture cache sizes
Adds Silvermont specific cache sizes for memset16/32 SSE optimization.

Change-Id: Ib5ea086d57544e74ac384ee1ef516b8511392f70
Signed-off-by: Henrik Smiding <henrik.smiding@intel.com>
2014-04-18 11:31:54 +08:00
Pavel Chupin
9ff8767bc6 Eliminate text relocations in x86 optimized memset versions
Change-Id: Ieb72af8cf7f93210a68a87b1e2538deb5642f4d5
Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
2013-10-24 21:42:30 +04:00
Pavel Chupin
4aa51cd468 Cleanup x86 flags and memset versions
ARCH_X86_HAVE_SSE2 is always true

Change-Id: I680493d14280aafad5448aec727e8d9a84a6db00
Signed-off-by: Pavel Chupin <pavel.v.chupin@intel.com>
2013-10-10 20:20:16 +04:00
Lu, Hongjiu
bb12ac9b85 Assembly coded android_memset16 and android_memset32
Change-Id: Ife2dd406e1dcb962e5e97788c515ac96f5c52e44
2011-01-07 11:26:34 -08:00