f0c82e7bad
The function StepIfSignalHandler assumed that the rel_pc passed to it was actually an elf offset. A new version of clang created a libc.so that has a load bias, so tests unwinding through a signal handler would fail on arm. On other ABIs, there is unwind information that could be used instead, so the unwind still worked. The fix is to subtract the load bias from the rel_pc to get an elf offset to pass to the Register StepIfSignalHandler functions. Change all of the Register funtions to make it clear what the first parameter means. Add a unit test for this new code. Also, add an offline test for this case. Bug: 145683525 Test: Ran unit tests using the new clang and the old clang. Change-Id: I3e249653b79bcad6d3a56411a7911fde4888e9d6
168 lines
4.9 KiB
C++
168 lines
4.9 KiB
C++
/*
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* Copyright (C) 2017 The Android Open Source Project
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <stdint.h>
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#include <string.h>
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#include <functional>
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#include <unwindstack/Elf.h>
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#include <unwindstack/MachineMips64.h>
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#include <unwindstack/MapInfo.h>
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#include <unwindstack/Memory.h>
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#include <unwindstack/RegsMips64.h>
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#include <unwindstack/UcontextMips64.h>
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#include <unwindstack/UserMips64.h>
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namespace unwindstack {
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RegsMips64::RegsMips64()
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: RegsImpl<uint64_t>(MIPS64_REG_LAST, Location(LOCATION_REGISTER, MIPS64_REG_RA)) {}
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ArchEnum RegsMips64::Arch() {
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return ARCH_MIPS64;
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}
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uint64_t RegsMips64::pc() {
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return regs_[MIPS64_REG_PC];
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}
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uint64_t RegsMips64::sp() {
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return regs_[MIPS64_REG_SP];
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}
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void RegsMips64::set_pc(uint64_t pc) {
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regs_[MIPS64_REG_PC] = pc;
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}
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void RegsMips64::set_sp(uint64_t sp) {
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regs_[MIPS64_REG_SP] = sp;
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}
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uint64_t RegsMips64::GetPcAdjustment(uint64_t rel_pc, Elf*) {
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if (rel_pc < 8) {
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return 0;
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}
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// For now, just assume no compact branches
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return 8;
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}
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bool RegsMips64::SetPcFromReturnAddress(Memory*) {
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uint64_t ra = regs_[MIPS64_REG_RA];
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if (regs_[MIPS64_REG_PC] == ra) {
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return false;
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}
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regs_[MIPS64_REG_PC] = ra;
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return true;
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}
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void RegsMips64::IterateRegisters(std::function<void(const char*, uint64_t)> fn) {
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fn("r0", regs_[MIPS64_REG_R0]);
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fn("r1", regs_[MIPS64_REG_R1]);
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fn("r2", regs_[MIPS64_REG_R2]);
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fn("r3", regs_[MIPS64_REG_R3]);
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fn("r4", regs_[MIPS64_REG_R4]);
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fn("r5", regs_[MIPS64_REG_R5]);
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fn("r6", regs_[MIPS64_REG_R6]);
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fn("r7", regs_[MIPS64_REG_R7]);
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fn("r8", regs_[MIPS64_REG_R8]);
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fn("r9", regs_[MIPS64_REG_R9]);
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fn("r10", regs_[MIPS64_REG_R10]);
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fn("r11", regs_[MIPS64_REG_R11]);
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fn("r12", regs_[MIPS64_REG_R12]);
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fn("r13", regs_[MIPS64_REG_R13]);
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fn("r14", regs_[MIPS64_REG_R14]);
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fn("r15", regs_[MIPS64_REG_R15]);
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fn("r16", regs_[MIPS64_REG_R16]);
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fn("r17", regs_[MIPS64_REG_R17]);
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fn("r18", regs_[MIPS64_REG_R18]);
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fn("r19", regs_[MIPS64_REG_R19]);
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fn("r20", regs_[MIPS64_REG_R20]);
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fn("r21", regs_[MIPS64_REG_R21]);
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fn("r22", regs_[MIPS64_REG_R22]);
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fn("r23", regs_[MIPS64_REG_R23]);
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fn("r24", regs_[MIPS64_REG_R24]);
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fn("r25", regs_[MIPS64_REG_R25]);
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fn("r26", regs_[MIPS64_REG_R26]);
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fn("r27", regs_[MIPS64_REG_R27]);
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fn("r28", regs_[MIPS64_REG_R28]);
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fn("sp", regs_[MIPS64_REG_SP]);
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fn("r30", regs_[MIPS64_REG_R30]);
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fn("ra", regs_[MIPS64_REG_RA]);
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fn("pc", regs_[MIPS64_REG_PC]);
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}
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Regs* RegsMips64::Read(void* remote_data) {
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mips64_user_regs* user = reinterpret_cast<mips64_user_regs*>(remote_data);
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RegsMips64* regs = new RegsMips64();
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uint64_t* reg_data = reinterpret_cast<uint64_t*>(regs->RawData());
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memcpy(regs->RawData(), &user->regs[MIPS64_EF_R0], (MIPS64_REG_R31 + 1) * sizeof(uint64_t));
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reg_data[MIPS64_REG_PC] = user->regs[MIPS64_EF_CP0_EPC];
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return regs;
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}
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Regs* RegsMips64::CreateFromUcontext(void* ucontext) {
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mips64_ucontext_t* mips64_ucontext = reinterpret_cast<mips64_ucontext_t*>(ucontext);
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RegsMips64* regs = new RegsMips64();
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// Copy 64 bit sc_regs over to 64 bit regs
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memcpy(regs->RawData(), &mips64_ucontext->uc_mcontext.sc_regs[0], 32 * sizeof(uint64_t));
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(*regs)[MIPS64_REG_PC] = mips64_ucontext->uc_mcontext.sc_pc;
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return regs;
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}
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bool RegsMips64::StepIfSignalHandler(uint64_t elf_offset, Elf* elf, Memory* process_memory) {
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uint64_t data;
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Memory* elf_memory = elf->memory();
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// Read from elf memory since it is usually more expensive to read from
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// process memory.
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if (!elf_memory->Read(elf_offset, &data, sizeof(data))) {
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return false;
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}
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// Look for the kernel sigreturn function.
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// __vdso_rt_sigreturn:
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// 0x2402145b li v0, 0x145b
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// 0x0000000c syscall
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if (data != 0x0000000c2402145bULL) {
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return false;
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}
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// vdso_rt_sigreturn => read rt_sigframe
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// offset = siginfo offset + sizeof(siginfo) + uc_mcontext offset
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// read 64 bit sc_regs[32] from stack into 64 bit regs_
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uint64_t sp = regs_[MIPS64_REG_SP];
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if (!process_memory->Read(sp + 24 + 128 + 40, regs_.data(),
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sizeof(uint64_t) * (MIPS64_REG_LAST - 1))) {
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return false;
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}
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// offset = siginfo offset + sizeof(siginfo) + uc_mcontext offset + sc_pc offset
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// read 64 bit sc_pc from stack into 64 bit regs_[MIPS64_REG_PC]
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if (!process_memory->Read(sp + 24 + 128 + 40 + 576, ®s_[MIPS64_REG_PC], sizeof(uint64_t))) {
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return false;
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}
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return true;
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}
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Regs* RegsMips64::Clone() {
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return new RegsMips64(*this);
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}
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} // namespace unwindstack
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