bfc6dc4ca8
GGLAssembler assumes addresses to be 32-bit and uses ARM 32-bit instructions to load/store/manipulate addresses. To support, 64-bit architectures, following changes has been done 1. ARMAssemblerInterface has been extended to support four new operations ADDR_LDR, ADDR_STR, ADDR_SUB, ADDR_ADD. Base class implements these virtual functions to use 32bit equivalent function. This avoids existing 32-bit Assembler backend implementations like ARMAssembler and MIPSAssembler from mapping the new functions to existing equivalent routines. This also allows 64-bit Architectures like AArch64 to override the function in their assembler backend implementations. 2. GGLAssembler code (spread over GGLAssembler.cpp, GGLAssembler.h and texturing.cpp) has been changed to use the new operations for address operations. Change-Id: I3d7eace4691e3e47cef737d97ac67ce6ef4fb18d Signed-off-by: Ashok Bhat <ashok.bhat@arm.com> |
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arch-mips | ||
codeflinger | ||
tests | ||
Android.mk | ||
buffer.cpp | ||
buffer.h | ||
clear.cpp | ||
clear.h | ||
col32cb16blend.S | ||
col32cb16blend_neon.S | ||
fixed.cpp | ||
format.cpp | ||
MODULE_LICENSE_APACHE2 | ||
NOTICE | ||
picker.cpp | ||
picker.h | ||
pixelflinger.cpp | ||
raster.cpp | ||
raster.h | ||
rotate90CW_4x4_16v6.S | ||
scanline.cpp | ||
scanline.h | ||
t32cb16blend.S | ||
trap.cpp | ||
trap.h |